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Sat, 25 Jan 2025 09:01:45 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH v3 04/24] target/alpha: Move has_work() from CPUClass to SysemuCPUOps Date: Sat, 25 Jan 2025 18:01:05 +0100 Message-ID: <20250125170125.32855-5-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250125170125.32855-1-philmd@linaro.org> References: <20250125170125.32855-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::336; envelope-from=philmd@linaro.org; helo=mail-wm1-x336.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1737824744046019000 Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- target/alpha/cpu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c index e1b898e5755..83164a694d8 100644 --- a/target/alpha/cpu.c +++ b/target/alpha/cpu.c @@ -63,6 +63,7 @@ static void alpha_restore_state_to_opc(CPUState *cs, } } =20 +#ifndef CONFIG_USER_ONLY static bool alpha_cpu_has_work(CPUState *cs) { /* Here we are checking to see if the CPU should wake up from HALT. @@ -77,6 +78,7 @@ static bool alpha_cpu_has_work(CPUState *cs) | CPU_INTERRUPT_SMP | CPU_INTERRUPT_MCHK); } +#endif /* !CONFIG_USER_ONLY */ =20 static int alpha_cpu_mmu_index(CPUState *cs, bool ifetch) { @@ -216,6 +218,7 @@ static void alpha_cpu_initfn(Object *obj) #include "hw/core/sysemu-cpu-ops.h" =20 static const struct SysemuCPUOps alpha_sysemu_ops =3D { + .has_work =3D alpha_cpu_has_work, .get_phys_page_debug =3D alpha_cpu_get_phys_page_debug, }; #endif @@ -251,7 +254,6 @@ static void alpha_cpu_class_init(ObjectClass *oc, void = *data) &acc->parent_realize); =20 cc->class_by_name =3D alpha_cpu_class_by_name; - cc->has_work =3D alpha_cpu_has_work; cc->mmu_index =3D alpha_cpu_mmu_index; cc->dump_state =3D alpha_cpu_dump_state; cc->set_pc =3D alpha_cpu_set_pc; --=20 2.47.1