From nobody Sat Apr 5 17:53:37 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1737726479; cv=none; d=zohomail.com; s=zohoarc; b=UEPlZDAnnhU4lh2pefhTG8rV9ovrQieL8H7CyZgCOOdtpZHhKhwaJo+relm7fXKoazyPBqyzW+F/N7dzSHM945NeMuyAiReliTjwprDWUgsk9eboVONZxUDeZ1CdL4XmJ5pzQbIgU0B+buYCZt0AL/TPxj0T8JT1gbCdSeDSwP8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1737726479; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=8kPuSRtjp1doEYhL/6RLp6DgAK1dLUu/elbqmjUp/yk=; b=eUCK/4IPJ2oeJ1u2IlwJLWyBo2sodyerCA9/K3mjgKaqTghW8xB7sZkNFaQwW7DrudPiP0V3u0oUNQIV8rGi+acIVdGWgw+/tFBgjvqjdL5jR6md7/NY85a5q+oGSjD0bBe0MkLcI0gYVMb0M2IH+U1xJsxlg5Mq42vybocAGeg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 173772647932983.38400799006729; Fri, 24 Jan 2025 05:47:59 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tbJvR-0003CT-Iw; Fri, 24 Jan 2025 08:40:45 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tbJuv-0001Xa-1x for qemu-devel@nongnu.org; Fri, 24 Jan 2025 08:40:16 -0500 Received: from mgamail.intel.com ([198.175.65.13]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tbJus-00042W-4Z for qemu-devel@nongnu.org; Fri, 24 Jan 2025 08:40:11 -0500 Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Jan 2025 05:39:48 -0800 Received: from lxy-clx-4s.sh.intel.com ([10.239.48.52]) by fmviesa003.fm.intel.com with ESMTP; 24 Jan 2025 05:39:44 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1737726011; x=1769262011; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=R7oHs5ceEXGmP8urc22iTrcnB1GDDwG0Hw6Vg6gX3CI=; b=gBqg/6/UWy+lz0GDW5Ndzb+69l489t4SA5+0K3qlkbuC1+prj1iAAh9r vqR7rkFIRfvgOGcB1av9FJI+SehHLz69Ri6LJASYzN0Yu2gh7foyZg5K9 6EJQ8Xf/RjmALSTCboe2hQjIBQGBByQICb/BbBnCvD4KAmSfP74vST14v fSqM7+GfCRrp00YTyQbVd4q2D6Ka4DPdJbUWGot/kIp8U6dwmDaDhWrpz F9U3GoyfUf3PFqAYIx3rqtou1Ck84RHNN+iR4iJzxCidFrTrLZkuJqU/b vYePBC+5PISpH8Au5bdnrao4MQz97Ch7qacvdBl6oGYGmp12Qf+Abvrxg Q==; X-CSE-ConnectionGUID: NFhqUiS3QdetSELa485LZA== X-CSE-MsgGUID: HzgAtFfZRyqsFP5b0ogmJQ== X-IronPort-AV: E=McAfee;i="6700,10204,11325"; a="49246589" X-IronPort-AV: E=Sophos;i="6.13,231,1732608000"; d="scan'208";a="49246589" X-CSE-ConnectionGUID: s00mDXelRF6zUi7uycCu8A== X-CSE-MsgGUID: C0Ay4mYCR+eHJGN2vje7rQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="111804462" From: Xiaoyao Li To: Paolo Bonzini , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Igor Mammedov Cc: Zhao Liu , "Michael S. Tsirkin" , Eric Blake , Markus Armbruster , Peter Maydell , Marcelo Tosatti , Huacai Chen , Rick Edgecombe , Francesco Lavra , xiaoyao.li@intel.com, qemu-devel@nongnu.org, kvm@vger.kernel.org Subject: [PATCH v7 44/52] i386/cpu: Move CPUID_XSTATE_XSS_MASK to header file and introduce CPUID_XSTATE_MASK Date: Fri, 24 Jan 2025 08:20:40 -0500 Message-Id: <20250124132048.3229049-45-xiaoyao.li@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250124132048.3229049-1-xiaoyao.li@intel.com> References: <20250124132048.3229049-1-xiaoyao.li@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=198.175.65.13; envelope-from=xiaoyao.li@intel.com; helo=mgamail.intel.com X-Spam_score_int: -63 X-Spam_score: -6.4 X-Spam_bar: ------ X-Spam_report: (-6.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-2.996, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, HK_RANDOM_ENVFROM=0.001, HK_RANDOM_FROM=0.998, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1737726481392019100 Content-Type: text/plain; charset="utf-8" They will be used by TDX. Signed-off-by: Xiaoyao Li --- target/i386/cpu.c | 3 --- target/i386/cpu.h | 5 +++++ 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 4088bf63c48f..f1330627adbb 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -1829,9 +1829,6 @@ static const X86RegisterInfo32 x86_reg_info_32[CPU_NB= _REGS32] =3D { }; #undef REGISTER =20 -/* CPUID feature bits available in XSS */ -#define CPUID_XSTATE_XSS_MASK (XSTATE_ARCH_LBR_MASK) - ExtSaveArea x86_ext_save_areas[XSAVE_STATE_AREA_COUNT] =3D { [XSTATE_FP_BIT] =3D { /* x87 FP state component is always enabled if XSAVE is supported = */ diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 4890424c3a9e..a4c0531262ce 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -623,6 +623,11 @@ typedef enum X86Seg { XSTATE_Hi16_ZMM_MASK | XSTATE_PKRU_MASK |= \ XSTATE_XTILE_CFG_MASK | XSTATE_XTILE_DATA= _MASK) =20 +/* CPUID feature bits available in XSS */ +#define CPUID_XSTATE_XSS_MASK (XSTATE_ARCH_LBR_MASK) + +#define CPUID_XSTATE_MASK (CPUID_XSTATE_XCR0_MASK | CPUID_XSTATE_XSS= _MASK) + /* CPUID feature words */ typedef enum FeatureWord { FEAT_1_EDX, /* CPUID[1].EDX */ --=20 2.34.1