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h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=l01kKMMsqNOXxQB2rwFRABfzvwA89Nysj74FlgCjDfa6pRFgtz6/buVxkO2wLgctk FtDO4S2DPRmYi16NUZ2ftkn3UkmWuRqmz6HyJxygUMjVD/J7xelAqadsZoyGFjdt2e ShKkwxHNsT0TAlOCMgkydEnEAzGaAb12u1G3pzzg= X-AuditID: b6c32a50-7ebff7000000721c-76-6791d9a87b11 From: Vinayak Holikatti To: qemu-devel@nongnu.org Cc: krish.reddy@samsung.com, vishak.g@samsung.com, a.manzanares@samsung.com, alok.rathore@samsung.com, s5.kumari@samsung.com, Vinayak Holikatti Subject: [PATCH 2/2] hw/cxl/cxl-mailbox-utils: Add support for Media operations Sanitize and Write Zeros commands (8.2.9.9.5.3) Date: Thu, 23 Jan 2025 10:39:03 +0530 Message-Id: <20250123050903.92336-3-vinayak.kh@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250123050903.92336-1-vinayak.kh@samsung.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFmpkk+LIzCtJLcpLzFFi42LZdlhTXXfFzYnpBrvPC1lMP6xo8eX0HjaL hRuXMVkc793BYrHm3GcWixMnt7NbnJ81h92B3ePJtc1MHn1bVjEGMEVl22SkJqakFimk5iXn p2TmpdsqeQfHO8ebmhkY6hpaWpgrKeQl5qbaKrn4BOi6ZeYA7VVSKEvMKQUKBSQWFyvp29kU 5ZeWpCpk5BeX2CqlFqTkFJgU6BUn5haX5qXr5aWWWBkaGBiZAhUmZGfcmzaVpeBKcMWlTXwN jN1WXYycHBICJhKPLy5j7WLk4hAS2MMosWPBBWYI5xOjxId1W9ghnG+MErPnLmWFaVn8bx5U Yi+jxPS+E0wQTgOTxJvNU9lAqtgEDCQeNB9nB7FFBCQlfnedZgaxmQXWMEpsWyIPYgsLNDJK nLnJBWKzCKhKzPnczQRi8wpYS0w7vIYdYpu8xP6DZ8F6OQVsJI5tesMIUSMocXLmExaImfIS zVtng90tIXCJXeLG3jVQp7pIbNj4iBnCFpZ4dXwL1FApiZf9bVB2scS5i58YIewaidddK6Dq 7SVaT/UD2RxACzQl1u/ShwjLSkw9tY4JYi+fRO/vJ0wQcV6JHfNAbA4gW0Vi6dtMmE1fnjVD TfeQmLN3HTTg+hklPn+cxDSBUWEWkndmIXlnFsLmBYzMqxilUguKc9NTk00LDHXzUsvhsZyc n7uJEZwWtQJ2MK7e8FfvECMTB+MhRgkOZiUR3v9PJqQL8aYkVlalFuXHF5XmpBYfYjQFBvhE ZinR5HxgYs4riTc0sTQwMTMzM7E0NjNUEudt3tmSLiSQnliSmp2aWpBaBNPHxMEp1cDUfdM+ yqN86SKL+Qq7b0VsuOtlkWzy/eTP6+dbZL58EOS4MFFDNWjCr8ltcnsVjZNOX9GurDRNUZO1 Kd8yZYnenVoOoUrv2+Hmx2/vqa5fabz+WkTEoyV7739p7QvfzXeE98SPSsnH6vPq6i+vyC08 KTmxeldDznGODSvvXHQ6MWWSeSdHfmf1mRMvAtL2y281Tlf68Gzi98p7Kvk5/uqXJzXylIXK PTQ67Ky6Ysoq14MX9ZselM3sP2KtcV33jEH33Poz3oX+Lm9OlB2bsfGBFEuZcVu26ulc3yUX rC7c6T7Lfu3QGfE/QRzn5y61z/WzcHyqxBP9WPTkeo3VyrOW3LX8XFba8WqPcWS/bOQ1JZbi jERDLeai4kQAKyNNDRQEAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrOLMWRmVeSWpSXmKPExsWy7bCSnO7PcxPTDZ4tMrKYfljR4svpPWwW CzcuY7I43ruDxWLNuc8sFidObme3OD9rDrsDu8eTa5uZPPq2rGIMYIrisklJzcksSy3St0vg yrg3bSpLwZXgikub+BoYu626GDk5JARMJBb/m8fexcjFISSwm1Hi/us+NoiElMSxnT+hbGGJ lf+eQxX9Y5R4cOkgK0iCTcBA4kHzcXYQW0RAUuJ312lmEJtZYBOjROs+PRBbWKBeYtLyWSwg NouAqsScz91MIDavgLXEtMNr2CEWyEvsP3gWrJdTwEbi2KY3jCC2EFDNz0lzWCHqBSVOznzC AjFfXqJ562zmCYwCs5CkZiFJLWBkWsUomVpQnJueW2xYYJiXWq5XnJhbXJqXrpecn7uJERy2 Wpo7GLev+qB3iJGJg/EQowQHs5II7/8nE9KFeFMSK6tSi/Lji0pzUosPMUpzsCiJ84q/6E0R EkhPLEnNTk0tSC2CyTJxcEo1MJ0Ojsm4+PXszZ7TxQ5VfZc3/DKM+vUme9mmO14Va/4VZd9J PBZ6pUr2xevLimV3awVjWKrnWM3dyMuYZGJ8S8pagf372p1e7a26Bp8Vb89WW36uyvfChNnn 71yq/csq9el9cbYef84njR0z2pfxnVa/E/o5e+eaT5M/K14qTb5zQ37jOY7cB8JMUw4mXhbt mn7hS9mDzzueGAgHRbyX2Dn3Xd3fqpnMy7afiZO2kmbOPJmgrXWjTL3/5v5t4UIvo/UvqUyT vfX39TUrw0nHVZ8Ez9ycoGrunTF/0haF3y9zDgbvPVn7tLdtQYFLh6VI/+G/DXWyjK8kLjxk 2xL7tic+cu6UWwfnTORO7PAN3ZyhxFKckWioxVxUnAgAOjWKAMoCAAA= X-CMS-MailID: 20250123050913epcas5p45fb9a638e62f436076da283e86e54ea2 X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20250123050913epcas5p45fb9a638e62f436076da283e86e54ea2 References: <20250123050903.92336-1-vinayak.kh@samsung.com> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=203.254.224.25; envelope-from=vinayak.kh@samsung.com; helo=mailout2.samsung.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-2.996, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H2=-0.043, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-Mailman-Approved-At: Thu, 23 Jan 2025 09:08:19 -0500 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @samsung.com) X-ZM-MESSAGEID: 1737641361133019000 CXL spec 3.1 section 8.2.9.9.5.3 describes media operations commands. CXL devices supports media operations Sanitize and Write zero command. Signed-off-by: Vinayak Holikatti --- hw/cxl/cxl-mailbox-utils.c | 217 ++++++++++++++++++++++++++++++++++-- include/hw/cxl/cxl_device.h | 11 ++ 2 files changed, 220 insertions(+), 8 deletions(-) diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c index 2315d07fb1..89847ddd9d 100644 --- a/hw/cxl/cxl-mailbox-utils.c +++ b/hw/cxl/cxl-mailbox-utils.c @@ -1722,6 +1722,145 @@ static CXLRetCode cmd_sanitize_overwrite(const stru= ct cxl_cmd *cmd, return CXL_MBOX_BG_STARTED; } =20 +#define DPA_RANGE_GRANULARITY 64 +struct dpa_range_list_entry { + uint64_t starting_dpa; + uint64_t length; +}; + +static int validate_dpa_addr(CXLType3Dev *ct3d, uint64_t dpa_addr, + size_t length) +{ + MemoryRegion *vmr =3D NULL, *pmr =3D NULL, *dc_mr =3D NULL; + uint64_t vmr_size =3D 0, pmr_size =3D 0, dc_size =3D 0; + int rc =3D 0; + + if ((dpa_addr % DPA_RANGE_GRANULARITY) || + (length % DPA_RANGE_GRANULARITY)) { + return -EINVAL; + } + + if (ct3d->hostvmem) { + vmr =3D host_memory_backend_get_memory(ct3d->hostvmem); + vmr_size =3D memory_region_size(vmr); + } + if (ct3d->hostpmem) { + pmr =3D host_memory_backend_get_memory(ct3d->hostpmem); + pmr_size =3D memory_region_size(pmr); + } + if (ct3d->dc.host_dc) { + dc_mr =3D host_memory_backend_get_memory(ct3d->dc.host_dc); + dc_size =3D memory_region_size(dc_mr); + } + + if (!vmr && !pmr && !dc_mr) { + return -ENODEV; + } + + if (dpa_addr >=3D vmr_size + pmr_size + dc_size || + (dpa_addr + length) > vmr_size + pmr_size + dc_size) { + return -EINVAL; + } + + if (dpa_addr > vmr_size + pmr_size) { + if (!ct3_test_region_block_backed(ct3d, dpa_addr, length)) { + return -ENODEV; + } + } + + + return rc; +} + +static int sanitize_range(CXLType3Dev *ct3d, uint64_t dpa_addr, size_t len= gth, + uint8_t fill_value) +{ + + MemoryRegion *vmr =3D NULL, *pmr =3D NULL; + uint64_t vmr_size =3D 0, pmr_size =3D 0; + AddressSpace *as =3D NULL; + MemTxAttrs mem_attrs =3D {0}; + + if (ct3d->hostvmem) { + vmr =3D host_memory_backend_get_memory(ct3d->hostvmem); + vmr_size =3D memory_region_size(vmr); + } + if (ct3d->hostpmem) { + pmr =3D host_memory_backend_get_memory(ct3d->hostpmem); + pmr_size =3D memory_region_size(pmr); + } + + if (dpa_addr < vmr_size) { + as =3D &ct3d->hostvmem_as; + } else if (dpa_addr < vmr_size + pmr_size) { + as =3D &ct3d->hostpmem_as; + } else { + if (!ct3_test_region_block_backed(ct3d, dpa_addr, length)) { + return -ENODEV; + } + as =3D &ct3d->dc.host_dc_as; + } + + return address_space_set(as, dpa_addr, + fill_value, length, mem_attrs); +} + +/* Perform the actual device zeroing */ +static void __do_sanitize(CXLType3Dev *ct3d) +{ + struct CXLSanitizeInfo *san_info =3D ct3d->media_op_sanitize; + int dpa_range_count =3D san_info->dpa_range_count; + int rc =3D 0; + + for (int i =3D 0; i < dpa_range_count; i++) { + rc =3D sanitize_range(ct3d, san_info->dpa_range_list[i].starting_d= pa, + san_info->dpa_range_list[i].length, san_info->fill_value); + if (rc) { + goto exit; + } + } + cxl_discard_all_event_records(&ct3d->cxl_dstate); +exit: + g_free(ct3d->media_op_sanitize); + ct3d->media_op_sanitize =3D NULL; + return; +} + +static int get_sanitize_duration(uint64_t total_mem) +{ + int secs =3D 0; + + if (total_mem <=3D 512) { + secs =3D 4; + } else if (total_mem <=3D 1024) { + secs =3D 8; + } else if (total_mem <=3D 2 * 1024) { + secs =3D 15; + } else if (total_mem <=3D 4 * 1024) { + secs =3D 30; + } else if (total_mem <=3D 8 * 1024) { + secs =3D 60; + } else if (total_mem <=3D 16 * 1024) { + secs =3D 2 * 60; + } else if (total_mem <=3D 32 * 1024) { + secs =3D 4 * 60; + } else if (total_mem <=3D 64 * 1024) { + secs =3D 8 * 60; + } else if (total_mem <=3D 128 * 1024) { + secs =3D 15 * 60; + } else if (total_mem <=3D 256 * 1024) { + secs =3D 30 * 60; + } else if (total_mem <=3D 512 * 1024) { + secs =3D 60 * 60; + } else if (total_mem <=3D 1024 * 1024) { + secs =3D 120 * 60; + } else { + secs =3D 240 * 60; /* max 4 hrs */ + } + + return secs; +} + enum { MEDIA_OP_GENERAL =3D 0x0, MEDIA_OP_SANITIZE =3D 0x1, @@ -1729,10 +1868,9 @@ enum { } MEDIA_OPERATION_CLASS; =20 enum { - MEDIA_OP_SUB_DISCOVERY =3D 0x0, - MEDIA_OP_SUB_SANITIZE =3D 0x0, - MEDIA_OP_SUB_ZERO =3D 0x1, - MEDIA_OP_SUB_CLASS_MAX + MEDIA_OP_GEN_DISCOVERY =3D 0x0, + MEDIA_OP_SAN_SANITIZE =3D 0x0, + MEDIA_OP_SAN_ZERO =3D 0x1, } MEDIA_OPERATION_SUB_CLASS; =20 struct media_op_supported_list_entry { @@ -1777,9 +1915,14 @@ static CXLRetCode cmd_media_operations(const struct = cxl_cmd *cmd, }; } QEMU_PACKED *media_op_in_pl =3D (void *)payload_in; =20 + + CXLType3Dev *ct3d =3D CXL_TYPE3(cci->d); uint8_t media_op_cl =3D media_op_in_pl->media_operation_class; uint8_t media_op_subclass =3D media_op_in_pl->media_operation_subclass; uint32_t dpa_range_count =3D media_op_in_pl->dpa_range_count; + uint8_t fill_value =3D 0; + uint64_t total_mem =3D 0; + int secs =3D 0; =20 if (len_in < sizeof(*media_op_in_pl)) { return CXL_MBOX_INVALID_PAYLOAD_LENGTH; @@ -1788,7 +1931,7 @@ static CXLRetCode cmd_media_operations(const struct c= xl_cmd *cmd, switch (media_op_cl) { case MEDIA_OP_GENERAL: switch (media_op_subclass) { - case MEDIA_OP_SUB_DISCOVERY: + case MEDIA_OP_GEN_DISCOVERY: int count =3D 0; struct media_op_discovery_out_pl *media_out_pl =3D (void *)payload_out; @@ -1806,7 +1949,7 @@ static CXLRetCode cmd_media_operations(const struct c= xl_cmd *cmd, return CXL_MBOX_INVALID_INPUT; } =20 - media_out_pl->dpa_range_granularity =3D CXL_CAPACITY_MULTIPLIE= R; + media_out_pl->dpa_range_granularity =3D DPA_RANGE_GRANULARITY; media_out_pl->total_supported_operations =3D MAX_SUPPORTED_OPS; if (num_ops > 0) { for (int i =3D start_index; i < MAX_SUPPORTED_OPS; i++) { @@ -1824,22 +1967,73 @@ disc_out: media_out_pl->num_of_supported_operations =3D count; *len_out =3D sizeof(struct media_op_discovery_out_pl) + (sizeof(struct media_op_supported_list_entry) * count); - break; + goto exit; default: return CXL_MBOX_UNSUPPORTED; } break; case MEDIA_OP_SANITIZE: + { switch (media_op_subclass) { - + case MEDIA_OP_SAN_SANITIZE: + if (len_in < (sizeof(*media_op_in_pl) + + (dpa_range_count * sizeof(struct dpa_range_list_entry))= )) { + return CXL_MBOX_INVALID_PAYLOAD_LENGTH; + } + fill_value =3D 0xF; + goto sanitize_range; + case MEDIA_OP_SAN_ZERO: + if (len_in < (sizeof(*media_op_in_pl) + + (dpa_range_count * sizeof(struct dpa_range_list_entry)))) { + return CXL_MBOX_INVALID_PAYLOAD_LENGTH; + } + fill_value =3D 0; + goto sanitize_range; default: return CXL_MBOX_UNSUPPORTED; } break; + } default: return CXL_MBOX_UNSUPPORTED; } =20 +sanitize_range: + if (dpa_range_count > 0) { + for (int i =3D 0; i < dpa_range_count; i++) { + if (validate_dpa_addr(ct3d, + media_op_in_pl->dpa_range_list[i].starting_dpa, + media_op_in_pl->dpa_range_list[i].length)) { + return CXL_MBOX_INVALID_INPUT; + } + total_mem +=3D media_op_in_pl->dpa_range_list[i].length; + } + ct3d->media_op_sanitize =3D g_malloc0(sizeof(struct CXLSanitizeInf= o) + + (dpa_range_count * + sizeof(struct dpa_range_list_entry))); + + if (ct3d->media_op_sanitize) { + ct3d->media_op_sanitize->dpa_range_count =3D dpa_range_count; + ct3d->media_op_sanitize->fill_value =3D fill_value; + memcpy(ct3d->media_op_sanitize->dpa_range_list, + media_op_in_pl->dpa_range_list, + (dpa_range_count * + sizeof(struct dpa_range_list_entry))); + secs =3D get_sanitize_duration(total_mem >> 20); + goto start_bg; + } + } else if (dpa_range_count =3D=3D 0) { + goto exit; + } + +start_bg: + /* EBUSY other bg cmds as of now */ + cci->bg.runtime =3D secs * 1000UL; + *len_out =3D 0; + /* sanitize when done */ + cxl_dev_disable_media(&ct3d->cxl_dstate); + return CXL_MBOX_BG_STARTED; +exit: return CXL_MBOX_SUCCESS; } =20 @@ -3154,6 +3348,13 @@ static void bg_timercb(void *opaque) cxl_dev_enable_media(&ct3d->cxl_dstate); } break; + case 0x4402: /* Media Operations sanitize */ + { + CXLType3Dev *ct3d =3D CXL_TYPE3(cci->d); + __do_sanitize(ct3d); + cxl_dev_enable_media(&ct3d->cxl_dstate); + } + break; case 0x4304: /* scan media */ { CXLType3Dev *ct3d =3D CXL_TYPE3(cci->d); diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h index a64739be25..6d82eb266a 100644 --- a/include/hw/cxl/cxl_device.h +++ b/include/hw/cxl/cxl_device.h @@ -581,6 +581,15 @@ typedef struct CXLSetFeatureInfo { size_t data_size; } CXLSetFeatureInfo; =20 +struct CXLSanitizeInfo { + uint32_t dpa_range_count; + uint8_t fill_value; + struct { + uint64_t starting_dpa; + uint64_t length; + } dpa_range_list[0]; +}; + struct CXLType3Dev { /* Private */ PCIDevice parent_obj; @@ -651,6 +660,8 @@ struct CXLType3Dev { uint8_t num_regions; /* 0-8 regions */ CXLDCRegion regions[DCD_MAX_NUM_REGION]; } dc; + + struct CXLSanitizeInfo *media_op_sanitize; }; =20 #define TYPE_CXL_TYPE3 "cxl-type3" --=20 2.34.1