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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38bf322aa0asm14022691f8f.50.2025.01.21.08.18.27 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 21 Jan 2025 08:18:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1737476309; x=1738081109; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=4AQT8m8tl5nDLX+ETLTSG96DbyWQcasjgSWfLcAwrhg=; b=bQ+0j9EPkOxrwWI0iG8ILlSOQOO6MEezvOWBdCTEvDx2MfCk3nhFgbPH/blP7D2XUn HjI43qUl6VlIM8zY0opQDdPVSlAYjbVfeDp4ge7DUW2JBiXwjNN4RJxLxh52eJZIAGuA ULeLO44SrMl8q035e7y2+KYLLL06RDfUy7d/3xQXwZ7ltK/3fkGWOw2u1X3BTLyEdb6M kg7NVwlGImNF0TWUhmSre5D1dq5Y+9lp8ll5DOvmALb4iS5/SQX/2ZXVOi0yvrjcmUmY O0m/+SXtfu4MUncvDAHJzz5om2hpJ1DCv2C19GSZ+IAjiMSQSQlQ1shCY0ejN0JaI2Bm ssHQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1737476309; x=1738081109; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=4AQT8m8tl5nDLX+ETLTSG96DbyWQcasjgSWfLcAwrhg=; b=ntnwGaAgsVDdL2HC6kJvh7IsIIVGetgMMmyJjIrBXisMBhr/BHSaVW4MJMbVzj874f r4unWkXbvwvIquSA0PSTGnF6ws5JGhd+YdCq03LpGBPLVeVrqshgGzIIk4r5DjPhV/PA fxN5VCVzQgiXRk+TIrjqvMiHb+SU5xLtcjuali1Je+Zn3QZyfmc7NS9+pgomvg5wXxTw m7znswO7bIHLjsGQ2cIanJ0FfsPPsQWlpqd83ivS04i4pcfQTDhRxlDp4Biqz1906BHR WyOwwO3M7NTKd/ex+jY6LurqBd0UYwsb03c922nbuhogj8Ez77q9eXwC61CGntkfmFD3 OjRg== X-Gm-Message-State: AOJu0YwrGnpYeUyffDRgXH8HOxACoFVBwx8A3JsgeBjjdXDOVAUp1Ibc XGil54YTQFMI6Wvfx5foAkk17ql7lpVKmzOmxu4Rh+3T6Nt9mALy8X6jZq2T+HlP8e+AHPSMlt8 Cl+4= X-Gm-Gg: ASbGnctsb1cLzx3iZEzzmqG/OPS59saXkiqLnZkVc09f+qyxpBOKrnkp6jKCybMzeZY n3XRNGIMAhVfdMNs4xxvRKV8ku5wvvxfW8hCDjmF4OUGc0SEkCBRgqLpXsfjI6CxhEr8GFjJDxW qGVhwAiau0y6oT3sJWWR1u5xf//DyZoAG1R3GGTA8/rKmDd3IVyVETWSIYCY2ZfJYmQLMB9/7i/ nA0ZAAmU1/lKi/yDmUGjrmVw08d3B8C7e2brLl0EsBe6Ogv2kMAaXpn1LnPnA2TGDH3QV4tYJBn w9PfDvmMDPdhQpU1A5rQLiXqUrL03PUclNCAEaVDoqUB X-Google-Smtp-Source: AGHT+IGxC/Y3dOIvCvZZz1/tVy6LDHduH8KEbQ/91AQXvuWOks2izhVM+gNaeze66ac0fs1klldjWg== X-Received: by 2002:a05:6000:1a8c:b0:38a:888c:6786 with SMTP id ffacd0b85a97d-38bf57c063fmr16833268f8f.52.1737476308711; Tue, 21 Jan 2025 08:18:28 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Aleksandar Rikalo , Jiaxun Yang , Bernhard Beschow , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Huacai Chen , Aurelien Jarno , Richard Henderson Subject: [PATCH 2/6] target/mips: Create clock *after* accelerator vCPU is realized Date: Tue, 21 Jan 2025 17:18:13 +0100 Message-ID: <20250121161817.33654-3-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250121161817.33654-1-philmd@linaro.org> References: <20250121161817.33654-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=philmd@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1737476387573019000 Architecture specific hardware doesn't have a particular dependency on the accelerator vCPU (created with cpu_exec_realizefn), and can be initialized *after* the vCPU is realized. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- target/mips/cpu.c | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/target/mips/cpu.c b/target/mips/cpu.c index 0b3ac4e60a3..028a3c91afb 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -462,20 +462,6 @@ static void mips_cpu_realizefn(DeviceState *dev, Error= **errp) MIPSCPUClass *mcc =3D MIPS_CPU_GET_CLASS(dev); Error *local_err =3D NULL; =20 - if (!clock_get(cpu->clock)) { -#ifndef CONFIG_USER_ONLY - if (!qtest_enabled()) { - g_autofree char *cpu_freq_str =3D freq_to_str(CPU_FREQ_HZ_DEFA= ULT); - - warn_report("CPU input clock is not connected to any output cl= ock, " - "using default frequency of %s.", cpu_freq_str); - } -#endif - /* Initialize the frequency in case the clock remains unconnected.= */ - clock_set_hz(cpu->clock, CPU_FREQ_HZ_DEFAULT); - } - mips_cp0_period_set(cpu); - cpu_exec_realizefn(cs, &local_err); if (local_err !=3D NULL) { error_propagate(errp, local_err); @@ -490,6 +476,20 @@ static void mips_cpu_realizefn(DeviceState *dev, Error= **errp) fpu_init(env, env->cpu_model); mvp_init(env); =20 + if (!clock_get(cpu->clock)) { +#ifndef CONFIG_USER_ONLY + if (!qtest_enabled()) { + g_autofree char *cpu_freq_str =3D freq_to_str(CPU_FREQ_HZ_DEFA= ULT); + + warn_report("CPU input clock is not connected to any output cl= ock, " + "using default frequency of %s.", cpu_freq_str); + } +#endif + /* Initialize the frequency in case the clock remains unconnected.= */ + clock_set_hz(cpu->clock, CPU_FREQ_HZ_DEFAULT); + } + mips_cp0_period_set(cpu); + cpu_reset(cs); qemu_init_vcpu(cs); =20 --=20 2.47.1