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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4389041fec5sm184339285e9.19.2025.01.21.06.24.45 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 21 Jan 2025 06:24:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1737469486; x=1738074286; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=1OW6/o4DCFgT3ilwuV2iLRLfLVBrhuRs1sUZEij4GK4=; b=AFVie4bxAX3IOVeGygVIgIKoeLvoMBdGwL5hxqZJGRca3iKS99wMO3B+z5oGyEjeYt t0vn4XxTEwydUeuEuyUHEdFPAVyjiHZaNUyUSBBQvLZliiF66MJQpWbvWntGfCCvzE+Y XBbhr7xSX93lWpJNuvw3R4q5LXiBH4Tqd/bLVapkCc5I9rS5+4O6OXr07/nV+qeX0GlH qSMdkO9z4hsV7Yqs4hSKvPkUIZYsznoce+DwhA4XVu4dyO8TMH6hsp6cOn1qZfBBB8kP 3Ob0iyBcn88LrAs8gVbebfAnwNMoujnKeGjk6JI83Xfn4tYHaEl408SdIUyr2Pafrghg ufaA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1737469486; x=1738074286; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=1OW6/o4DCFgT3ilwuV2iLRLfLVBrhuRs1sUZEij4GK4=; b=N3CL+njYXZ2ENF79xNDFJvKcCPamQRO8/zW0xnE4/wepBIvADqfOnAeW9UHKGcjHiL jvwLBi7iZpqwZR5V9WKBkfDnyjGaaAEAsUroFCPgQTXWa/arVC+N532BCAEMw4JKTCJq CwWZ86+jT6JBe3VfJexlLVjIJF0yqGdNvV6D3fijA70uDo3XOHLnEQ1+YhcqOplPaVA3 nLQ5oC7Ysjbx321DYQDdvjf1htDQ7wA/aX3g1jSINX17lLywLdp2bGcp4bnxFTIWgEYB PtwUB4H5mcsrQ2CvOK+mivT7ncYIdrcYr+TrJWQVIgCu++k4zif3JbhDGj8m4qhbTei5 5B3A== X-Gm-Message-State: AOJu0YxQXP5DFKE6IWwL7kU9i8Memweo+Z9Jepuqi0Zbk/qVVmhcIaT6 Sv/6Wze2PWtzMdN/k9CEmc6LExj9TE9scLUGIThpoefqf2qSpkIJLlWuaujhv+L/uz2rPu7a3KI tXzQ= X-Gm-Gg: ASbGncuwaMcudGbKeqYZT+WMYZcIUJAkWtawh+vq05bsRNBxrzIEE33cugtSkDOO6Hi 36E6XYBk0igkCoo6DfPCATV/sG2zHxyiQLrotzCf0KG9zDCWuSePhb8p6ayBcEVZzWxtHVgGOFx K6sogNqYnbzJhpwf9SGKZD+5xrGDoEkCPpb8YyrF4KtYvULhVWIeiNm/RFhrW3agnTNZU/srXB+ Xp2qye3a6w54gVIWUSshZ0SR4vdB8gj3TixU+bp2ItSOYqFTLXqf2+MOiuiZvZKVGfkgPCxuESv fECM5PimXIZ5nPelf7w5YcJBS5f7fuRhwDm4pgOrmnK6 X-Google-Smtp-Source: AGHT+IFtX5g/GjBbUB8jJEpboAIbX7nsBc2mIcKl0+bFua6BeE629tSoqVI5R6ihsJ3W5Zz1ZAkiSw== X-Received: by 2002:a05:6000:18ab:b0:38a:49c1:8345 with SMTP id ffacd0b85a97d-38bec542923mr19873328f8f.18.1737469486020; Tue, 21 Jan 2025 06:24:46 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, Paolo Bonzini , Richard Henderson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH 13/28] target/i386: Move has_work() from CPUClass to SysemuCPUOps Date: Tue, 21 Jan 2025 15:23:26 +0100 Message-ID: <20250121142341.17001-14-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250121142341.17001-1-philmd@linaro.org> References: <20250121142341.17001-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=philmd@linaro.org; helo=mail-wr1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1737469852440019000 Move has_work() from CPUClass to SysemuCPUOps, restrict x86_cpu_pending_interrupt() to system. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- target/i386/cpu.h | 4 ++-- target/i386/cpu.c | 8 +++----- 2 files changed, 5 insertions(+), 7 deletions(-) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index b26e25ba15e..869b8598cd5 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -2289,8 +2289,6 @@ struct X86CPUClass { extern const VMStateDescription vmstate_x86_cpu; #endif =20 -int x86_cpu_pending_interrupt(CPUState *cs, int interrupt_request); - int x86_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu, int cpuid, DumpState *s); int x86_cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu, @@ -2313,6 +2311,8 @@ void x86_cpu_list(void); int cpu_x86_support_mca_broadcast(CPUX86State *env); =20 #ifndef CONFIG_USER_ONLY +int x86_cpu_pending_interrupt(CPUState *cs, int interrupt_request); + hwaddr x86_cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr, MemTxAttrs *attrs); int cpu_get_pic_interrupt(CPUX86State *s); diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 1b9c11022c4..51faba4e0b4 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -8256,16 +8256,15 @@ static vaddr x86_cpu_get_pc(CPUState *cs) return cpu->env.eip + cpu->env.segs[R_CS].base; } =20 +#if !defined(CONFIG_USER_ONLY) int x86_cpu_pending_interrupt(CPUState *cs, int interrupt_request) { X86CPU *cpu =3D X86_CPU(cs); CPUX86State *env =3D &cpu->env; =20 -#if !defined(CONFIG_USER_ONLY) if (interrupt_request & CPU_INTERRUPT_POLL) { return CPU_INTERRUPT_POLL; } -#endif if (interrupt_request & CPU_INTERRUPT_SIPI) { return CPU_INTERRUPT_SIPI; } @@ -8286,14 +8285,12 @@ int x86_cpu_pending_interrupt(CPUState *cs, int int= errupt_request) (env->eflags & IF_MASK && !(env->hflags & HF_INHIBIT_IRQ_MASK))))) { return CPU_INTERRUPT_HARD; -#if !defined(CONFIG_USER_ONLY) } else if (env->hflags2 & HF2_VGIF_MASK) { if((interrupt_request & CPU_INTERRUPT_VIRQ) && (env->eflags & IF_MASK) && !(env->hflags & HF_INHIBIT_IRQ_MASK)) { return CPU_INTERRUPT_VIRQ; } -#endif } } =20 @@ -8304,6 +8301,7 @@ static bool x86_cpu_has_work(CPUState *cs) { return x86_cpu_pending_interrupt(cs, cs->interrupt_request) !=3D 0; } +#endif /* !CONFIG_USER_ONLY */ =20 int x86_mmu_index_pl(CPUX86State *env, unsigned pl) { @@ -8544,6 +8542,7 @@ static const Property x86_cpu_properties[] =3D { #include "hw/core/sysemu-cpu-ops.h" =20 static const struct SysemuCPUOps i386_sysemu_ops =3D { + .has_work =3D x86_cpu_has_work, .get_memory_mapping =3D x86_cpu_get_memory_mapping, .get_paging_enabled =3D x86_cpu_get_paging_enabled, .get_phys_page_attrs_debug =3D x86_cpu_get_phys_page_attrs_debug, @@ -8577,7 +8576,6 @@ static void x86_cpu_common_class_init(ObjectClass *oc= , void *data) =20 cc->class_by_name =3D x86_cpu_class_by_name; cc->parse_features =3D x86_cpu_parse_featurestr; - cc->has_work =3D x86_cpu_has_work; cc->mmu_index =3D x86_cpu_mmu_index; cc->dump_state =3D x86_cpu_dump_state; cc->set_pc =3D x86_cpu_set_pc; --=20 2.47.1