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a="48320155" X-IronPort-AV: E=Sophos;i="6.13,220,1732608000"; d="scan'208";a="48320155" X-CSE-ConnectionGUID: ngaJ5KzcSkW99zZJBV/I2Q== X-CSE-MsgGUID: hoJDec7PRtCepx769v9Vjw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,220,1732608000"; d="scan'208";a="106599359" From: Tao Su To: qemu-devel@nongnu.org Cc: pbonzini@redhat.com, imammedo@redhat.com, xiaoyao.li@intel.com, zhao1.liu@linux.intel.com, xuelian.guo@intel.com, tao1.su@linux.intel.com Subject: [PATCH 1/4] target/i386: Introduce SierraForest-v2 model Date: Tue, 21 Jan 2025 10:06:47 +0800 Message-Id: <20250121020650.1899618-2-tao1.su@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250121020650.1899618-1-tao1.su@linux.intel.com> References: <20250121020650.1899618-1-tao1.su@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: none client-ip=198.175.65.11; envelope-from=tao1.su@linux.intel.com; helo=mgamail.intel.com X-Spam_score_int: -72 X-Spam_score: -7.3 X-Spam_bar: ------- X-Spam_report: (-7.3 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-3, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1737425762020019000 Content-Type: text/plain; charset="utf-8" Update SierraForest CPU model to add LAM, 4 bits indicating certain bits of IA32_SPEC_CTR are supported(intel-psfd, ipred-ctrl, rrsba-ctrl, bhi-ctrl) and the missing features(ss, tsc-adjust, cldemote, movdiri, movdir64b) Also add GDS-NO and RFDS-NO to indicate the related vulnerabilities are mitigated in stepping 3. Tested-by: Xuelian Guo Signed-off-by: Tao Su Reviewed-by: Xiaoyao Li Reviewed-by: Zhao Liu --- target/i386/cpu.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 1b9c11022c..6db8d6c9ba 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -4549,6 +4549,25 @@ static const X86CPUDefinition builtin_x86_defs[] =3D= { .model_id =3D "Intel Xeon Processor (SierraForest)", .versions =3D (X86CPUVersionDefinition[]) { { .version =3D 1 }, + { + .version =3D 2, + .props =3D (PropValue[]) { + { "ss", "on" }, + { "tsc-adjust", "on" }, + { "cldemote", "on" }, + { "movdiri", "on" }, + { "movdir64b", "on" }, + { "gds-no", "on" }, + { "rfds-no", "on" }, + { "lam", "on" }, + { "intel-psfd", "on"}, + { "ipred-ctrl", "on"}, + { "rrsba-ctrl", "on"}, + { "bhi-ctrl", "on"}, + { "stepping", "3" }, + { /* end of list */ } + } + }, { /* end of list */ }, }, }, --=20 2.34.1