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[2403:580b:97e8:0:321:6fb2:58f1:a1b1]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-21c2d3d6fbbsm8563595ad.168.2025.01.16.21.57.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Jan 2025 21:57:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1737093460; x=1737698260; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=lYuOTw7yVzw4r0ulf0VzNtp5iBl+gLJNbHgDvsfIU+4=; b=bm7isOGwo9QUfj87tSKmDMm2N65BdO17DKUg7ogvM+exbHtjUbZ1YutON+Gy2qIUrl aQpAFYQydp8Ths2xCRJnMXdhIvVtalLonciJOeoE+4AejxjiO7VXy+pHA2WUysKrxzZH 5Wc+y/FP3UsTN0iGQtUGpgTsN1ZzmgZGdBVZryoSmQrvA8mn6P5SPDeo3LaVenRmu3co FflrWmlVJoOVt1m5i9Oofh3lodLxqlmNB+f5ELl2S3x5it0OSDfsajnR2EZ2TnFlZTQs 9FtvkIJU9DrjVGOU8L5sJEj5Hb7lKInJ657vlHM5a8GcKSTqsIPnlckH8/d394ol/Rvo +kyg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1737093460; x=1737698260; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=lYuOTw7yVzw4r0ulf0VzNtp5iBl+gLJNbHgDvsfIU+4=; b=ogp5vLVAqn4uueQUP1mDkMEa0mOLrIKpprKZNJvf/ynb+tlI+xVhqk4u/40m51AozQ H699um4snZ+W3mKlm646z74py47rb5Dc0DzXwyUbk05fz7nHcVyN90WM0GHBZ1Xc3GuS fosK3p8OBGKg/lwULxgW7oLKm6IyQLHjqLb1EHl40JNgcB0SsVtOBxEjzCzMKKGFjfCa 9U4iIkByeS7bFmB3QAqln+baG1BmgAsXGmnfeJyTNcDtMzoRO7KMHAkaKm9JLPz3umWs FXaYkvqQE4MNCQ7YNQUpoY3dUAHuCT+8SA6JOUVPifm1YFIN0TBTFVQRAXP6JimMVB4d jI1w== X-Gm-Message-State: AOJu0Yy5AWNbTnozAHjHt4z7VlYzw7NiwPc9Zu1+OQyYaRr7JfvPRdUr NN83jwVxPFaeJbOFGMPCNWJGqHTAa2LZOv9bF2PvObVv/d61WNsIZiZAlg== X-Gm-Gg: ASbGncsbHKwk9C/DzAapyCHLsRaXGz1dxqMBJBdqOCKR/4Dlh7df0ZJ+weqi9ISYVrC kAk5jzOw0+u/GVr4GbYyIdMy0A4AFDqSdMg9fs0Kmu9UQGfBjEnuXvncbHJim6zs0mMF4NEDiw3 fJAgTXlUEsJLXnvlBJ668lT6Xw9Mw/yrp6XyQsQYLUtPGphEeKGhqH4WF6QbeHUDC1fAbID6/oF iHz0OGAR7I+oN3VwzZfLcJRh9sYk5zGPLh9liBkp/7F8X4D7tOZLKVVwLz3T+lfCpIDAtuFr9OM EKQgheezM649UHF+38Ar4ih1JoyH4iyAAsYuK919dEcne2V3m55PqZkVOceS X-Google-Smtp-Source: AGHT+IHkyZmOvw797bvOBME4vypqLEwthSeMNQJ/mQV/Lso0HiQZmVT9uoDudnbBq3qUENQkeKUiKw== X-Received: by 2002:a17:902:da88:b0:216:3f6e:fabd with SMTP id d9443c01a7336-21bf077db21mr126355135ad.7.1737093460184; Thu, 16 Jan 2025 21:57:40 -0800 (PST) From: Alistair Francis X-Google-Original-From: Alistair Francis To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Kaiwen Xue , Alistair Francis , Atish Patra Subject: [PULL 29/50] target/riscv: Decouple AIA processing from xiselect and xireg Date: Fri, 17 Jan 2025 15:55:31 +1000 Message-ID: <20250117055552.108376-30-alistair.francis@wdc.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250117055552.108376-1-alistair.francis@wdc.com> References: <20250117055552.108376-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::630; envelope-from=alistair23@gmail.com; helo=mail-pl1-x630.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1737093532926019000 Content-Type: text/plain; charset="utf-8" From: Kaiwen Xue Since xiselect and xireg also will be of use in sxcsrind, AIA should have its own separated interface when those CSRs are accessed. Signed-off-by: Kaiwen Xue Reviewed-by: Alistair Francis Signed-off-by: Atish Patra Message-ID: <20250110-counter_delegation-v5-2-e83d797ae294@rivosinc.com> Signed-off-by: Alistair Francis --- target/riscv/csr.c | 165 ++++++++++++++++++++++++++++++++++++++------- 1 file changed, 139 insertions(+), 26 deletions(-) diff --git a/target/riscv/csr.c b/target/riscv/csr.c index af9766759a..123e9fd2bd 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -29,6 +29,7 @@ #include "system/cpu-timers.h" #include "qemu/guest-random.h" #include "qapi/error.h" +#include =20 /* CSR function table public API */ void riscv_get_csr_ops(int csrno, riscv_csr_operations *ops) @@ -305,6 +306,15 @@ static RISCVException aia_any32(CPURISCVState *env, in= t csrno) return any32(env, csrno); } =20 +static RISCVException csrind_or_aia_any(CPURISCVState *env, int csrno) +{ + if (!riscv_cpu_cfg(env)->ext_smaia && !riscv_cpu_cfg(env)->ext_smcsrin= d) { + return RISCV_EXCP_ILLEGAL_INST; + } + + return any(env, csrno); +} + static RISCVException smode(CPURISCVState *env, int csrno) { if (riscv_has_ext(env, RVS)) { @@ -341,6 +351,30 @@ static RISCVException aia_smode32(CPURISCVState *env, = int csrno) return smode32(env, csrno); } =20 +static bool csrind_extensions_present(CPURISCVState *env) +{ + return riscv_cpu_cfg(env)->ext_smcsrind || riscv_cpu_cfg(env)->ext_ssc= srind; +} + +static bool aia_extensions_present(CPURISCVState *env) +{ + return riscv_cpu_cfg(env)->ext_smaia || riscv_cpu_cfg(env)->ext_ssaia; +} + +static bool csrind_or_aia_extensions_present(CPURISCVState *env) +{ + return csrind_extensions_present(env) || aia_extensions_present(env); +} + +static RISCVException csrind_or_aia_smode(CPURISCVState *env, int csrno) +{ + if (!csrind_or_aia_extensions_present(env)) { + return RISCV_EXCP_ILLEGAL_INST; + } + + return smode(env, csrno); +} + static RISCVException hmode(CPURISCVState *env, int csrno) { if (riscv_has_ext(env, RVH)) { @@ -360,6 +394,15 @@ static RISCVException hmode32(CPURISCVState *env, int = csrno) =20 } =20 +static RISCVException csrind_or_aia_hmode(CPURISCVState *env, int csrno) +{ + if (!csrind_or_aia_extensions_present(env)) { + return RISCV_EXCP_ILLEGAL_INST; + } + + return hmode(env, csrno); +} + static RISCVException umode(CPURISCVState *env, int csrno) { if (riscv_has_ext(env, RVU)) { @@ -1969,6 +2012,22 @@ static int aia_xlate_vs_csrno(CPURISCVState *env, in= t csrno) }; } =20 +static int csrind_xlate_vs_csrno(CPURISCVState *env, int csrno) +{ + if (!env->virt_enabled) { + return csrno; + } + + switch (csrno) { + case CSR_SISELECT: + return CSR_VSISELECT; + case CSR_SIREG: + return CSR_VSIREG; + default: + return csrno; + }; +} + static RISCVException rmw_xiselect(CPURISCVState *env, int csrno, target_ulong *val, target_ulong new_val, target_ulong wr_mask) @@ -1976,7 +2035,7 @@ static RISCVException rmw_xiselect(CPURISCVState *env= , int csrno, target_ulong *iselect; =20 /* Translate CSR number for VS-mode */ - csrno =3D aia_xlate_vs_csrno(env, csrno); + csrno =3D csrind_xlate_vs_csrno(env, csrno); =20 /* Find the iselect CSR based on CSR number */ switch (csrno) { @@ -2005,6 +2064,12 @@ static RISCVException rmw_xiselect(CPURISCVState *en= v, int csrno, return RISCV_EXCP_NONE; } =20 +static bool xiselect_aia_range(target_ulong isel) +{ + return (ISELECT_IPRIO0 <=3D isel && isel <=3D ISELECT_IPRIO15) || + (ISELECT_IMSIC_FIRST <=3D isel && isel <=3D ISELECT_IMSIC_LAST); +} + static int rmw_iprio(target_ulong xlen, target_ulong iselect, uint8_t *iprio, target_ulong *val, target_ulong new_val, @@ -2050,45 +2115,44 @@ static int rmw_iprio(target_ulong xlen, return 0; } =20 -static RISCVException rmw_xireg(CPURISCVState *env, int csrno, - target_ulong *val, target_ulong new_val, - target_ulong wr_mask) +static RISCVException rmw_xireg_aia(CPURISCVState *env, int csrno, + target_ulong isel, target_ulong *val, + target_ulong new_val, target_ulong wr_mask) { - bool virt, isel_reserved; - uint8_t *iprio; + bool virt =3D false, isel_reserved =3D false; int ret =3D -EINVAL; - target_ulong priv, isel, vgein; - - /* Translate CSR number for VS-mode */ - csrno =3D aia_xlate_vs_csrno(env, csrno); + uint8_t *iprio; + target_ulong priv, vgein; =20 - /* Decode register details from CSR number */ - virt =3D false; - isel_reserved =3D false; + /* VS-mode CSR number passed in has already been translated */ switch (csrno) { case CSR_MIREG: + if (!riscv_cpu_cfg(env)->ext_smaia) { + goto done; + } iprio =3D env->miprio; - isel =3D env->miselect; priv =3D PRV_M; break; case CSR_SIREG: - if (env->priv =3D=3D PRV_S && env->mvien & MIP_SEIP && + if (!riscv_cpu_cfg(env)->ext_ssaia || + (env->priv =3D=3D PRV_S && env->mvien & MIP_SEIP && env->siselect >=3D ISELECT_IMSIC_EIDELIVERY && - env->siselect <=3D ISELECT_IMSIC_EIE63) { + env->siselect <=3D ISELECT_IMSIC_EIE63)) { goto done; } iprio =3D env->siprio; - isel =3D env->siselect; priv =3D PRV_S; break; case CSR_VSIREG: + if (!riscv_cpu_cfg(env)->ext_ssaia) { + goto done; + } iprio =3D env->hviprio; - isel =3D env->vsiselect; priv =3D PRV_S; virt =3D true; break; default: - goto done; + goto done; }; =20 /* Find the selected guest interrupt file */ @@ -2119,10 +2183,54 @@ static RISCVException rmw_xireg(CPURISCVState *env,= int csrno, } =20 done: + /* + * If AIA is not enabled, illegal instruction exception is always + * returned regardless of whether we are in VS-mode or not + */ if (ret) { return (env->virt_enabled && virt && !isel_reserved) ? RISCV_EXCP_VIRT_INSTRUCTION_FAULT : RISCV_EXCP_ILLEGAL_INST; } + + return RISCV_EXCP_NONE; +} + +static RISCVException rmw_xireg(CPURISCVState *env, int csrno, + target_ulong *val, target_ulong new_val, + target_ulong wr_mask) +{ + bool virt =3D false; + int ret =3D -EINVAL; + target_ulong isel; + + /* Translate CSR number for VS-mode */ + csrno =3D csrind_xlate_vs_csrno(env, csrno); + + /* Decode register details from CSR number */ + switch (csrno) { + case CSR_MIREG: + isel =3D env->miselect; + break; + case CSR_SIREG: + isel =3D env->siselect; + break; + case CSR_VSIREG: + isel =3D env->vsiselect; + virt =3D true; + break; + default: + goto done; + }; + + if (xiselect_aia_range(isel)) { + return rmw_xireg_aia(env, csrno, isel, val, new_val, wr_mask); + } + +done: + if (ret) { + return (env->virt_enabled && virt) ? + RISCV_EXCP_VIRT_INSTRUCTION_FAULT : RISCV_EXCP_ILLEGAL_INST; + } return RISCV_EXCP_NONE; } =20 @@ -4866,8 +4974,10 @@ riscv_csr_operations csr_ops[CSR_TABLE_SIZE] =3D { [CSR_MIP] =3D { "mip", any, NULL, NULL, rmw_mip }, =20 /* Machine-Level Window to Indirectly Accessed Registers (AIA) */ - [CSR_MISELECT] =3D { "miselect", aia_any, NULL, NULL, rmw_xiselec= t }, - [CSR_MIREG] =3D { "mireg", aia_any, NULL, NULL, rmw_xireg }, + [CSR_MISELECT] =3D { "miselect", csrind_or_aia_any, NULL, NULL, + rmw_xiselect }, + [CSR_MIREG] =3D { "mireg", csrind_or_aia_any, NULL, NULL, + rmw_xireg }, =20 /* Machine-Level Interrupts (AIA) */ [CSR_MTOPEI] =3D { "mtopei", aia_any, NULL, NULL, rmw_xtopei }, @@ -4995,8 +5105,10 @@ riscv_csr_operations csr_ops[CSR_TABLE_SIZE] =3D { [CSR_SATP] =3D { "satp", satp, read_satp, write_satp }, =20 /* Supervisor-Level Window to Indirectly Accessed Registers (AIA) */ - [CSR_SISELECT] =3D { "siselect", aia_smode, NULL, NULL, rmw_xisele= ct }, - [CSR_SIREG] =3D { "sireg", aia_smode, NULL, NULL, rmw_xireg = }, + [CSR_SISELECT] =3D { "siselect", csrind_or_aia_smode, NULL, NULL, + rmw_xiselect = }, + [CSR_SIREG] =3D { "sireg", csrind_or_aia_smode, NULL, NULL, + rmw_xireg = }, =20 /* Supervisor-Level Interrupts (AIA) */ [CSR_STOPEI] =3D { "stopei", aia_smode, NULL, NULL, rmw_xtopei= }, @@ -5075,9 +5187,10 @@ riscv_csr_operations csr_ops[CSR_TABLE_SIZE] =3D { /* * VS-Level Window to Indirectly Accessed Registers (H-extension with = AIA) */ - [CSR_VSISELECT] =3D { "vsiselect", aia_hmode, NULL, NULL, - rmw_xiselect = }, - [CSR_VSIREG] =3D { "vsireg", aia_hmode, NULL, NULL, rmw_xire= g }, + [CSR_VSISELECT] =3D { "vsiselect", csrind_or_aia_hmode, NULL, NULL, + rmw_xiselect = }, + [CSR_VSIREG] =3D { "vsireg", csrind_or_aia_hmode, NULL, NULL, + rmw_xireg = }, =20 /* VS-Level Interrupts (H-extension with AIA) */ [CSR_VSTOPEI] =3D { "vstopei", aia_hmode, NULL, NULL, rmw_xtop= ei }, --=20 2.47.1