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Tsirkin" , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Mark Cave-Ayland , Peter Maydell , Pierrick Bouvier , =?UTF-8?q?Alex=20Benn=C3=A9e?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH v2 1/2] hw/char/serial: Ensure SerialState::irq is set when realizing Date: Fri, 10 Jan 2025 19:27:58 +0100 Message-ID: <20250110182759.84071-2-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250110182759.84071-1-philmd@linaro.org> References: <20250110182759.84071-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=philmd@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1736533734870019000 SerialState::irq must be set by parent when the object is realized. Suggested-by: Paolo Bonzini Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Pierrick Bouvier --- hw/char/serial-pci-multi.c | 2 +- hw/char/serial-pci.c | 2 +- hw/char/serial.c | 2 ++ 3 files changed, 4 insertions(+), 2 deletions(-) diff --git a/hw/char/serial-pci-multi.c b/hw/char/serial-pci-multi.c index 7578e863cfe..5ad2c0e8443 100644 --- a/hw/char/serial-pci-multi.c +++ b/hw/char/serial-pci-multi.c @@ -106,11 +106,11 @@ static void multi_serial_pci_realize(PCIDevice *dev, = Error **errp) =20 for (i =3D 0; i < nports; i++) { s =3D pci->state + i; + s->irq =3D pci->irqs[i]; if (!qdev_realize(DEVICE(s), NULL, errp)) { multi_serial_pci_exit(dev); return; } - s->irq =3D pci->irqs[i]; pci->name[i] =3D g_strdup_printf("uart #%zu", i + 1); memory_region_init_io(&s->io, OBJECT(pci), &serial_io_ops, s, pci->name[i], 8); diff --git a/hw/char/serial-pci.c b/hw/char/serial-pci.c index 6659cef5d4b..d31a3ccf03b 100644 --- a/hw/char/serial-pci.c +++ b/hw/char/serial-pci.c @@ -49,13 +49,13 @@ static void serial_pci_realize(PCIDevice *dev, Error **= errp) PCISerialState *pci =3D DO_UPCAST(PCISerialState, dev, dev); SerialState *s =3D &pci->state; =20 + s->irq =3D pci_allocate_irq(&pci->dev); if (!qdev_realize(DEVICE(s), NULL, errp)) { return; } =20 pci->dev.config[PCI_CLASS_PROG] =3D pci->prog_if; pci->dev.config[PCI_INTERRUPT_PIN] =3D 0x01; - s->irq =3D pci_allocate_irq(&pci->dev); =20 memory_region_init_io(&s->io, OBJECT(pci), &serial_io_ops, s, "serial"= , 8); pci_register_bar(&pci->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io); diff --git a/hw/char/serial.c b/hw/char/serial.c index 70044e14a0f..562931685e7 100644 --- a/hw/char/serial.c +++ b/hw/char/serial.c @@ -923,6 +923,8 @@ static void serial_realize(DeviceState *dev, Error **er= rp) { SerialState *s =3D SERIAL(dev); =20 + assert(s->irq); + s->modem_status_poll =3D timer_new_ns(QEMU_CLOCK_VIRTUAL, (QEMUTimerCB= *) serial_update_msl, s); =20 s->fifo_timeout_timer =3D timer_new_ns(QEMU_CLOCK_VIRTUAL, (QEMUTimerC= B *) fifo_timeout_int, s); --=20 2.47.1