From nobody Mon Apr 7 00:55:10 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1736405957838569.8180936396866; Wed, 8 Jan 2025 22:59:17 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tVmUp-00044O-Vp; Thu, 09 Jan 2025 01:58:24 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tVmUo-000435-20 for qemu-devel@nongnu.org; Thu, 09 Jan 2025 01:58:22 -0500 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tVmUl-0000TA-Dc for qemu-devel@nongnu.org; Thu, 09 Jan 2025 01:58:21 -0500 Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8AxaeGDc39nV3BgAA--.57720S3; Thu, 09 Jan 2025 14:58:11 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowMCxXMV8c39nCtkaAA--.46678S8; Thu, 09 Jan 2025 14:58:11 +0800 (CST) From: Bibo Mao To: Stefan Hajnoczi Cc: qemu-devel@nongnu.org, Song Gao Subject: [PULL 6/6] hw/intc/loongarch_extioi: Add irq routing support from physical id Date: Thu, 9 Jan 2025 14:58:04 +0800 Message-Id: <20250109065804.1569654-7-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250109065804.1569654-1-maobibo@loongson.cn> References: <20250109065804.1569654-1-maobibo@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowMCxXMV8c39nCtkaAA--.46678S8 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1736405959474116600 Content-Type: text/plain; charset="utf-8" The simliar with IPI interrupt controller, physical cpu id is used for irq routing for extioi interrupt controller. Signed-off-by: Bibo Mao Reviewed-by: Bibo Mao --- hw/intc/loongarch_extioi.c | 30 ++++++++++++++++++++++++++---- 1 file changed, 26 insertions(+), 4 deletions(-) diff --git a/hw/intc/loongarch_extioi.c b/hw/intc/loongarch_extioi.c index d18f47def7..f3055ec4d2 100644 --- a/hw/intc/loongarch_extioi.c +++ b/hw/intc/loongarch_extioi.c @@ -15,6 +15,23 @@ #include "hw/intc/loongarch_extioi.h" #include "trace.h" =20 +static int extioi_get_index_from_archid(LoongArchExtIOICommonState *s, + uint64_t arch_id) +{ + int i; + + for (i =3D 0; i < s->num_cpu; i++) { + if (s->cpu[i].arch_id =3D=3D arch_id) { + break; + } + } + + if ((i < s->num_cpu) && s->cpu[i].cpu) { + return i; + } + + return -1; +} =20 static void extioi_update_irq(LoongArchExtIOICommonState *s, int irq, int = level) { @@ -125,7 +142,7 @@ static inline void extioi_enable_irq(LoongArchExtIOICom= monState *s, int index,\ static inline void extioi_update_sw_coremap(LoongArchExtIOICommonState *s, int irq, uint64_t val, bool no= tify) { - int i, cpu; + int i, cpu, cpuid; =20 /* * loongarch only support little endian, @@ -134,12 +151,17 @@ static inline void extioi_update_sw_coremap(LoongArch= ExtIOICommonState *s, val =3D cpu_to_le64(val); =20 for (i =3D 0; i < 4; i++) { - cpu =3D val & 0xff; + cpuid =3D val & 0xff; val =3D val >> 8; =20 if (!(s->status & BIT(EXTIOI_ENABLE_CPU_ENCODE))) { - cpu =3D ctz32(cpu); - cpu =3D (cpu >=3D 4) ? 0 : cpu; + cpuid =3D ctz32(cpuid); + cpuid =3D (cpuid >=3D 4) ? 0 : cpuid; + } + + cpu =3D extioi_get_index_from_archid(s, cpuid); + if (cpu < 0) { + continue; } =20 if (s->sw_coremap[irq + i] =3D=3D cpu) { --=20 2.43.5