From nobody Sun Apr 6 03:33:02 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 173640597150785.34145171711896; Wed, 8 Jan 2025 22:59:31 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tVmUp-00043Z-Vo; Thu, 09 Jan 2025 01:58:24 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tVmUn-000432-VT for qemu-devel@nongnu.org; Thu, 09 Jan 2025 01:58:21 -0500 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tVmUl-0000TD-Da for qemu-devel@nongnu.org; Thu, 09 Jan 2025 01:58:21 -0500 Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8CxG6x_c39nSnBgAA--.3896S3; Thu, 09 Jan 2025 14:58:07 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowMCxXMV8c39nCtkaAA--.46678S3; Thu, 09 Jan 2025 14:58:07 +0800 (CST) From: Bibo Mao To: Stefan Hajnoczi Cc: qemu-devel@nongnu.org, Song Gao , Jiaxun Yang , Richard Henderson Subject: [PULL 1/6] hw/core/loader: Use ssize_t for efi zboot unpacker Date: Thu, 9 Jan 2025 14:57:59 +0800 Message-Id: <20250109065804.1569654-2-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250109065804.1569654-1-maobibo@loongson.cn> References: <20250109065804.1569654-1-maobibo@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowMCxXMV8c39nCtkaAA--.46678S3 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1736405972644116600 Content-Type: text/plain; charset="utf-8" From: Jiaxun Yang Convert to use sszie_t to represent size internally to avoid large image overflowing the size. Suggested-by: Richard Henderson Signed-off-by: Jiaxun Yang Signed-off-by: Bibo Mao Reviewed-by: Bibo Mao --- hw/arm/boot.c | 2 +- hw/core/loader.c | 4 ++-- include/hw/loader.h | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/hw/arm/boot.c b/hw/arm/boot.c index 68fe8654e6..b44bea8a82 100644 --- a/hw/arm/boot.c +++ b/hw/arm/boot.c @@ -857,7 +857,7 @@ static uint64_t load_aarch64_image(const char *filename= , hwaddr mem_base, hwaddr kernel_load_offset =3D KERNEL64_LOAD_ADDR; uint64_t kernel_size =3D 0; uint8_t *buffer; - int size; + ssize_t size; =20 /* On aarch64, it's the bootloader's job to uncompress the kernel. */ size =3D load_image_gzipped_buffer(filename, LOAD_IMAGE_MAX_GUNZIP_BYT= ES, diff --git a/hw/core/loader.c b/hw/core/loader.c index c0407e2d0d..4dfdb027ee 100644 --- a/hw/core/loader.c +++ b/hw/core/loader.c @@ -886,11 +886,11 @@ struct linux_efi_zboot_header { * * If the image is not a Linux EFI zboot image, do nothing and return succ= ess. */ -ssize_t unpack_efi_zboot_image(uint8_t **buffer, int *size) +ssize_t unpack_efi_zboot_image(uint8_t **buffer, ssize_t *size) { const struct linux_efi_zboot_header *header; uint8_t *data =3D NULL; - int ploff, plsize; + ssize_t ploff, plsize; ssize_t bytes; =20 /* ignore if this is too small to be a EFI zboot image */ diff --git a/include/hw/loader.h b/include/hw/loader.h index 7f6d06b956..8985046be4 100644 --- a/include/hw/loader.h +++ b/include/hw/loader.h @@ -101,7 +101,7 @@ ssize_t load_image_gzipped_buffer(const char *filename,= uint64_t max_sz, * Returns the size of the decompressed payload if decompression was perfo= rmed * successfully. */ -ssize_t unpack_efi_zboot_image(uint8_t **buffer, int *size); +ssize_t unpack_efi_zboot_image(uint8_t **buffer, ssize_t *size); =20 #define ELF_LOAD_FAILED -1 #define ELF_LOAD_NOT_ELF -2 --=20 2.43.5 From nobody Sun Apr 6 03:33:02 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1736405964308267.39628373461255; Wed, 8 Jan 2025 22:59:24 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tVmUs-00045b-GR; Thu, 09 Jan 2025 01:58:26 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tVmUp-00044N-Fr for qemu-devel@nongnu.org; Thu, 09 Jan 2025 01:58:23 -0500 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tVmUm-0000T1-BK for qemu-devel@nongnu.org; Thu, 09 Jan 2025 01:58:23 -0500 Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8Bx++GCc39nTXBgAA--.57608S3; Thu, 09 Jan 2025 14:58:10 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowMCxXMV8c39nCtkaAA--.46678S4; Thu, 09 Jan 2025 14:58:07 +0800 (CST) From: Bibo Mao To: Stefan Hajnoczi Cc: qemu-devel@nongnu.org, Song Gao , Jiaxun Yang Subject: [PULL 2/6] hw/loongarch/boot: Support Linux raw boot image Date: Thu, 9 Jan 2025 14:58:00 +0800 Message-Id: <20250109065804.1569654-3-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250109065804.1569654-1-maobibo@loongson.cn> References: <20250109065804.1569654-1-maobibo@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowMCxXMV8c39nCtkaAA--.46678S4 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1736405966701116600 Content-Type: text/plain; charset="utf-8" From: Jiaxun Yang Support booting such image by parsing header as per Linux's specification [1]. This enabled booting vmlinux.efi/vmlinuz.efi shipped by distros without supplying BIOS. [1]: https://docs.kernel.org/arch/loongarch/booting.html Signed-off-by: Jiaxun Yang Signed-off-by: Bibo Mao Reviewed-by: Bibo Mao --- hw/loongarch/boot.c | 69 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 69 insertions(+) diff --git a/hw/loongarch/boot.c b/hw/loongarch/boot.c index 48154cdce6..241c0eef1f 100644 --- a/hw/loongarch/boot.c +++ b/hw/loongarch/boot.c @@ -15,6 +15,26 @@ #include "system/reset.h" #include "system/qtest.h" =20 +/* + * Linux Image Format + * https://docs.kernel.org/arch/loongarch/booting.html + */ +#define LINUX_PE_MAGIC 0x818223cd +#define MZ_MAGIC 0x5a4d /* "MZ" */ + +struct loongarch_linux_hdr { + uint32_t mz_magic; + uint32_t res0; + uint64_t kernel_entry; + uint64_t kernel_size; + uint64_t load_offset; + uint64_t res1; + uint64_t res2; + uint64_t res3; + uint32_t linux_pe_magic; + uint32_t pe_header_offset; +} QEMU_PACKED; + struct memmap_entry *memmap_table; unsigned memmap_entries; =20 @@ -171,6 +191,50 @@ static uint64_t cpu_loongarch_virt_to_phys(void *opaqu= e, uint64_t addr) return addr & MAKE_64BIT_MASK(0, TARGET_PHYS_ADDR_SPACE_BITS); } =20 +static int64_t load_loongarch_linux_image(const char *filename, + uint64_t *kernel_entry, + uint64_t *kernel_low, + uint64_t *kernel_high) +{ + gsize len; + ssize_t size; + uint8_t *buffer; + struct loongarch_linux_hdr *hdr; + + /* Load as raw file otherwise */ + if (!g_file_get_contents(filename, (char **)&buffer, &len, NULL)) { + return -1; + } + size =3D len; + + /* Unpack the image if it is a EFI zboot image */ + if (unpack_efi_zboot_image(&buffer, &size) < 0) { + g_free(buffer); + return -1; + } + + hdr =3D (struct loongarch_linux_hdr *)buffer; + + if (extract32(le32_to_cpu(hdr->mz_magic), 0, 16) !=3D MZ_MAGIC || + le32_to_cpu(hdr->linux_pe_magic) !=3D LINUX_PE_MAGIC) { + g_free(buffer); + return -1; + } + + /* Early kernel versions may have those fields in virtual address */ + *kernel_entry =3D extract64(le64_to_cpu(hdr->kernel_entry), + 0, TARGET_PHYS_ADDR_SPACE_BITS); + *kernel_low =3D extract64(le64_to_cpu(hdr->load_offset), + 0, TARGET_PHYS_ADDR_SPACE_BITS); + *kernel_high =3D *kernel_low + size; + + rom_add_blob_fixed(filename, buffer, size, *kernel_low); + + g_free(buffer); + + return size; +} + static int64_t load_kernel_info(struct loongarch_boot_info *info) { uint64_t kernel_entry, kernel_low, kernel_high; @@ -181,6 +245,11 @@ static int64_t load_kernel_info(struct loongarch_boot_= info *info) &kernel_entry, &kernel_low, &kernel_high, NULL, 0, EM_LOONGARCH, 1, 0); + if (kernel_size < 0) { + kernel_size =3D load_loongarch_linux_image(info->kernel_filename, + &kernel_entry, &kernel_lo= w, + &kernel_high); + } =20 if (kernel_size < 0) { error_report("could not load kernel '%s': %s", --=20 2.43.5 From nobody Sun Apr 6 03:33:02 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1736405977762462.37320644341116; Wed, 8 Jan 2025 22:59:37 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tVmUt-00045u-Lq; Thu, 09 Jan 2025 01:58:27 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tVmUp-00044M-FW for qemu-devel@nongnu.org; Thu, 09 Jan 2025 01:58:23 -0500 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tVmUn-0000V2-DL for qemu-devel@nongnu.org; Thu, 09 Jan 2025 01:58:23 -0500 Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8DxmeGCc39nUnBgAA--.61944S3; Thu, 09 Jan 2025 14:58:10 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowMCxXMV8c39nCtkaAA--.46678S5; Thu, 09 Jan 2025 14:58:10 +0800 (CST) From: Bibo Mao To: Stefan Hajnoczi Cc: qemu-devel@nongnu.org, Song Gao Subject: [PULL 3/6] target/loongarch: Only support 64bit pte width Date: Thu, 9 Jan 2025 14:58:01 +0800 Message-Id: <20250109065804.1569654-4-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250109065804.1569654-1-maobibo@loongson.cn> References: <20250109065804.1569654-1-maobibo@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowMCxXMV8c39nCtkaAA--.46678S5 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1736405978618116600 Content-Type: text/plain; charset="utf-8" iFrom LoongArch Reference Manual pte width can be 64bit, 128bit or more. Instead real hardware only supports 64bit pte width. For 12bit pte, there is no detail definition for all 128bit from manual. Here only 64bit pte width is supported for simplicity, will add this in later if real hw support it and there is definition for all the bits from manual. Signed-off-by: Bibo Mao Reviewed-by: Bibo Mao --- target/loongarch/helper.h | 1 + target/loongarch/tcg/csr_helper.c | 21 +++++++++++++++++++ .../tcg/insn_trans/trans_privileged.c.inc | 2 +- target/loongarch/tcg/tlb_helper.c | 17 +++------------ 4 files changed, 26 insertions(+), 15 deletions(-) diff --git a/target/loongarch/helper.h b/target/loongarch/helper.h index b3b64a0215..943517b5f2 100644 --- a/target/loongarch/helper.h +++ b/target/loongarch/helper.h @@ -104,6 +104,7 @@ DEF_HELPER_2(csrwr_estat, i64, env, tl) DEF_HELPER_2(csrwr_asid, i64, env, tl) DEF_HELPER_2(csrwr_tcfg, i64, env, tl) DEF_HELPER_2(csrwr_ticlr, i64, env, tl) +DEF_HELPER_2(csrwr_pwcl, i64, env, tl) DEF_HELPER_2(iocsrrd_b, i64, env, tl) DEF_HELPER_2(iocsrrd_h, i64, env, tl) DEF_HELPER_2(iocsrrd_w, i64, env, tl) diff --git a/target/loongarch/tcg/csr_helper.c b/target/loongarch/tcg/csr_h= elper.c index 15f94caefa..6c95be9910 100644 --- a/target/loongarch/tcg/csr_helper.c +++ b/target/loongarch/tcg/csr_helper.c @@ -6,6 +6,7 @@ */ =20 #include "qemu/osdep.h" +#include "qemu/log.h" #include "qemu/main-loop.h" #include "cpu.h" #include "internals.h" @@ -95,3 +96,23 @@ target_ulong helper_csrwr_ticlr(CPULoongArchState *env, = target_ulong val) } return old_v; } + +target_ulong helper_csrwr_pwcl(CPULoongArchState *env, target_ulong val) +{ + int shift; + int64_t old_v =3D env->CSR_PWCL; + + /* + * The real hardware only supports 64bit PTE width now, 128bit or othe= rs + * treated as illegal. + */ + shift =3D FIELD_EX64(val, CSR_PWCL, PTEWIDTH); + if (shift) { + qemu_log_mask(LOG_GUEST_ERROR, + "Attempted set pte width with %d bit\n", 64 << shift= ); + val =3D FIELD_DP64(val, CSR_PWCL, PTEWIDTH, 0); + } + + env->CSR_PWCL =3D val; + return old_v; +} diff --git a/target/loongarch/tcg/insn_trans/trans_privileged.c.inc b/targe= t/loongarch/tcg/insn_trans/trans_privileged.c.inc index 7e4ec93edb..30f9b83fb2 100644 --- a/target/loongarch/tcg/insn_trans/trans_privileged.c.inc +++ b/target/loongarch/tcg/insn_trans/trans_privileged.c.inc @@ -95,7 +95,7 @@ static const CSRInfo csr_info[] =3D { CSR_OFF(PGDL), CSR_OFF(PGDH), CSR_OFF_FUNCS(PGD, CSRFL_READONLY, gen_helper_csrrd_pgd, NULL), - CSR_OFF(PWCL), + CSR_OFF_FUNCS(PWCL, 0, NULL, gen_helper_csrwr_pwcl), CSR_OFF(PWCH), CSR_OFF(STLBPS), CSR_OFF(RVACFG), diff --git a/target/loongarch/tcg/tlb_helper.c b/target/loongarch/tcg/tlb_h= elper.c index 97f38fc391..8c61fe728c 100644 --- a/target/loongarch/tcg/tlb_helper.c +++ b/target/loongarch/tcg/tlb_helper.c @@ -512,7 +512,6 @@ target_ulong helper_lddir(CPULoongArchState *env, targe= t_ulong base, { CPUState *cs =3D env_cpu(env); target_ulong badvaddr, index, phys, ret; - int shift; uint64_t dir_base, dir_width; =20 if (unlikely((level =3D=3D 0) || (level > 4))) { @@ -537,14 +536,9 @@ target_ulong helper_lddir(CPULoongArchState *env, targ= et_ulong base, =20 badvaddr =3D env->CSR_TLBRBADV; base =3D base & TARGET_PHYS_MASK; - - /* 0:64bit, 1:128bit, 2:192bit, 3:256bit */ - shift =3D FIELD_EX64(env->CSR_PWCL, CSR_PWCL, PTEWIDTH); - shift =3D (shift + 1) * 3; - get_dir_base_width(env, &dir_base, &dir_width, level); index =3D (badvaddr >> dir_base) & ((1 << dir_width) - 1); - phys =3D base | index << shift; + phys =3D base | index << 3; ret =3D ldq_phys(cs->as, phys) & TARGET_PHYS_MASK; return ret; } @@ -554,7 +548,6 @@ void helper_ldpte(CPULoongArchState *env, target_ulong = base, target_ulong odd, { CPUState *cs =3D env_cpu(env); target_ulong phys, tmp0, ptindex, ptoffset0, ptoffset1, ps, badv; - int shift; uint64_t ptbase =3D FIELD_EX64(env->CSR_PWCL, CSR_PWCL, PTBASE); uint64_t ptwidth =3D FIELD_EX64(env->CSR_PWCL, CSR_PWCL, PTWIDTH); uint64_t dir_base, dir_width; @@ -595,16 +588,12 @@ void helper_ldpte(CPULoongArchState *env, target_ulon= g base, target_ulong odd, tmp0 +=3D MAKE_64BIT_MASK(ps, 1); } } else { - /* 0:64bit, 1:128bit, 2:192bit, 3:256bit */ - shift =3D FIELD_EX64(env->CSR_PWCL, CSR_PWCL, PTEWIDTH); - shift =3D (shift + 1) * 3; badv =3D env->CSR_TLBRBADV; =20 ptindex =3D (badv >> ptbase) & ((1 << ptwidth) - 1); ptindex =3D ptindex & ~0x1; /* clear bit 0 */ - ptoffset0 =3D ptindex << shift; - ptoffset1 =3D (ptindex + 1) << shift; - + ptoffset0 =3D ptindex << 3; + ptoffset1 =3D (ptindex + 1) << 3; phys =3D base | (odd ? ptoffset1 : ptoffset0); tmp0 =3D ldq_phys(cs->as, phys) & TARGET_PHYS_MASK; ps =3D ptbase; --=20 2.43.5 From nobody Sun Apr 6 03:33:02 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1736405978747654.4454339121661; Wed, 8 Jan 2025 22:59:38 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tVmUq-00044p-OL; Thu, 09 Jan 2025 01:58:24 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tVmUp-00043g-87 for qemu-devel@nongnu.org; Thu, 09 Jan 2025 01:58:23 -0500 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tVmUl-0000T6-VR for qemu-devel@nongnu.org; Thu, 09 Jan 2025 01:58:22 -0500 Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8Dxfa+Dc39nU3BgAA--.34280S3; Thu, 09 Jan 2025 14:58:11 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowMCxXMV8c39nCtkaAA--.46678S6; Thu, 09 Jan 2025 14:58:10 +0800 (CST) From: Bibo Mao To: Stefan Hajnoczi Cc: qemu-devel@nongnu.org, Song Gao Subject: [PULL 4/6] hw/intc/loongarch_extioi: Get cpu number from possible_cpu_arch_ids Date: Thu, 9 Jan 2025 14:58:02 +0800 Message-Id: <20250109065804.1569654-5-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250109065804.1569654-1-maobibo@loongson.cn> References: <20250109065804.1569654-1-maobibo@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowMCxXMV8c39nCtkaAA--.46678S6 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1736405980463116600 Content-Type: text/plain; charset="utf-8" Supported CPU number can be acquired from function possible_cpu_arch_ids(), cpu-num property is not necessary. Signed-off-by: Bibo Mao Reviewed-by: Bibo Mao --- hw/intc/loongarch_extioi.c | 6 ------ hw/intc/loongarch_extioi_common.c | 17 +++++++++++++++-- include/hw/intc/loongarch_extioi_common.h | 2 ++ 3 files changed, 17 insertions(+), 8 deletions(-) diff --git a/hw/intc/loongarch_extioi.c b/hw/intc/loongarch_extioi.c index 4a1a7c357c..d18f47def7 100644 --- a/hw/intc/loongarch_extioi.c +++ b/hw/intc/loongarch_extioi.c @@ -347,12 +347,6 @@ static void loongarch_extioi_realize(DeviceState *dev,= Error **errp) s->status |=3D BIT(EXTIOI_ENABLE); } =20 - s->cpu =3D g_new0(ExtIOICore, s->num_cpu); - if (s->cpu =3D=3D NULL) { - error_setg(errp, "Memory allocation for ExtIOICore faile"); - return; - } - for (i =3D 0; i < s->num_cpu; i++) { for (pin =3D 0; pin < LS3A_INTC_IP; pin++) { qdev_init_gpio_out(dev, &s->cpu[i].parent_irq[pin], 1); diff --git a/hw/intc/loongarch_extioi_common.c b/hw/intc/loongarch_extioi_c= ommon.c index e4c1cc3c98..99a091e30b 100644 --- a/hw/intc/loongarch_extioi_common.c +++ b/hw/intc/loongarch_extioi_common.c @@ -13,11 +13,24 @@ static void loongarch_extioi_common_realize(DeviceState *dev, Error **errp) { LoongArchExtIOICommonState *s =3D (LoongArchExtIOICommonState *)dev; + MachineState *machine =3D MACHINE(qdev_get_machine()); + MachineClass *mc =3D MACHINE_GET_CLASS(machine); + const CPUArchIdList *id_list; + int i; =20 - if (s->num_cpu =3D=3D 0) { - error_setg(errp, "num-cpu must be at least 1"); + assert(mc->possible_cpu_arch_ids); + id_list =3D mc->possible_cpu_arch_ids(machine); + s->num_cpu =3D id_list->len; + s->cpu =3D g_new0(ExtIOICore, s->num_cpu); + if (s->cpu =3D=3D NULL) { + error_setg(errp, "Memory allocation for ExtIOICore faile"); return; } + + for (i =3D 0; i < s->num_cpu; i++) { + s->cpu[i].arch_id =3D id_list->cpus[i].arch_id; + s->cpu[i].cpu =3D CPU(id_list->cpus[i].cpu); + } } =20 static int loongarch_extioi_common_pre_save(void *opaque) diff --git a/include/hw/intc/loongarch_extioi_common.h b/include/hw/intc/lo= ongarch_extioi_common.h index f6bc778a85..22d7880977 100644 --- a/include/hw/intc/loongarch_extioi_common.h +++ b/include/hw/intc/loongarch_extioi_common.h @@ -65,6 +65,8 @@ typedef struct ExtIOICore { uint32_t coreisr[EXTIOI_IRQS_GROUP_COUNT]; DECLARE_BITMAP(sw_isr[LS3A_INTC_IP], EXTIOI_IRQS); qemu_irq parent_irq[LS3A_INTC_IP]; + uint64_t arch_id; + CPUState *cpu; } ExtIOICore; =20 struct LoongArchExtIOICommonState { --=20 2.43.5 From nobody Sun Apr 6 03:33:02 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1736405989901295.2990963804999; Wed, 8 Jan 2025 22:59:49 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tVmUr-00045G-Hj; Thu, 09 Jan 2025 01:58:25 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tVmUp-00043f-86 for qemu-devel@nongnu.org; Thu, 09 Jan 2025 01:58:23 -0500 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tVmUl-0000T8-VZ for qemu-devel@nongnu.org; Thu, 09 Jan 2025 01:58:22 -0500 Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8BxuuGDc39nVXBgAA--.62131S3; Thu, 09 Jan 2025 14:58:11 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowMCxXMV8c39nCtkaAA--.46678S7; Thu, 09 Jan 2025 14:58:11 +0800 (CST) From: Bibo Mao To: Stefan Hajnoczi Cc: qemu-devel@nongnu.org, Song Gao Subject: [PULL 5/6] hw/intc/loongarch_extioi: Remove num-cpu property Date: Thu, 9 Jan 2025 14:58:03 +0800 Message-Id: <20250109065804.1569654-6-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250109065804.1569654-1-maobibo@loongson.cn> References: <20250109065804.1569654-1-maobibo@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowMCxXMV8c39nCtkaAA--.46678S7 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1736405990472116600 Content-Type: text/plain; charset="utf-8" Since cpu number can be acquired from possible_cpu_arch_ids(), num-cpu property is not necessary. Here remove num-cpu property for object TYPE_LOONGARCH_EXTIOI_COMMON object. Signed-off-by: Bibo Mao Reviewed-by: Bibo Mao --- hw/intc/loongarch_extioi_common.c | 1 - hw/loongarch/virt.c | 1 - 2 files changed, 2 deletions(-) diff --git a/hw/intc/loongarch_extioi_common.c b/hw/intc/loongarch_extioi_c= ommon.c index 99a091e30b..fd56253d10 100644 --- a/hw/intc/loongarch_extioi_common.c +++ b/hw/intc/loongarch_extioi_common.c @@ -95,7 +95,6 @@ static const VMStateDescription vmstate_loongarch_extioi = =3D { }; =20 static const Property extioi_properties[] =3D { - DEFINE_PROP_UINT32("num-cpu", LoongArchExtIOICommonState, num_cpu, 1), DEFINE_PROP_BIT("has-virtualization-extension", LoongArchExtIOICommonS= tate, features, EXTIOI_HAS_VIRT_EXTENSION, 0), }; diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c index 60bd4dc9d3..df56d75a6e 100644 --- a/hw/loongarch/virt.c +++ b/hw/loongarch/virt.c @@ -921,7 +921,6 @@ static void virt_irq_init(LoongArchVirtMachineState *lv= ms) =20 /* Create EXTIOI device */ extioi =3D qdev_new(TYPE_LOONGARCH_EXTIOI); - qdev_prop_set_uint32(extioi, "num-cpu", ms->smp.cpus); if (virt_is_veiointc_enabled(lvms)) { qdev_prop_set_bit(extioi, "has-virtualization-extension", true); } --=20 2.43.5 From nobody Sun Apr 6 03:33:02 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1736405957838569.8180936396866; Wed, 8 Jan 2025 22:59:17 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tVmUp-00044O-Vp; Thu, 09 Jan 2025 01:58:24 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tVmUo-000435-20 for qemu-devel@nongnu.org; Thu, 09 Jan 2025 01:58:22 -0500 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tVmUl-0000TA-Dc for qemu-devel@nongnu.org; Thu, 09 Jan 2025 01:58:21 -0500 Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8AxaeGDc39nV3BgAA--.57720S3; Thu, 09 Jan 2025 14:58:11 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowMCxXMV8c39nCtkaAA--.46678S8; Thu, 09 Jan 2025 14:58:11 +0800 (CST) From: Bibo Mao To: Stefan Hajnoczi Cc: qemu-devel@nongnu.org, Song Gao Subject: [PULL 6/6] hw/intc/loongarch_extioi: Add irq routing support from physical id Date: Thu, 9 Jan 2025 14:58:04 +0800 Message-Id: <20250109065804.1569654-7-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250109065804.1569654-1-maobibo@loongson.cn> References: <20250109065804.1569654-1-maobibo@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowMCxXMV8c39nCtkaAA--.46678S8 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1736405959474116600 Content-Type: text/plain; charset="utf-8" The simliar with IPI interrupt controller, physical cpu id is used for irq routing for extioi interrupt controller. Signed-off-by: Bibo Mao Reviewed-by: Bibo Mao --- hw/intc/loongarch_extioi.c | 30 ++++++++++++++++++++++++++---- 1 file changed, 26 insertions(+), 4 deletions(-) diff --git a/hw/intc/loongarch_extioi.c b/hw/intc/loongarch_extioi.c index d18f47def7..f3055ec4d2 100644 --- a/hw/intc/loongarch_extioi.c +++ b/hw/intc/loongarch_extioi.c @@ -15,6 +15,23 @@ #include "hw/intc/loongarch_extioi.h" #include "trace.h" =20 +static int extioi_get_index_from_archid(LoongArchExtIOICommonState *s, + uint64_t arch_id) +{ + int i; + + for (i =3D 0; i < s->num_cpu; i++) { + if (s->cpu[i].arch_id =3D=3D arch_id) { + break; + } + } + + if ((i < s->num_cpu) && s->cpu[i].cpu) { + return i; + } + + return -1; +} =20 static void extioi_update_irq(LoongArchExtIOICommonState *s, int irq, int = level) { @@ -125,7 +142,7 @@ static inline void extioi_enable_irq(LoongArchExtIOICom= monState *s, int index,\ static inline void extioi_update_sw_coremap(LoongArchExtIOICommonState *s, int irq, uint64_t val, bool no= tify) { - int i, cpu; + int i, cpu, cpuid; =20 /* * loongarch only support little endian, @@ -134,12 +151,17 @@ static inline void extioi_update_sw_coremap(LoongArch= ExtIOICommonState *s, val =3D cpu_to_le64(val); =20 for (i =3D 0; i < 4; i++) { - cpu =3D val & 0xff; + cpuid =3D val & 0xff; val =3D val >> 8; =20 if (!(s->status & BIT(EXTIOI_ENABLE_CPU_ENCODE))) { - cpu =3D ctz32(cpu); - cpu =3D (cpu >=3D 4) ? 0 : cpu; + cpuid =3D ctz32(cpuid); + cpuid =3D (cpuid >=3D 4) ? 0 : cpuid; + } + + cpu =3D extioi_get_index_from_archid(s, cpuid); + if (cpu < 0) { + continue; } =20 if (s->sw_coremap[irq + i] =3D=3D cpu) { --=20 2.43.5