From nobody Sun Apr 6 22:25:28 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1736149056228264.2616919321482; Sun, 5 Jan 2025 23:37:36 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tUhfM-0001W8-0y; Mon, 06 Jan 2025 02:36:49 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tUhfD-0001UN-SF for qemu-devel@nongnu.org; Mon, 06 Jan 2025 02:36:40 -0500 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tUhfA-000667-Mi for qemu-devel@nongnu.org; Mon, 06 Jan 2025 02:36:39 -0500 Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8CxC+L8h3tn3YVeAA--.54520S3; Mon, 06 Jan 2025 15:36:28 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowMBxzsX7h3tnJDQWAA--.21955S3; Mon, 06 Jan 2025 15:36:27 +0800 (CST) From: Bibo Mao To: Song Gao Cc: Jiaxun Yang , qemu-devel@nongnu.org Subject: [PATCH v2 1/3] hw/intc/loongarch_extioi: Get cpu number from possible_cpu_arch_ids Date: Mon, 6 Jan 2025 15:36:25 +0800 Message-Id: <20250106073627.3403177-2-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250106073627.3403177-1-maobibo@loongson.cn> References: <20250106073627.3403177-1-maobibo@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowMBxzsX7h3tnJDQWAA--.21955S3 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1736149065592116600 Content-Type: text/plain; charset="utf-8" Supported CPU number can be acquired from function possible_cpu_arch_ids(), cpu-num property is not necessary. Signed-off-by: Bibo Mao --- hw/intc/loongarch_extioi.c | 6 ------ hw/intc/loongarch_extioi_common.c | 16 ++++++++++++++-- include/hw/intc/loongarch_extioi_common.h | 2 ++ 3 files changed, 16 insertions(+), 8 deletions(-) diff --git a/hw/intc/loongarch_extioi.c b/hw/intc/loongarch_extioi.c index 4a1a7c357c..d18f47def7 100644 --- a/hw/intc/loongarch_extioi.c +++ b/hw/intc/loongarch_extioi.c @@ -347,12 +347,6 @@ static void loongarch_extioi_realize(DeviceState *dev,= Error **errp) s->status |=3D BIT(EXTIOI_ENABLE); } =20 - s->cpu =3D g_new0(ExtIOICore, s->num_cpu); - if (s->cpu =3D=3D NULL) { - error_setg(errp, "Memory allocation for ExtIOICore faile"); - return; - } - for (i =3D 0; i < s->num_cpu; i++) { for (pin =3D 0; pin < LS3A_INTC_IP; pin++) { qdev_init_gpio_out(dev, &s->cpu[i].parent_irq[pin], 1); diff --git a/hw/intc/loongarch_extioi_common.c b/hw/intc/loongarch_extioi_c= ommon.c index e4c1cc3c98..8e38352076 100644 --- a/hw/intc/loongarch_extioi_common.c +++ b/hw/intc/loongarch_extioi_common.c @@ -13,11 +13,23 @@ static void loongarch_extioi_common_realize(DeviceState *dev, Error **errp) { LoongArchExtIOICommonState *s =3D (LoongArchExtIOICommonState *)dev; + MachineState *machine =3D MACHINE(qdev_get_machine()); + MachineClass *mc =3D MACHINE_GET_CLASS(machine); + const CPUArchIdList *id_list; + int i; =20 - if (s->num_cpu =3D=3D 0) { - error_setg(errp, "num-cpu must be at least 1"); + id_list =3D mc->possible_cpu_arch_ids(machine); + s->num_cpu =3D id_list->len; + s->cpu =3D g_new0(ExtIOICore, s->num_cpu); + if (s->cpu =3D=3D NULL) { + error_setg(errp, "Memory allocation for ExtIOICore faile"); return; } + + for (i =3D 0; i < s->num_cpu; i++) { + s->cpu[i].arch_id =3D id_list->cpus[i].arch_id; + s->cpu[i].cpu =3D CPU(id_list->cpus[i].cpu); + } } =20 static int loongarch_extioi_common_pre_save(void *opaque) diff --git a/include/hw/intc/loongarch_extioi_common.h b/include/hw/intc/lo= ongarch_extioi_common.h index f6bc778a85..22d7880977 100644 --- a/include/hw/intc/loongarch_extioi_common.h +++ b/include/hw/intc/loongarch_extioi_common.h @@ -65,6 +65,8 @@ typedef struct ExtIOICore { uint32_t coreisr[EXTIOI_IRQS_GROUP_COUNT]; DECLARE_BITMAP(sw_isr[LS3A_INTC_IP], EXTIOI_IRQS); qemu_irq parent_irq[LS3A_INTC_IP]; + uint64_t arch_id; + CPUState *cpu; } ExtIOICore; =20 struct LoongArchExtIOICommonState { --=20 2.39.3 From nobody Sun Apr 6 22:25:28 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1736149050183637.4285411367572; Sun, 5 Jan 2025 23:37:30 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tUhfI-0001V0-8l; Mon, 06 Jan 2025 02:36:44 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tUhfC-0001U7-RJ for qemu-devel@nongnu.org; Mon, 06 Jan 2025 02:36:38 -0500 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tUhfA-000669-14 for qemu-devel@nongnu.org; Mon, 06 Jan 2025 02:36:38 -0500 Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8Ax6+H8h3tn34VeAA--.54448S3; Mon, 06 Jan 2025 15:36:28 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowMBxzsX7h3tnJDQWAA--.21955S4; Mon, 06 Jan 2025 15:36:28 +0800 (CST) From: Bibo Mao To: Song Gao Cc: Jiaxun Yang , qemu-devel@nongnu.org Subject: [PATCH v2 2/3] hw/intc/loongarch_extioi: Remove num-cpu property Date: Mon, 6 Jan 2025 15:36:26 +0800 Message-Id: <20250106073627.3403177-3-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250106073627.3403177-1-maobibo@loongson.cn> References: <20250106073627.3403177-1-maobibo@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowMBxzsX7h3tnJDQWAA--.21955S4 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1736149051436116600 Content-Type: text/plain; charset="utf-8" Since cpu number can be acquired from possible_cpu_arch_ids(), num-cpu property is not necessary. Here remove num-cpu property for object TYPE_LOONGARCH_EXTIOI_COMMON object. Signed-off-by: Bibo Mao --- hw/intc/loongarch_extioi_common.c | 1 - hw/loongarch/virt.c | 1 - 2 files changed, 2 deletions(-) diff --git a/hw/intc/loongarch_extioi_common.c b/hw/intc/loongarch_extioi_c= ommon.c index 8e38352076..c9058829e3 100644 --- a/hw/intc/loongarch_extioi_common.c +++ b/hw/intc/loongarch_extioi_common.c @@ -94,7 +94,6 @@ static const VMStateDescription vmstate_loongarch_extioi = =3D { }; =20 static const Property extioi_properties[] =3D { - DEFINE_PROP_UINT32("num-cpu", LoongArchExtIOICommonState, num_cpu, 1), DEFINE_PROP_BIT("has-virtualization-extension", LoongArchExtIOICommonS= tate, features, EXTIOI_HAS_VIRT_EXTENSION, 0), }; diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c index 60bd4dc9d3..df56d75a6e 100644 --- a/hw/loongarch/virt.c +++ b/hw/loongarch/virt.c @@ -921,7 +921,6 @@ static void virt_irq_init(LoongArchVirtMachineState *lv= ms) =20 /* Create EXTIOI device */ extioi =3D qdev_new(TYPE_LOONGARCH_EXTIOI); - qdev_prop_set_uint32(extioi, "num-cpu", ms->smp.cpus); if (virt_is_veiointc_enabled(lvms)) { qdev_prop_set_bit(extioi, "has-virtualization-extension", true); } --=20 2.39.3 From nobody Sun Apr 6 22:25:28 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1736149047586253.93571589882652; Sun, 5 Jan 2025 23:37:27 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tUhfI-0001V1-9N; Mon, 06 Jan 2025 02:36:44 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tUhfC-0001U5-M9 for qemu-devel@nongnu.org; Mon, 06 Jan 2025 02:36:38 -0500 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tUhf9-00066A-RX for qemu-devel@nongnu.org; Mon, 06 Jan 2025 02:36:38 -0500 Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8Dx_3P8h3tn4IVeAA--.479S3; Mon, 06 Jan 2025 15:36:28 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowMBxzsX7h3tnJDQWAA--.21955S5; Mon, 06 Jan 2025 15:36:28 +0800 (CST) From: Bibo Mao To: Song Gao Cc: Jiaxun Yang , qemu-devel@nongnu.org Subject: [PATCH v2 3/3] hw/intc/loongarch_extioi: Add irq routing support from physical id Date: Mon, 6 Jan 2025 15:36:27 +0800 Message-Id: <20250106073627.3403177-4-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250106073627.3403177-1-maobibo@loongson.cn> References: <20250106073627.3403177-1-maobibo@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowMBxzsX7h3tnJDQWAA--.21955S5 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1736149051599116600 Content-Type: text/plain; charset="utf-8" The simliar with IPI interrupt controller, physical cpu id is used for irq routing for extioi interrupt controller. Signed-off-by: Bibo Mao --- hw/intc/loongarch_extioi.c | 30 ++++++++++++++++++++++++++---- 1 file changed, 26 insertions(+), 4 deletions(-) diff --git a/hw/intc/loongarch_extioi.c b/hw/intc/loongarch_extioi.c index d18f47def7..f3055ec4d2 100644 --- a/hw/intc/loongarch_extioi.c +++ b/hw/intc/loongarch_extioi.c @@ -15,6 +15,23 @@ #include "hw/intc/loongarch_extioi.h" #include "trace.h" =20 +static int extioi_get_index_from_archid(LoongArchExtIOICommonState *s, + uint64_t arch_id) +{ + int i; + + for (i =3D 0; i < s->num_cpu; i++) { + if (s->cpu[i].arch_id =3D=3D arch_id) { + break; + } + } + + if ((i < s->num_cpu) && s->cpu[i].cpu) { + return i; + } + + return -1; +} =20 static void extioi_update_irq(LoongArchExtIOICommonState *s, int irq, int = level) { @@ -125,7 +142,7 @@ static inline void extioi_enable_irq(LoongArchExtIOICom= monState *s, int index,\ static inline void extioi_update_sw_coremap(LoongArchExtIOICommonState *s, int irq, uint64_t val, bool no= tify) { - int i, cpu; + int i, cpu, cpuid; =20 /* * loongarch only support little endian, @@ -134,12 +151,17 @@ static inline void extioi_update_sw_coremap(LoongArch= ExtIOICommonState *s, val =3D cpu_to_le64(val); =20 for (i =3D 0; i < 4; i++) { - cpu =3D val & 0xff; + cpuid =3D val & 0xff; val =3D val >> 8; =20 if (!(s->status & BIT(EXTIOI_ENABLE_CPU_ENCODE))) { - cpu =3D ctz32(cpu); - cpu =3D (cpu >=3D 4) ? 0 : cpu; + cpuid =3D ctz32(cpuid); + cpuid =3D (cpuid >=3D 4) ? 0 : cpuid; + } + + cpu =3D extioi_get_index_from_archid(s, cpuid); + if (cpu < 0) { + continue; } =20 if (s->sw_coremap[irq + i] =3D=3D cpu) { --=20 2.39.3