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From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: Richard Henderson <richard.henderson@linaro.org>,
Helge Deller <deller@gmx.de>,
=?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@linaro.org>
Subject: [PATCH v3 1/5] target/hppa: Convert hppa_cpu_init() to ResetHold
handler
Date: Mon, 30 Dec 2024 16:25:15 +0100
Message-ID: <20241230152519.86291-2-philmd@linaro.org>
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From: Helge Deller <deller@gmx.de>
hppa_cpu_initfn() is called once when a HPPA CPU instance is
initialized, but it sets fields which should be set each time
a CPU resets. Rename it as a reset handler, having it matching
the ResettablePhases::hold() signature, and register it as
ResettableClass handler.
Since on reset the CPU registers and TLB entries are expected
to be zero, add a memset() call clearing CPUHPPAState up to
the &end_reset_fields marker.
Signed-off-by: Helge Deller <deller@gmx.de>
Co-developed-by: Philippe Mathieu-Daud=C3=A9 <philmd@linaro.org>
Signed-off-by: Philippe Mathieu-Daud=C3=A9 <philmd@linaro.org>
---
target/hppa/cpu.h | 5 +++++
target/hppa/cpu.c | 14 ++++++++++++--
2 files changed, 17 insertions(+), 2 deletions(-)
diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
index 22a6510e087..c1d69c1a835 100644
--- a/target/hppa/cpu.h
+++ b/target/hppa/cpu.h
@@ -263,6 +263,9 @@ typedef struct CPUArchState {
IntervalTreeRoot tlb_root;
=20
HPPATLBEntry tlb[HPPA_TLB_ENTRIES];
+
+ /* Fields up to this point are cleared by a CPU reset */
+ struct {} end_reset_fields;
} CPUHPPAState;
=20
/**
@@ -281,6 +284,7 @@ struct ArchCPU {
/**
* HPPACPUClass:
* @parent_realize: The parent class' realize handler.
+ * @parent_phases: The parent class' reset phase handlers.
*
* An HPPA CPU model.
*/
@@ -288,6 +292,7 @@ struct HPPACPUClass {
CPUClass parent_class;
=20
DeviceRealize parent_realize;
+ ResettablePhases parent_phases;
};
=20
#include "exec/cpu-all.h"
diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c
index 47d01609557..d784bcdd602 100644
--- a/target/hppa/cpu.c
+++ b/target/hppa/cpu.c
@@ -193,13 +193,20 @@ static void hppa_cpu_realizefn(DeviceState *dev, Erro=
r **errp)
tcg_cflags_set(cs, CF_PCREL);
}
=20
-static void hppa_cpu_initfn(Object *obj)
+static void hppa_cpu_reset_hold(Object *obj, ResetType type)
{
+ HPPACPUClass *scc =3D HPPA_CPU_GET_CLASS(obj);
CPUState *cs =3D CPU(obj);
HPPACPU *cpu =3D HPPA_CPU(obj);
CPUHPPAState *env =3D &cpu->env;
=20
+ if (scc->parent_phases.hold) {
+ scc->parent_phases.hold(obj, type);
+ }
cs->exception_index =3D -1;
+
+ memset(env, 0, offsetof(CPUHPPAState, end_reset_fields));
+
cpu_hppa_loaded_fr0(env);
cpu_hppa_put_psw(env, PSW_W);
}
@@ -242,10 +249,14 @@ static void hppa_cpu_class_init(ObjectClass *oc, void=
*data)
DeviceClass *dc =3D DEVICE_CLASS(oc);
CPUClass *cc =3D CPU_CLASS(oc);
HPPACPUClass *acc =3D HPPA_CPU_CLASS(oc);
+ ResettableClass *rc =3D RESETTABLE_CLASS(oc);
=20
device_class_set_parent_realize(dc, hppa_cpu_realizefn,
&acc->parent_realize);
=20
+ resettable_class_set_parent_phases(rc, NULL, hppa_cpu_reset_hold, NULL,
+ &acc->parent_phases);
+
cc->class_by_name =3D hppa_cpu_class_by_name;
cc->has_work =3D hppa_cpu_has_work;
cc->mmu_index =3D hppa_cpu_mmu_index;
@@ -269,7 +280,6 @@ static const TypeInfo hppa_cpu_type_infos[] =3D {
.parent =3D TYPE_CPU,
.instance_size =3D sizeof(HPPACPU),
.instance_align =3D __alignof(HPPACPU),
- .instance_init =3D hppa_cpu_initfn,
.abstract =3D false,
.class_size =3D sizeof(HPPACPUClass),
.class_init =3D hppa_cpu_class_init,
--=20
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From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: Richard Henderson <richard.henderson@linaro.org>,
Helge Deller <deller@gmx.de>,
=?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@linaro.org>
Subject: [PATCH v3 2/5] hw/hppa: Reset vCPUs calling resettable_reset()
Date: Mon, 30 Dec 2024 16:25:16 +0100
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From: Helge Deller <deller@gmx.de>
Rather than manually (and incompletely) resetting vCPUs,
call resettable_reset() which will fully reset the vCPUs.
Remove redundant assignations.
Signed-off-by: Helge Deller <deller@gmx.de>
Co-developed-by: Philippe Mathieu-Daud=C3=A9 <philmd@linaro.org>
Signed-off-by: Philippe Mathieu-Daud=C3=A9 <philmd@linaro.org>
---
hw/hppa/machine.c | 6 +++---
target/hppa/cpu.c | 1 +
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c
index 65259308e2e..8230f43e41c 100644
--- a/hw/hppa/machine.c
+++ b/hw/hppa/machine.c
@@ -655,12 +655,12 @@ static void hppa_machine_reset(MachineState *ms, Rese=
tType type)
for (i =3D 0; i < smp_cpus; i++) {
CPUState *cs =3D CPU(cpu[i]);
=20
+ /* reset CPU */
+ resettable_reset(OBJECT(cs), RESET_TYPE_COLD);
+
cpu_set_pc(cs, firmware_entry);
cpu[i]->env.psw =3D PSW_Q;
cpu[i]->env.gr[5] =3D CPU_HPA + i * 0x1000;
-
- cs->exception_index =3D -1;
- cs->halted =3D 0;
}
=20
/* already initialized by machine_hppa_init()? */
diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c
index d784bcdd602..41538d39d62 100644
--- a/target/hppa/cpu.c
+++ b/target/hppa/cpu.c
@@ -204,6 +204,7 @@ static void hppa_cpu_reset_hold(Object *obj, ResetType =
type)
scc->parent_phases.hold(obj, type);
}
cs->exception_index =3D -1;
+ cs->halted =3D 0;
=20
memset(env, 0, offsetof(CPUHPPAState, end_reset_fields));
=20
--=20
2.47.1
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From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: Richard Henderson <richard.henderson@linaro.org>,
Helge Deller <deller@gmx.de>,
=?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@linaro.org>
Subject: [PATCH v3 3/5] target/hppa: Only set PSW 'M' bit on reset
Date: Mon, 30 Dec 2024 16:25:17 +0100
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On reset:
"All PSW bits except the M bit is reset. The M bit is set."
Commit 1a19da0da44 ("target/hppa: Fill in hppa_cpu_do_interrupt /
hppa_cpu_exec_interrupt") inadvertently set the W bit at RESET,
remove it and set the M bit.
Signed-off-by: Philippe Mathieu-Daud=C3=A9 <philmd@linaro.org>
---
Only tested using QEMU mainstream test suite, IOW not much.
---
target/hppa/cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c
index 41538d39d62..dbd46842841 100644
--- a/target/hppa/cpu.c
+++ b/target/hppa/cpu.c
@@ -209,7 +209,7 @@ static void hppa_cpu_reset_hold(Object *obj, ResetType =
type)
memset(env, 0, offsetof(CPUHPPAState, end_reset_fields));
=20
cpu_hppa_loaded_fr0(env);
- cpu_hppa_put_psw(env, PSW_W);
+ cpu_hppa_put_psw(env, PSW_M);
}
=20
static ObjectClass *hppa_cpu_class_by_name(const char *cpu_model)
--=20
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From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: Richard Henderson <richard.henderson@linaro.org>,
Helge Deller <deller@gmx.de>,
=?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@linaro.org>
Subject: [PATCH v3 4/5] target/hppa: Set PC on vCPU reset
Date: Mon, 30 Dec 2024 16:25:18 +0100
Message-ID: <20241230152519.86291-5-philmd@linaro.org>
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From: Helge Deller <deller@gmx.de>
On reset:
"The CPU begins fetching instructions from address 0xf0000004.
This address is in PDC space."
Switch vCPUs to 32-bit mode (PSW_W bit is not set) and start
execution at address 0xf0000004.
Signed-off-by: Helge Deller <deller@gmx.de>
Co-developed-by: Philippe Mathieu-Daud=C3=A9 <philmd@linaro.org>
Signed-off-by: Philippe Mathieu-Daud=C3=A9 <philmd@linaro.org>
---
target/hppa/cpu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c
index dbd46842841..7278b7ca6b5 100644
--- a/target/hppa/cpu.c
+++ b/target/hppa/cpu.c
@@ -205,6 +205,7 @@ static void hppa_cpu_reset_hold(Object *obj, ResetType =
type)
}
cs->exception_index =3D -1;
cs->halted =3D 0;
+ cpu_set_pc(cs, 0xf0000004);
=20
memset(env, 0, offsetof(CPUHPPAState, end_reset_fields));
=20
--=20
2.47.1
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From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: Richard Henderson <richard.henderson@linaro.org>,
Helge Deller <deller@gmx.de>,
=?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@linaro.org>
Subject: [PATCH v3 5/5] target/hppa: Speed up hppa_is_pa20()
Date: Mon, 30 Dec 2024 16:25:19 +0100
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From: Helge Deller <deller@gmx.de>
Although the hppa_is_pa20() helper is costly due to string comparisons
in object_dynamic_cast(), it is called quite often during memory lookups
and at each start of a block of instruction translations.
Speed hppa_is_pa20() up by calling object_dynamic_cast() only once at
CPU creation and store the result in the is_pa20 of struct CPUArchState.
Signed-off-by: Helge Deller <deller@gmx.de>
Reviewed-by: Philippe Mathieu-Daud=C3=A9 <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
[PMD: Have hppa_is_pa20() take a const argument]
Signed-off-by: Philippe Mathieu-Daud=C3=A9 <philmd@linaro.org>
---
target/hppa/cpu.h | 6 ++++--
target/hppa/cpu.c | 2 ++
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
index c1d69c1a835..083d4f5a56a 100644
--- a/target/hppa/cpu.h
+++ b/target/hppa/cpu.h
@@ -266,6 +266,8 @@ typedef struct CPUArchState {
=20
/* Fields up to this point are cleared by a CPU reset */
struct {} end_reset_fields;
+
+ bool is_pa20;
} CPUHPPAState;
=20
/**
@@ -297,9 +299,9 @@ struct HPPACPUClass {
=20
#include "exec/cpu-all.h"
=20
-static inline bool hppa_is_pa20(CPUHPPAState *env)
+static inline bool hppa_is_pa20(const CPUHPPAState *env)
{
- return object_dynamic_cast(OBJECT(env_cpu(env)), TYPE_HPPA64_CPU) !=3D=
NULL;
+ return env->is_pa20;
}
=20
static inline int HPPA_BTLB_ENTRIES(CPUHPPAState *env)
diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c
index 7278b7ca6b5..6e5434a8e99 100644
--- a/target/hppa/cpu.c
+++ b/target/hppa/cpu.c
@@ -209,6 +209,8 @@ static void hppa_cpu_reset_hold(Object *obj, ResetType =
type)
=20
memset(env, 0, offsetof(CPUHPPAState, end_reset_fields));
=20
+ env->is_pa20 =3D !!object_dynamic_cast(obj, TYPE_HPPA64_CPU);
+
cpu_hppa_loaded_fr0(env);
cpu_hppa_put_psw(env, PSW_M);
}
--=20
2.47.1