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Subject: [PATCH 13/17] hw/misc: Add nr_regs and cold_reset_values to NPCM CLK
From: Hao Wu <wuhaotsh@google.com>
To: peter.maydell@linaro.org
Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org, Avi.Fishman@nuvoton.com,
kfting@nuvoton.com, titusr@google.com, mimik-dev@google.com,
hskinnemoen@google.com, venture@google.com, pbonzini@redhat.com,
jasowang@redhat.com, alistair@alistair23.me, Hao Wu <wuhaotsh@google.com>
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These 2 values are different between NPCM7XX and NPCM8XX
CLKs. So we add them to the class and assign different values
to them.
Signed-off-by: Hao Wu <wuhaotsh@google.com>
---
hw/misc/npcm_clk.c | 17 +++++++++++------
include/hw/misc/npcm_clk.h | 9 ++++++++-
2 files changed, 19 insertions(+), 7 deletions(-)
diff --git a/hw/misc/npcm_clk.c b/hw/misc/npcm_clk.c
index 0ecf0df3bb..eee754d31f 100644
--- a/hw/misc/npcm_clk.c
+++ b/hw/misc/npcm_clk.c
@@ -81,7 +81,7 @@ enum NPCM7xxCLKRegisters {
* All are loaded on power-up reset. CLKENx and SWRSTR should also be load=
ed on
* core domain reset, but this reset type is not yet supported by QEMU.
*/
-static const uint32_t cold_reset_values[NPCM7XX_CLK_NR_REGS] =3D {
+static const uint32_t npcm7xx_cold_reset_values[NPCM7XX_CLK_NR_REGS] =3D {
[NPCM7XX_CLK_CLKEN1] =3D 0xffffffff,
[NPCM7XX_CLK_CLKSEL] =3D 0x004aaaaa,
[NPCM7XX_CLK_CLKDIV1] =3D 0x5413f855,
@@ -728,10 +728,11 @@ static uint64_t npcm_clk_read(void *opaque, hwaddr of=
fset, unsigned size)
{
uint32_t reg =3D offset / sizeof(uint32_t);
NPCMCLKState *s =3D opaque;
+ NPCMCLKClass *c =3D NPCM_CLK_GET_CLASS(s);
int64_t now_ns;
uint32_t value =3D 0;
=20
- if (reg >=3D NPCM7XX_CLK_NR_REGS) {
+ if (reg >=3D c->nr_regs) {
qemu_log_mask(LOG_GUEST_ERROR,
"%s: offset 0x%04" HWADDR_PRIx " out of range\n",
__func__, offset);
@@ -776,11 +777,12 @@ static void npcm_clk_write(void *opaque, hwaddr offse=
t,
{
uint32_t reg =3D offset / sizeof(uint32_t);
NPCMCLKState *s =3D opaque;
+ NPCMCLKClass *c =3D NPCM_CLK_GET_CLASS(s);
uint32_t value =3D v;
=20
trace_npcm_clk_write(offset, value);
=20
- if (reg >=3D NPCM7XX_CLK_NR_REGS) {
+ if (reg >=3D c->nr_regs) {
qemu_log_mask(LOG_GUEST_ERROR,
"%s: offset 0x%04" HWADDR_PRIx " out of range\n",
__func__, offset);
@@ -870,10 +872,9 @@ static const struct MemoryRegionOps npcm_clk_ops =3D {
static void npcm_clk_enter_reset(Object *obj, ResetType type)
{
NPCMCLKState *s =3D NPCM_CLK(obj);
+ NPCMCLKClass *c =3D NPCM_CLK_GET_CLASS(s);
=20
- QEMU_BUILD_BUG_ON(sizeof(s->regs) !=3D sizeof(cold_reset_values));
-
- memcpy(s->regs, cold_reset_values, sizeof(cold_reset_values));
+ memcpy(s->regs, c->cold_reset_values, sizeof(s->regs));
s->ref_ns =3D qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
npcm7xx_clk_update_all_clocks(s);
/*
@@ -1045,11 +1046,14 @@ static void npcm_clk_class_init(ObjectClass *klass,=
void *data)
=20
static void npcm7xx_clk_class_init(ObjectClass *klass, void *data)
{
+ NPCMCLKClass *c =3D NPCM_CLK_CLASS(klass);
DeviceClass *dc =3D DEVICE_CLASS(klass);
=20
QEMU_BUILD_BUG_ON(NPCM7XX_CLK_REGS_END > NPCM_CLK_MAX_NR_REGS);
QEMU_BUILD_BUG_ON(NPCM7XX_CLK_REGS_END !=3D NPCM7XX_CLK_NR_REGS);
dc->desc =3D "NPCM7xx Clock Control Registers";
+ c->nr_regs =3D NPCM7XX_CLK_NR_REGS;
+ c->cold_reset_values =3D npcm7xx_cold_reset_values;
}
=20
static const TypeInfo npcm7xx_clk_pll_info =3D {
@@ -1081,6 +1085,7 @@ static const TypeInfo npcm_clk_info =3D {
.parent =3D TYPE_SYS_BUS_DEVICE,
.instance_size =3D sizeof(NPCMCLKState),
.instance_init =3D npcm_clk_init,
+ .class_size =3D sizeof(NPCMCLKClass),
.class_init =3D npcm_clk_class_init,
.abstract =3D true,
};
diff --git a/include/hw/misc/npcm_clk.h b/include/hw/misc/npcm_clk.h
index db03b46a52..f47614ac8d 100644
--- a/include/hw/misc/npcm_clk.h
+++ b/include/hw/misc/npcm_clk.h
@@ -175,8 +175,15 @@ struct NPCMCLKState {
Clock *clkref;
};
=20
+typedef struct NPCMCLKClass {
+ SysBusDeviceClass parent;
+
+ size_t nr_regs;
+ const uint32_t *cold_reset_values;
+} NPCMCLKClass;
+
#define TYPE_NPCM_CLK "npcm-clk"
-OBJECT_DECLARE_SIMPLE_TYPE(NPCMCLKState, NPCM_CLK)
+OBJECT_DECLARE_TYPE(NPCMCLKState, NPCMCLKClass, NPCM_CLK)
#define TYPE_NPCM7XX_CLK "npcm7xx-clk"
=20
#endif /* NPCM_CLK_H */
--=20
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