From nobody Wed Apr 9 04:55:01 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1735094527344625.119474055441; Tue, 24 Dec 2024 18:42:07 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tQHK4-0007TX-De; Tue, 24 Dec 2024 21:40:32 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tQHK1-0007RW-Jy for qemu-devel@nongnu.org; Tue, 24 Dec 2024 21:40:29 -0500 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tQHJx-0000Xt-Jb for qemu-devel@nongnu.org; Tue, 24 Dec 2024 21:40:29 -0500 Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8CxCeGOcGtnL0BaAA--.46400S3; Wed, 25 Dec 2024 10:40:14 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowMCx3sWJcGtnJV0IAA--.35957S5; Wed, 25 Dec 2024 10:40:14 +0800 (CST) From: Bibo Mao To: Stefan Hajnoczi Cc: qemu-devel@nongnu.org, Song Gao Subject: [PULL 3/6] hw/loongarch/virt: Create fdt table on machine creation done notification Date: Wed, 25 Dec 2024 10:40:05 +0800 Message-Id: <20241225024008.486236-4-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20241225024008.486236-1-maobibo@loongson.cn> References: <20241225024008.486236-1-maobibo@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowMCx3sWJcGtnJV0IAA--.35957S5 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1735094528031116600 Content-Type: text/plain; charset="utf-8" The same with ACPI table, fdt table is created on machine done notification. Some objects like CPU objects can be created with cold-plug method with command such as -smp x, -device la464-loongarch-cpu, so all objects finish to create when machine is done. Signed-off-by: Bibo Mao Reviewed-by: Bibo Mao --- hw/loongarch/virt.c | 103 ++++++++++++++++++++++++-------------------- 1 file changed, 57 insertions(+), 46 deletions(-) diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c index 3a905cf71d..266f291509 100644 --- a/hw/loongarch/virt.c +++ b/hw/loongarch/virt.c @@ -615,12 +615,67 @@ static void virt_build_smbios(LoongArchVirtMachineSta= te *lvms) } } =20 +static void virt_fdt_setup(LoongArchVirtMachineState *lvms) +{ + MachineState *machine =3D MACHINE(lvms); + uint32_t cpuintc_phandle, eiointc_phandle, pch_pic_phandle, pch_msi_ph= andle; + int i; + + create_fdt(lvms); + fdt_add_cpu_nodes(lvms); + fdt_add_memory_nodes(machine); + fdt_add_fw_cfg_node(lvms); + fdt_add_flash_node(lvms); + + /* Add cpu interrupt-controller */ + fdt_add_cpuic_node(lvms, &cpuintc_phandle); + /* Add Extend I/O Interrupt Controller node */ + fdt_add_eiointc_node(lvms, &cpuintc_phandle, &eiointc_phandle); + /* Add PCH PIC node */ + fdt_add_pch_pic_node(lvms, &eiointc_phandle, &pch_pic_phandle); + /* Add PCH MSI node */ + fdt_add_pch_msi_node(lvms, &eiointc_phandle, &pch_msi_phandle); + /* Add pcie node */ + fdt_add_pcie_node(lvms, &pch_pic_phandle, &pch_msi_phandle); + + /* + * Create uart fdt node in reverse order so that they appear + * in the finished device tree lowest address first + */ + for (i =3D VIRT_UART_COUNT; i-- > 0;) { + hwaddr base =3D VIRT_UART_BASE + i * VIRT_UART_SIZE; + int irq =3D VIRT_UART_IRQ + i - VIRT_GSI_BASE; + fdt_add_uart_node(lvms, &pch_pic_phandle, base, irq, i =3D=3D 0); + } + + fdt_add_rtc_node(lvms, &pch_pic_phandle); + fdt_add_ged_reset(lvms); + platform_bus_add_all_fdt_nodes(machine->fdt, "/platic", + VIRT_PLATFORM_BUS_BASEADDRESS, + VIRT_PLATFORM_BUS_SIZE, + VIRT_PLATFORM_BUS_IRQ); + + /* + * Since lowmem region starts from 0 and Linux kernel legacy start add= ress + * at 2 MiB, FDT base address is located at 1 MiB to avoid NULL pointer + * access. FDT size limit with 1 MiB. + * Put the FDT into the memory map as a ROM image: this will ensure + * the FDT is copied again upon reset, even if addr points into RAM. + */ + qemu_fdt_dumpdtb(machine->fdt, lvms->fdt_size); + rom_add_blob_fixed_as("fdt", machine->fdt, lvms->fdt_size, FDT_BASE, + &address_space_memory); + qemu_register_reset_nosnapshotload(qemu_fdt_randomize_seeds, + rom_ptr_for_as(&address_space_memory, FDT_BASE, lvms->fdt_size= )); +} + static void virt_done(Notifier *notifier, void *data) { LoongArchVirtMachineState *lvms =3D container_of(notifier, LoongArchVirtMachineState, machine_d= one); virt_build_smbios(lvms); loongarch_acpi_setup(lvms); + virt_fdt_setup(lvms); } =20 static void virt_powerdown_req(Notifier *notifier, void *opaque) @@ -699,9 +754,7 @@ static DeviceState *create_platform_bus(DeviceState *pc= h_pic) } =20 static void virt_devices_init(DeviceState *pch_pic, - LoongArchVirtMachineState *lvms, - uint32_t *pch_pic_phandle, - uint32_t *pch_msi_phandle) + LoongArchVirtMachineState *lvms) { MachineClass *mc =3D MACHINE_GET_CLASS(lvms); DeviceState *gpex_dev; @@ -747,9 +800,6 @@ static void virt_devices_init(DeviceState *pch_pic, gpex_set_irq_num(GPEX_HOST(gpex_dev), i, 16 + i); } =20 - /* Add pcie node */ - fdt_add_pcie_node(lvms, pch_pic_phandle, pch_msi_phandle); - /* * Create uart fdt node in reverse order so that they appear * in the finished device tree lowest address first @@ -760,7 +810,6 @@ static void virt_devices_init(DeviceState *pch_pic, serial_mm_init(get_system_memory(), base, 0, qdev_get_gpio_in(pch_pic, irq), 115200, serial_hd(i), DEVICE_LITTLE_ENDIAN); - fdt_add_uart_node(lvms, pch_pic_phandle, base, irq, i =3D=3D 0); } =20 /* Network init */ @@ -774,8 +823,6 @@ static void virt_devices_init(DeviceState *pch_pic, sysbus_create_simple("ls7a_rtc", VIRT_RTC_REG_BASE, qdev_get_gpio_in(pch_pic, VIRT_RTC_IRQ - VIRT_GSI_BASE)); - fdt_add_rtc_node(lvms, pch_pic_phandle); - fdt_add_ged_reset(lvms); =20 /* acpi ged */ lvms->acpi_ged =3D create_acpi_ged(pch_pic, lvms); @@ -793,7 +840,6 @@ static void virt_irq_init(LoongArchVirtMachineState *lv= ms) CPULoongArchState *env; CPUState *cpu_state; int cpu, pin, i, start, num; - uint32_t cpuintc_phandle, eiointc_phandle, pch_pic_phandle, pch_msi_ph= andle; =20 /* * Extended IRQ model. @@ -850,9 +896,6 @@ static void virt_irq_init(LoongArchVirtMachineState *lv= ms) memory_region_add_subregion(&lvms->system_iocsr, MAIL_SEND_ADDR, sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), 1)); =20 - /* Add cpu interrupt-controller */ - fdt_add_cpuic_node(lvms, &cpuintc_phandle); - for (cpu =3D 0; cpu < ms->smp.cpus; cpu++) { cpu_state =3D qemu_get_cpu(cpu); cpudev =3D DEVICE(cpu_state); @@ -891,9 +934,6 @@ static void virt_irq_init(LoongArchVirtMachineState *lv= ms) } } =20 - /* Add Extend I/O Interrupt Controller node */ - fdt_add_eiointc_node(lvms, &cpuintc_phandle, &eiointc_phandle); - pch_pic =3D qdev_new(TYPE_LOONGARCH_PIC); num =3D VIRT_PCH_PIC_IRQ_NUM; qdev_prop_set_uint32(pch_pic, "pch_pic_irq_num", num); @@ -913,9 +953,6 @@ static void virt_irq_init(LoongArchVirtMachineState *lv= ms) qdev_connect_gpio_out(DEVICE(d), i, qdev_get_gpio_in(extioi, i)); } =20 - /* Add PCH PIC node */ - fdt_add_pch_pic_node(lvms, &eiointc_phandle, &pch_pic_phandle); - pch_msi =3D qdev_new(TYPE_LOONGARCH_PCH_MSI); start =3D num; num =3D EXTIOI_IRQS - start; @@ -930,10 +967,7 @@ static void virt_irq_init(LoongArchVirtMachineState *l= vms) qdev_get_gpio_in(extioi, i + start)); } =20 - /* Add PCH MSI node */ - fdt_add_pch_msi_node(lvms, &eiointc_phandle, &pch_msi_phandle); - - virt_devices_init(pch_pic, lvms, &pch_pic_phandle, &pch_msi_phandle); + virt_devices_init(pch_pic, lvms); } =20 static void virt_firmware_init(LoongArchVirtMachineState *lvms) @@ -1151,8 +1185,6 @@ static void virt_init(MachineState *machine) cpu_model =3D LOONGARCH_CPU_TYPE_NAME("la464"); } =20 - create_fdt(lvms); - /* Create IOCSR space */ memory_region_init_io(&lvms->system_iocsr, OBJECT(machine), NULL, machine, "iocsr", UINT64_MAX); @@ -1171,8 +1203,6 @@ static void virt_init(MachineState *machine) lacpu =3D LOONGARCH_CPU(cpu); lacpu->phy_id =3D machine->possible_cpus->cpus[i].arch_id; } - fdt_add_cpu_nodes(lvms); - fdt_add_memory_nodes(machine); fw_cfg_add_memory(machine); =20 /* Node0 memory */ @@ -1224,34 +1254,15 @@ static void virt_init(MachineState *machine) memmap_table, sizeof(struct memmap_entry) * (memmap_entries)); } - fdt_add_fw_cfg_node(lvms); - fdt_add_flash_node(lvms); =20 /* Initialize the IO interrupt subsystem */ virt_irq_init(lvms); - platform_bus_add_all_fdt_nodes(machine->fdt, "/platic", - VIRT_PLATFORM_BUS_BASEADDRESS, - VIRT_PLATFORM_BUS_SIZE, - VIRT_PLATFORM_BUS_IRQ); lvms->machine_done.notify =3D virt_done; qemu_add_machine_init_done_notifier(&lvms->machine_done); /* connect powerdown request */ lvms->powerdown_notifier.notify =3D virt_powerdown_req; qemu_register_powerdown_notifier(&lvms->powerdown_notifier); =20 - /* - * Since lowmem region starts from 0 and Linux kernel legacy start add= ress - * at 2 MiB, FDT base address is located at 1 MiB to avoid NULL pointer - * access. FDT size limit with 1 MiB. - * Put the FDT into the memory map as a ROM image: this will ensure - * the FDT is copied again upon reset, even if addr points into RAM. - */ - qemu_fdt_dumpdtb(machine->fdt, lvms->fdt_size); - rom_add_blob_fixed_as("fdt", machine->fdt, lvms->fdt_size, FDT_BASE, - &address_space_memory); - qemu_register_reset_nosnapshotload(qemu_fdt_randomize_seeds, - rom_ptr_for_as(&address_space_memory, FDT_BASE, lvms->fdt_size= )); - lvms->bootinfo.ram_size =3D ram_size; loongarch_load_kernel(machine, &lvms->bootinfo); } --=20 2.43.5