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([71.212.144.252]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-219dc971814sm58461385ad.79.2024.12.22.08.25.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 22 Dec 2024 08:25:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1734884706; x=1735489506; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=klMxP8/nueO2LoUasMDvvsH0HmT8kwTeat8aAub+VXg=; b=YesKbA++hU1jN8rouZyiGTx0yQxwNozKiDjEFX51at37MyJ9dZd+JnVX9nOhSs7kwS FzvHlGNCNNgFz/anRB1ROFUjJWgUC5LwjKFK5YWg7hRoMRrR2rGd4M6yeMgHBUX6yujK FxNcR9lLRodDpa84yYY77PArDaFG5C0C+HBgQhGwkoy4Q3t7GffpEZ3p0A25aJ0KLUKw /6wqqK85MTE2QF6Iuan/pK9L3l0TlI1QYLLnzGRVt7iTz9ojUuLM5L0c2FIyMw/UqRWO Fdq0aEcpKEL2rk5vBMs651A632QkRKBhZUzbJAFlaYqUI01ju8Ec/HWSWpvZFy4tbhIU Bkgg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1734884706; x=1735489506; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=klMxP8/nueO2LoUasMDvvsH0HmT8kwTeat8aAub+VXg=; b=SJ3paayBf+HbKbH8TAP/ulEWT/Gwt9i4qE/dZTizHhNWJMUJAEqqtIIKRG6h9S3AsT aP81nNlF5dnnzRfk9htHN8FUR9YMs2lWh4OnoXe5hszcTlGsK96Wr7Lef930So8KUF// XkjO7aNl94gQqI63bMo53v17uQq80VfbZUUYP4Bj+LIWtKCPcQ3SUK/ePKkiK9BtAQ4Q OuhVuVO6QHYlA/Ozf8EmZo5YHBZ+vaPOQobKHcZNtmLXl7fD8oa/T0P+bQU9KcIJapPT y1z6kRm3Mv5D1NvMIWbvMjTqhnEuMDH0K+uZ9L9nfDrfbzUF4O5BVB1ihScp3F5uxzYC d2Nw== X-Gm-Message-State: AOJu0YyrBG+kXGdPjzO5BrL8Y5msi5QvA2TriUBj+GfSkk9k8AD32Nu0 /WKR6MBH4EgFZubGWnjyjPFxZCTHxwFEGYjdH8c2hsSBz7t71VdTHVLMJJypTEnP5RUdgLD6en+ B7uI= X-Gm-Gg: ASbGncvkNIi+Yz1VQYZqpoLNMsXjYbvBwcJOfQ02L0D+YqKPsnI4a8vTbHcoRNkgSc0 3EHLZ4v1uVhwVPZwc72c6W+8/Is5cgIpczyz88spvRqkMycUDO0agO88Qq4dPz03pibJYsR3VXz 6EUh1Sz95FgVYRMF96GXrp586BcoXdN1MO3UZy8Za+KTc1mkBkFq/sy8LBFcmCcM3o8fNh8ZNrV EH4Vk33QP20RtfoWsVWXCfR/kFmaRaHetkhtHcOSt9iWE/fk7S8PSnudlF/ecQ= X-Google-Smtp-Source: AGHT+IH2CFjtOlhmGZVT12QWM/jpkYdW2zC93s3Ohv/mDbX0CZUADNwKH6QtsstDN3JqJyOw4iSJiw== X-Received: by 2002:a17:902:ccc7:b0:215:94b0:9df4 with SMTP id d9443c01a7336-219e6f283aemr156292645ad.54.1734884706590; Sun, 22 Dec 2024 08:25:06 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Pierrick Bouvier Subject: [PATCH v3 30/51] tcg/optimize: Use fold_masks_zs in fold_qemu_ld Date: Sun, 22 Dec 2024 08:24:25 -0800 Message-ID: <20241222162446.2415717-31-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241222162446.2415717-1-richard.henderson@linaro.org> References: <20241222162446.2415717-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::636; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x636.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1734885085623116600 Content-Type: text/plain; charset="utf-8" Avoid the use of the OptContext slots. Be careful not to call fold_masks_zs when the memory operation is wide enough to require multiple outputs, so split into two functions: fold_qemu_ld_1reg and fold_qemu_ld_2reg. Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson --- tcg/optimize.c | 26 +++++++++++++++++++++----- 1 file changed, 21 insertions(+), 5 deletions(-) diff --git a/tcg/optimize.c b/tcg/optimize.c index c1305e9eab..0eeff6c6b4 100644 --- a/tcg/optimize.c +++ b/tcg/optimize.c @@ -2093,24 +2093,33 @@ static bool fold_orc(OptContext *ctx, TCGOp *op) return fold_masks_s(ctx, op, s_mask); } =20 -static bool fold_qemu_ld(OptContext *ctx, TCGOp *op) +static bool fold_qemu_ld_1reg(OptContext *ctx, TCGOp *op) { const TCGOpDef *def =3D &tcg_op_defs[op->opc]; MemOpIdx oi =3D op->args[def->nb_oargs + def->nb_iargs]; MemOp mop =3D get_memop(oi); int width =3D 8 * memop_size(mop); + uint64_t z_mask =3D -1, s_mask =3D 0; =20 if (width < 64) { if (mop & MO_SIGN) { - ctx->s_mask =3D MAKE_64BIT_MASK(width, 64 - width); + s_mask =3D MAKE_64BIT_MASK(width - 1, 64 - (width - 1)); } else { - ctx->z_mask =3D MAKE_64BIT_MASK(0, width); + z_mask =3D MAKE_64BIT_MASK(0, width); } } =20 /* Opcodes that touch guest memory stop the mb optimization. */ ctx->prev_mb =3D NULL; - return false; + + return fold_masks_zs(ctx, op, z_mask, s_mask); +} + +static bool fold_qemu_ld_2reg(OptContext *ctx, TCGOp *op) +{ + /* Opcodes that touch guest memory stop the mb optimization. */ + ctx->prev_mb =3D NULL; + return finish_folding(ctx, op); } =20 static bool fold_qemu_st(OptContext *ctx, TCGOp *op) @@ -2995,11 +3004,18 @@ void tcg_optimize(TCGContext *s) break; case INDEX_op_qemu_ld_a32_i32: case INDEX_op_qemu_ld_a64_i32: + done =3D fold_qemu_ld_1reg(&ctx, op); + break; case INDEX_op_qemu_ld_a32_i64: case INDEX_op_qemu_ld_a64_i64: + if (TCG_TARGET_REG_BITS =3D=3D 64) { + done =3D fold_qemu_ld_1reg(&ctx, op); + break; + } + QEMU_FALLTHROUGH; case INDEX_op_qemu_ld_a32_i128: case INDEX_op_qemu_ld_a64_i128: - done =3D fold_qemu_ld(&ctx, op); + done =3D fold_qemu_ld_2reg(&ctx, op); break; case INDEX_op_qemu_st8_a32_i32: case INDEX_op_qemu_st8_a64_i32: --=20 2.43.0