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([71.212.144.252]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2f2ee26fc22sm4165260a91.51.2024.12.19.20.11.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Dec 2024 20:11:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1734667870; x=1735272670; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=W9/02VItWnKuXE48s/sX8jbBZgUlVlj7VS3J2PwQvow=; b=hwNDdDIeHUwsokUfkP+ivW7VYxRqUcF7j1LFin2cAn/OGPuBTOkYED6j+J0EaBAFPo 9edP4U+NfZCekYUh4p7Yxv83/uMxzeGHz2bSnVdpchc7eVljesD1Au0yLu+XOleT6wCO VmDZi1lVoAaA5pgM0YcUkVgZpz4qGNQ9jJyJjwAkJzYHyt6cqPSHGzBQkAQs9aHrgsRb kOdnEYp6Gezdrf/GsdW2wSNREMyuQbgkU65Dn05S58fewBQkLy2tbtZ+RT28Z0tROMjW 32eVxnMUj9IuaDr/vodIeZMJThn/0c3YReL9+MFwPVg+Znz+IXKAIfEXBY9e9DIDaRU0 1Pxg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1734667870; x=1735272670; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=W9/02VItWnKuXE48s/sX8jbBZgUlVlj7VS3J2PwQvow=; b=gQ6KMyX6zXP2yTS/yrNQm0ipwKzn8D0s/Sdn2ZlPIZT75kbfQVlgMFwdx772oXeBjj e73DhqVXcJeUGRJvp4Wi4jLxNnvgCWyxGE9HeeXYFczNwGcs6yQNVDAumHl7NYa7wzbY GvK2AYHJhROTTNJ2SjIcToojukNdqp6UaMrx05ZIS/fkLhuj3iMoqJrhhA/mK1nb1eex ai0/1JqHjSj84nCaW6m9Kn0kbHLiQhDLYrE4rvtmbxN/Jy2km0n8IkZpChLSAZ9t61VI nP69J4ibGEqKcrz+7yEhBPURV7uTdd2QlGmbKybLmdJePsruvZC5Mk3EpPdvmfQAP2Ap HxKg== X-Gm-Message-State: AOJu0YzwNJ3DZCpE+MRFET5VxsbYm/aa5Oh7DzRzZ4ZNxdR1A1u19DFh yJ6ZDkYDqSXVj/vefqGxMTuywlGwMPjfJJmyN6RDBHIT3xbYF07jS4M0K3X6lbX7m49RHkPtg9y N X-Gm-Gg: ASbGnctgcO+X80dl/HbX0XM9GDMgqbi3sslmW3UKDmSEUCUc3KMsYtDlbpQ+IARAsKN co8E2QCEb+WtxlgdXm2LYasCPd2i9kvBlCTcKUWO0flVTKz1/r5FAzSTjgUhH7qK7SXW5PSW3z0 t0m/TEA27b/IIH/9cAc12Yizp+Ik0DIu4VLyzsbn6qjS40Al26S58bgPNuasH1U1oYWEYfS4WF3 iRpmwIhffFw/9+nPK05/76C3pfIm7hKoWxeGW2tdZAL0E1NIpPAynOjwx8bD8Y= X-Google-Smtp-Source: AGHT+IGl3FjmRdwUD2Hq9QFLUu+eNQRkiXS4Id2z+jWJd/zDVV57nZOqcJ6ukDOdGEoXsJveW8bPBQ== X-Received: by 2002:a17:90b:514d:b0:2f1:2fa5:1924 with SMTP id 98e67ed59e1d1-2f452ec1ceemr2003756a91.26.1734667870127; Thu, 19 Dec 2024 20:11:10 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Pierrick Bouvier Subject: [PATCH v2 07/51] tcg/optimize: Use fold_masks_zs in fold_and Date: Thu, 19 Dec 2024 20:10:19 -0800 Message-ID: <20241220041104.53105-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241220041104.53105-1-richard.henderson@linaro.org> References: <20241220041104.53105-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62a; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1734668185677116600 Content-Type: text/plain; charset="utf-8" Avoid the use of the OptContext slots. Find TempOptInfo once. Sink mask computation below fold_affected_mask early exit. Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson --- tcg/optimize.c | 30 ++++++++++++++++-------------- 1 file changed, 16 insertions(+), 14 deletions(-) diff --git a/tcg/optimize.c b/tcg/optimize.c index 41fd69365b..52c785472f 100644 --- a/tcg/optimize.c +++ b/tcg/optimize.c @@ -1313,7 +1313,8 @@ static bool fold_add2(OptContext *ctx, TCGOp *op) =20 static bool fold_and(OptContext *ctx, TCGOp *op) { - uint64_t z1, z2; + uint64_t z1, z2, z_mask, s_mask; + TempOptInfo *t1, *t2; =20 if (fold_const2_commutative(ctx, op) || fold_xi_to_i(ctx, op, 0) || @@ -1322,27 +1323,28 @@ static bool fold_and(OptContext *ctx, TCGOp *op) return true; } =20 - z1 =3D arg_info(op->args[1])->z_mask; - z2 =3D arg_info(op->args[2])->z_mask; - ctx->z_mask =3D z1 & z2; - - /* - * Sign repetitions are perforce all identical, whether they are 1 or = 0. - * Bitwise operations preserve the relative quantity of the repetition= s. - */ - ctx->s_mask =3D arg_info(op->args[1])->s_mask - & arg_info(op->args[2])->s_mask; + t1 =3D arg_info(op->args[1]); + t2 =3D arg_info(op->args[2]); + z1 =3D t1->z_mask; + z2 =3D t2->z_mask; =20 /* * Known-zeros does not imply known-ones. Therefore unless * arg2 is constant, we can't infer affected bits from it. */ - if (arg_is_const(op->args[2]) && - fold_affected_mask(ctx, op, z1 & ~z2)) { + if (t2->is_const && fold_affected_mask(ctx, op, z1 & ~z2)) { return true; } =20 - return fold_masks(ctx, op); + z_mask =3D z1 & z2; + + /* + * Sign repetitions are perforce all identical, whether they are 1 or = 0. + * Bitwise operations preserve the relative quantity of the repetition= s. + */ + s_mask =3D t1->s_mask & t2->s_mask; + + return fold_masks_zs(ctx, op, z_mask, s_mask); } =20 static bool fold_andc(OptContext *ctx, TCGOp *op) --=20 2.43.0