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([71.212.144.252]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-8529e78a55dsm506952a12.80.2024.12.19.20.14.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Dec 2024 20:14:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1734668080; x=1735272880; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=JRQkBQzTRu7scLpRrqJFno9GLIyKwfRFAwGQsXfZPj8=; b=zwx2Nj1JD6vqgeeZ/xhwzu2iSPPUk0FAJqcl46ISHfcFZuv/K/4FG5dMkKm0BkZoS7 eWz4Z5uqUamRleRduBx84+8/Iz303qmLB0jZTojlRwQ44Beg4enXP37XZJNWMAINmJlP f05U2ewSBsymEKCPfEyztT30kZw3otXx02KUG4nG+UsV+eD1SaSp78173ALAQdQ5NGpU 76BW0qW5/a/gtZlofk0QSRyS2cRMcUoYEppJLTh/NbhzPMz2dfQwXkkvQhtL6EbI2FEy NNQZQtTPyQbp4/+l/YfDd45zE98NAVOEkkeRtvsUEHcDxyLwmmJk879E1J9LCjFYnb2M yrbw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1734668080; x=1735272880; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=JRQkBQzTRu7scLpRrqJFno9GLIyKwfRFAwGQsXfZPj8=; b=qn++3VmWYNJnqslpelQZexkPlEBj7yNBhY5zlXW1tSPsXDFa/WGj5xcx5+4+8QSWnN IY0/3nQGijuQdEQWSEYZXd0M7pkrZ8bmVhGINJNrkDUkxtmoO/5ch+xYUHqCkd+lZP9q MH2fMz+JvluLINjubymVthPwepely1OjZqcDe1SxjCu7sf7DcoGOP5Lcst99UeklQFIH F20yaV+/G3GOvJoXJMsNU58d53yXNIQJeSklWcA3OXe1afrUeYImhzYTzd9M8mpMvdBb OD78VxtNd3DdmtSwwxX5Cn3V4txaYzAPScgF5Lz13t1yss4/j+mKkm+l+CHJhg0LV7v5 zEqQ== X-Gm-Message-State: AOJu0YzzhTJIk8PD7BRb125xyrckUK16l+gr2qpMC9ZKDYsKz/h9KjwW nf/4KrnDLhaN4xFMFZOIscLSIq/z5fsb29gdVdg1a5v5PnPjNtP2HybSC8pLH0NWziMotk2/Stt s X-Gm-Gg: ASbGncsQhRmrNyYFq3jyWHYvVbyWR3ciiw+mr8MFst2c/hLZWgQxTTPf4FUg3Id5eyn nWdFJFhssD3axGrnxkRx6PgkAq4eLshwBy64igKhAgoOiIRvwMO/HKa7Imy2ajyNUvqwfj5Lh33 /jVLgsze2HoWh7UXl7vUlft7q1lwPR6uqQ3gnpatYyEI6ksHSdgeRwVQzfoxq7wuPGoebW4Qhcf pQTPNTsdIKaufgzCsHdRgirvvqG6Jjfi6fGPBOsnZVQUWP1qyOjZWNQbMlI5p4= X-Google-Smtp-Source: AGHT+IEnGTU2K0VvmCJC9q8FhopKdmQClxxfXc3e7Uj6JFrB1EuLsitemCd+Zmj1S5ruSVokAnZ9hg== X-Received: by 2002:a05:6a00:3286:b0:725:b201:2353 with SMTP id d2e1a72fcca58-72abdec8856mr1967427b3a.13.1734668080241; Thu, 19 Dec 2024 20:14:40 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Pierrick Bouvier Subject: [PATCH v2 46/51] tcg/optimize: Use fold_masks_zs in fold_xor Date: Thu, 19 Dec 2024 20:10:58 -0800 Message-ID: <20241220041104.53105-47-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241220041104.53105-1-richard.henderson@linaro.org> References: <20241220041104.53105-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::433; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1734668332465116600 Content-Type: text/plain; charset="utf-8" Avoid the use of the OptContext slots. Find TempOptInfo once. Remove fold_masks as the function becomes unused. Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson --- tcg/optimize.c | 18 ++++++++---------- 1 file changed, 8 insertions(+), 10 deletions(-) diff --git a/tcg/optimize.c b/tcg/optimize.c index 0a84959f4c..6f81d2e831 100644 --- a/tcg/optimize.c +++ b/tcg/optimize.c @@ -1096,11 +1096,6 @@ static bool fold_masks_s(OptContext *ctx, TCGOp *op,= uint64_t s_mask) return fold_masks_zs(ctx, op, -1, s_mask); } =20 -static bool fold_masks(OptContext *ctx, TCGOp *op) -{ - return fold_masks_zs(ctx, op, ctx->z_mask, ctx->s_mask); -} - /* * An "affected" mask bit is 0 if and only if the result is identical * to the first input. Thus if the entire mask is 0, the operation @@ -2797,6 +2792,9 @@ static bool fold_tcg_st_memcopy(OptContext *ctx, TCGO= p *op) =20 static bool fold_xor(OptContext *ctx, TCGOp *op) { + uint64_t z_mask, s_mask; + TempOptInfo *t1, *t2; + if (fold_const2_commutative(ctx, op) || fold_xx_to_i(ctx, op, 0) || fold_xi_to_x(ctx, op, 0) || @@ -2804,11 +2802,11 @@ static bool fold_xor(OptContext *ctx, TCGOp *op) return true; } =20 - ctx->z_mask =3D arg_info(op->args[1])->z_mask - | arg_info(op->args[2])->z_mask; - ctx->s_mask =3D arg_info(op->args[1])->s_mask - & arg_info(op->args[2])->s_mask; - return fold_masks(ctx, op); + t1 =3D arg_info(op->args[1]); + t2 =3D arg_info(op->args[2]); + z_mask =3D t1->z_mask | t2->z_mask; + s_mask =3D t1->s_mask & t2->s_mask; + return fold_masks_zs(ctx, op, z_mask, s_mask); } =20 static bool fold_bitsel_vec(OptContext *ctx, TCGOp *op) --=20 2.43.0