From nobody Tue Dec 24 00:01:34 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1734625690208846.2009669741163; Thu, 19 Dec 2024 08:28:10 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tOJGa-00036e-SU; Thu, 19 Dec 2024 11:20:52 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tOG2y-0005ec-EM for qemu-devel@nongnu.org; Thu, 19 Dec 2024 07:54:32 -0500 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tOG2v-0007zd-JF for qemu-devel@nongnu.org; Thu, 19 Dec 2024 07:54:32 -0500 Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8CxieGBF2RnDY9YAA--.45876S3; Thu, 19 Dec 2024 20:54:25 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowMBxXceAF2Rn72gCAA--.14917S3; Thu, 19 Dec 2024 20:54:24 +0800 (CST) From: Bibo Mao To: Song Gao Cc: qemu-devel@nongnu.org Subject: [PATCH v2 1/2] target/loongarch: Use auto method with LSX feature Date: Thu, 19 Dec 2024 20:54:23 +0800 Message-Id: <20241219125424.3220321-2-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20241219125424.3220321-1-maobibo@loongson.cn> References: <20241219125424.3220321-1-maobibo@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowMBxXceAF2Rn72gCAA--.14917S3 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1734625692581116600 Content-Type: text/plain; charset="utf-8" Like LBT feature, add type OnOffAuto for LSX feature setting. Also add LSX feature detection with new VM ioctl command, fallback to old method if it is not supported. Signed-off-by: Bibo Mao --- target/loongarch/cpu.c | 38 +++++++++++++++------------ target/loongarch/cpu.h | 2 ++ target/loongarch/kvm/kvm.c | 54 ++++++++++++++++++++++++++++++++++++++ 3 files changed, 77 insertions(+), 17 deletions(-) diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index 57cc4f314b..09dc923f45 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -378,6 +378,7 @@ static void loongarch_la464_initfn(Object *obj) { LoongArchCPU *cpu =3D LOONGARCH_CPU(obj); CPULoongArchState *env =3D &cpu->env; + uint32_t data =3D 0; int i; =20 for (i =3D 0; i < 21; i++) { @@ -387,7 +388,6 @@ static void loongarch_la464_initfn(Object *obj) cpu->dtb_compatible =3D "loongarch,Loongson-3A5000"; env->cpucfg[0] =3D 0x14c010; /* PRID */ =20 - uint32_t data =3D 0; data =3D FIELD_DP32(data, CPUCFG1, ARCH, 2); data =3D FIELD_DP32(data, CPUCFG1, PGMMU, 1); data =3D FIELD_DP32(data, CPUCFG1, IOCSR, 1); @@ -476,7 +476,7 @@ static void loongarch_la132_initfn(Object *obj) { LoongArchCPU *cpu =3D LOONGARCH_CPU(obj); CPULoongArchState *env =3D &cpu->env; - + uint32_t data =3D 0; int i; =20 for (i =3D 0; i < 21; i++) { @@ -486,7 +486,6 @@ static void loongarch_la132_initfn(Object *obj) cpu->dtb_compatible =3D "loongarch,Loongson-1C103"; env->cpucfg[0] =3D 0x148042; /* PRID */ =20 - uint32_t data =3D 0; data =3D FIELD_DP32(data, CPUCFG1, ARCH, 1); /* LA32 */ data =3D FIELD_DP32(data, CPUCFG1, PGMMU, 1); data =3D FIELD_DP32(data, CPUCFG1, IOCSR, 1); @@ -614,27 +613,30 @@ static void loongarch_cpu_realizefn(DeviceState *dev,= Error **errp) =20 static bool loongarch_get_lsx(Object *obj, Error **errp) { - LoongArchCPU *cpu =3D LOONGARCH_CPU(obj); - bool ret; - - if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LSX)) { - ret =3D true; - } else { - ret =3D false; - } - return ret; + return LOONGARCH_CPU(obj)->lsx !=3D ON_OFF_AUTO_OFF; } =20 static void loongarch_set_lsx(Object *obj, bool value, Error **errp) { LoongArchCPU *cpu =3D LOONGARCH_CPU(obj); + uint32_t val; =20 - if (value) { - cpu->env.cpucfg[2] =3D FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX= , 1); - } else { - cpu->env.cpucfg[2] =3D FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX= , 0); - cpu->env.cpucfg[2] =3D FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LAS= X, 0); + cpu->lsx =3D value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF; + if (kvm_enabled()) { + /* kvm feature detection in function kvm_arch_init_vcpu */ + return; } + + /* LSX feature detection in TCG mode */ + val =3D cpu->env.cpucfg[2]; + if (cpu->lsx =3D=3D ON_OFF_AUTO_ON) { + if (FIELD_EX32(val, CPUCFG2, LSX) =3D=3D 0) { + error_setg(errp, "Failed to enable LSX in TCG mode"); + return; + } + } + + cpu->env.cpucfg[2] =3D FIELD_DP32(val, CPUCFG2, LSX, value); } =20 static bool loongarch_get_lasx(Object *obj, Error **errp) @@ -692,6 +694,7 @@ void loongarch_cpu_post_init(Object *obj) { LoongArchCPU *cpu =3D LOONGARCH_CPU(obj); =20 + cpu->lsx =3D ON_OFF_AUTO_AUTO; object_property_add_bool(obj, "lsx", loongarch_get_lsx, loongarch_set_lsx); object_property_add_bool(obj, "lasx", loongarch_get_lasx, @@ -712,6 +715,7 @@ void loongarch_cpu_post_init(Object *obj) =20 } else { cpu->lbt =3D ON_OFF_AUTO_OFF; + cpu->pmu =3D ON_OFF_AUTO_OFF; } } =20 diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h index 86c86c6c95..5bddf72c22 100644 --- a/target/loongarch/cpu.h +++ b/target/loongarch/cpu.h @@ -283,6 +283,7 @@ typedef struct LoongArchTLB LoongArchTLB; #endif =20 enum loongarch_features { + LOONGARCH_FEATURE_LSX, LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */ LOONGARCH_FEATURE_PMU, }; @@ -404,6 +405,7 @@ struct ArchCPU { uint32_t phy_id; OnOffAuto lbt; OnOffAuto pmu; + OnOffAuto lsx; =20 /* 'compatible' string for this CPU for Linux device trees */ const char *dtb_compatible; diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c index ff81806ca3..390828ef78 100644 --- a/target/loongarch/kvm/kvm.c +++ b/target/loongarch/kvm/kvm.c @@ -798,8 +798,35 @@ static bool kvm_feature_supported(CPUState *cs, enum l= oongarch_features feature) { int ret; struct kvm_device_attr attr; + uint64_t val; =20 switch (feature) { + case LOONGARCH_FEATURE_LSX: + attr.group =3D KVM_LOONGARCH_VM_FEAT_CTRL; + attr.attr =3D KVM_LOONGARCH_VM_FEAT_LSX; + ret =3D kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr); + if (ret =3D=3D 0) { + return true; + } + + /* Fallback to old kernel detect interface */ + val =3D 0; + attr.group =3D KVM_LOONGARCH_VCPU_CPUCFG; + /* Cpucfg2 */ + attr.attr =3D 2; + attr.addr =3D (uint64_t)&val; + ret =3D kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, &attr); + if (!ret) { + ret =3D kvm_vcpu_ioctl(cs, KVM_GET_DEVICE_ATTR, &attr); + if (ret) { + return false; + } + + ret =3D FIELD_EX32((uint32_t)val, CPUCFG2, LSX); + return (ret !=3D 0); + } + return false; + case LOONGARCH_FEATURE_LBT: /* * Return all if all the LBT features are supported such as: @@ -829,6 +856,28 @@ static bool kvm_feature_supported(CPUState *cs, enum l= oongarch_features feature) return false; } =20 +static int kvm_cpu_check_lsx(CPUState *cs, Error **errp) +{ + CPULoongArchState *env =3D cpu_env(cs); + LoongArchCPU *cpu =3D LOONGARCH_CPU(cs); + bool kvm_supported; + + kvm_supported =3D kvm_feature_supported(cs, LOONGARCH_FEATURE_LSX); + env->cpucfg[2] =3D FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 0); + if (cpu->lsx =3D=3D ON_OFF_AUTO_ON) { + if (kvm_supported) { + env->cpucfg[2] =3D FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 1); + } else { + error_setg(errp, "'lsx' feature not supported by KVM on this h= ost"); + return -ENOTSUP; + } + } else if ((cpu->lsx =3D=3D ON_OFF_AUTO_AUTO) && kvm_supported) { + env->cpucfg[2] =3D FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 1); + } + + return 0; +} + static int kvm_cpu_check_lbt(CPUState *cs, Error **errp) { CPULoongArchState *env =3D cpu_env(cs); @@ -889,6 +938,11 @@ int kvm_arch_init_vcpu(CPUState *cs) brk_insn =3D val; } =20 + ret =3D kvm_cpu_check_lsx(cs, &local_err); + if (ret < 0) { + error_report_err(local_err); + } + ret =3D kvm_cpu_check_lbt(cs, &local_err); if (ret < 0) { error_report_err(local_err); --=20 2.39.3 From nobody Tue Dec 24 00:01:34 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1734625557713440.6343507217946; Thu, 19 Dec 2024 08:25:57 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tOJFa-0001oY-UZ; Thu, 19 Dec 2024 11:19:47 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tOG2y-0005eq-Sj for qemu-devel@nongnu.org; Thu, 19 Dec 2024 07:54:32 -0500 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tOG2v-0007ze-P5 for qemu-devel@nongnu.org; Thu, 19 Dec 2024 07:54:32 -0500 Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8CxieGBF2RnDo9YAA--.45877S3; Thu, 19 Dec 2024 20:54:25 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowMBxXceAF2Rn72gCAA--.14917S4; Thu, 19 Dec 2024 20:54:25 +0800 (CST) From: Bibo Mao To: Song Gao Cc: qemu-devel@nongnu.org Subject: [PATCH v2 2/2] target/loongarch: Use auto method with LASX feature Date: Thu, 19 Dec 2024 20:54:24 +0800 Message-Id: <20241219125424.3220321-3-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20241219125424.3220321-1-maobibo@loongson.cn> References: <20241219125424.3220321-1-maobibo@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowMBxXceAF2Rn72gCAA--.14917S4 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1734625560717116600 Content-Type: text/plain; charset="utf-8" Like LSX feature, add type OnOffAuto for LASX feature setting. Signed-off-by: Bibo Mao --- target/loongarch/cpu.c | 50 +++++++++++++++++++++++------------ target/loongarch/cpu.h | 2 ++ target/loongarch/kvm/kvm.c | 53 ++++++++++++++++++++++++++++++++++++++ 3 files changed, 89 insertions(+), 16 deletions(-) diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index 09dc923f45..498151b4c4 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -622,6 +622,14 @@ static void loongarch_set_lsx(Object *obj, bool value,= Error **errp) uint32_t val; =20 cpu->lsx =3D value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF; + if (cpu->lsx =3D=3D ON_OFF_AUTO_OFF) { + cpu->lasx =3D ON_OFF_AUTO_OFF; + if (cpu->lasx =3D=3D ON_OFF_AUTO_ON) { + error_setg(errp, "Failed to disable LSX since LASX is enabled"= ); + return; + } + } + if (kvm_enabled()) { /* kvm feature detection in function kvm_arch_init_vcpu */ return; @@ -634,6 +642,9 @@ static void loongarch_set_lsx(Object *obj, bool value, = Error **errp) error_setg(errp, "Failed to enable LSX in TCG mode"); return; } + } else { + cpu->env.cpucfg[2] =3D FIELD_DP32(val, CPUCFG2, LASX, 0); + val =3D cpu->env.cpucfg[2]; } =20 cpu->env.cpucfg[2] =3D FIELD_DP32(val, CPUCFG2, LSX, value); @@ -641,29 +652,35 @@ static void loongarch_set_lsx(Object *obj, bool value= , Error **errp) =20 static bool loongarch_get_lasx(Object *obj, Error **errp) { - LoongArchCPU *cpu =3D LOONGARCH_CPU(obj); - bool ret; - - if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LASX)) { - ret =3D true; - } else { - ret =3D false; - } - return ret; + return LOONGARCH_CPU(obj)->lasx !=3D ON_OFF_AUTO_OFF; } =20 static void loongarch_set_lasx(Object *obj, bool value, Error **errp) { LoongArchCPU *cpu =3D LOONGARCH_CPU(obj); + uint32_t val; =20 - if (value) { - if (!FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LSX)) { - cpu->env.cpucfg[2] =3D FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2,= LSX, 1); - } - cpu->env.cpucfg[2] =3D FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LAS= X, 1); - } else { - cpu->env.cpucfg[2] =3D FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LAS= X, 0); + cpu->lasx =3D value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF; + if ((cpu->lsx =3D=3D ON_OFF_AUTO_OFF) && (cpu->lasx =3D=3D ON_OFF_AUTO= _ON)) { + error_setg(errp, "Failed to enable LASX since lSX is disabled"); + return; + } + + if (kvm_enabled()) { + /* kvm feature detection in function kvm_arch_init_vcpu */ + return; } + + /* LASX feature detection in TCG mode */ + val =3D cpu->env.cpucfg[2]; + if (cpu->lasx =3D=3D ON_OFF_AUTO_ON) { + if (FIELD_EX32(val, CPUCFG2, LASX) =3D=3D 0) { + error_setg(errp, "Failed to enable LASX in TCG mode"); + return; + } + } + + cpu->env.cpucfg[2] =3D FIELD_DP32(val, CPUCFG2, LASX, value); } =20 static bool loongarch_get_lbt(Object *obj, Error **errp) @@ -695,6 +712,7 @@ void loongarch_cpu_post_init(Object *obj) LoongArchCPU *cpu =3D LOONGARCH_CPU(obj); =20 cpu->lsx =3D ON_OFF_AUTO_AUTO; + cpu->lasx =3D ON_OFF_AUTO_AUTO; object_property_add_bool(obj, "lsx", loongarch_get_lsx, loongarch_set_lsx); object_property_add_bool(obj, "lasx", loongarch_get_lasx, diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h index 5bddf72c22..8eee49a984 100644 --- a/target/loongarch/cpu.h +++ b/target/loongarch/cpu.h @@ -284,6 +284,7 @@ typedef struct LoongArchTLB LoongArchTLB; =20 enum loongarch_features { LOONGARCH_FEATURE_LSX, + LOONGARCH_FEATURE_LASX, LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */ LOONGARCH_FEATURE_PMU, }; @@ -406,6 +407,7 @@ struct ArchCPU { OnOffAuto lbt; OnOffAuto pmu; OnOffAuto lsx; + OnOffAuto lasx; =20 /* 'compatible' string for this CPU for Linux device trees */ const char *dtb_compatible; diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c index 390828ef78..5033b4070a 100644 --- a/target/loongarch/kvm/kvm.c +++ b/target/loongarch/kvm/kvm.c @@ -827,6 +827,32 @@ static bool kvm_feature_supported(CPUState *cs, enum l= oongarch_features feature) } return false; =20 + case LOONGARCH_FEATURE_LASX: + attr.group =3D KVM_LOONGARCH_VM_FEAT_CTRL; + attr.attr =3D KVM_LOONGARCH_VM_FEAT_LASX; + ret =3D kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr); + if (ret =3D=3D 0) { + return true; + } + + /* Fallback to old kernel detect interface */ + val =3D 0; + attr.group =3D KVM_LOONGARCH_VCPU_CPUCFG; + /* Cpucfg2 */ + attr.attr =3D 2; + attr.addr =3D (uint64_t)&val; + ret =3D kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, &attr); + if (!ret) { + ret =3D kvm_vcpu_ioctl(cs, KVM_GET_DEVICE_ATTR, &attr); + if (ret) { + return false; + } + + ret =3D FIELD_EX32((uint32_t)val, CPUCFG2, LASX); + return (ret !=3D 0); + } + return false; + case LOONGARCH_FEATURE_LBT: /* * Return all if all the LBT features are supported such as: @@ -878,6 +904,28 @@ static int kvm_cpu_check_lsx(CPUState *cs, Error **err= p) return 0; } =20 +static int kvm_cpu_check_lasx(CPUState *cs, Error **errp) +{ + CPULoongArchState *env =3D cpu_env(cs); + LoongArchCPU *cpu =3D LOONGARCH_CPU(cs); + bool kvm_supported; + + kvm_supported =3D kvm_feature_supported(cs, LOONGARCH_FEATURE_LASX); + env->cpucfg[2] =3D FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 0); + if (cpu->lasx =3D=3D ON_OFF_AUTO_ON) { + if (kvm_supported) { + env->cpucfg[2] =3D FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 1= ); + } else { + error_setg(errp, "'lasx' feature not supported by KVM on host"= ); + return -ENOTSUP; + } + } else if ((cpu->lasx =3D=3D ON_OFF_AUTO_AUTO) && kvm_supported) { + env->cpucfg[2] =3D FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 1); + } + + return 0; +} + static int kvm_cpu_check_lbt(CPUState *cs, Error **errp) { CPULoongArchState *env =3D cpu_env(cs); @@ -943,6 +991,11 @@ int kvm_arch_init_vcpu(CPUState *cs) error_report_err(local_err); } =20 + ret =3D kvm_cpu_check_lasx(cs, &local_err); + if (ret < 0) { + error_report_err(local_err); + } + ret =3D kvm_cpu_check_lbt(cs, &local_err); if (ret < 0) { error_report_err(local_err); --=20 2.39.3