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From: Alistair Francis <alistair23@gmail.com>
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To: qemu-devel@nongnu.org
Cc: alistair23@gmail.com,
=?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@linaro.org>,
Alistair Francis <alistair.francis@wdc.com>,
Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Subject: [PULL 36/39] target/riscv: Include missing headers in 'internals.h'
Date: Thu, 19 Dec 2024 08:30:06 +1000
Message-ID: <20241218223010.1931245-37-alistair.francis@wdc.com>
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From: Philippe Mathieu-Daud=C3=A9 <philmd@linaro.org>
Rather than relying on implicit includes, explicit them,
in order to avoid when refactoring unrelated headers:
target/riscv/internals.h:49:15: error: use of undeclared identifier 'PRV_=
S'
49 | ret =3D PRV_S;
| ^
target/riscv/internals.h:93:9: error: call to undeclared function 'env_ar=
chcpu'; ISO C99 and later do not support implicit function declarations [-W=
implicit-function-declaration]
93 | if (env_archcpu(env)->cfg.ext_zfinx) {
| ^
target/riscv/internals.h:101:15: error: unknown type name 'float32'; did =
you mean 'float'?
101 | static inline float32 check_nanbox_s(CPURISCVState *env, uint64_t=
f)
| ^~~~~~~
| float
Signed-off-by: Philippe Mathieu-Daud=C3=A9 <philmd@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-ID: <20241203200828.47311-3-philmd@linaro.org>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
target/riscv/internals.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/target/riscv/internals.h b/target/riscv/internals.h
index ddbdee885b..76934eaa7b 100644
--- a/target/riscv/internals.h
+++ b/target/riscv/internals.h
@@ -19,7 +19,10 @@
#ifndef RISCV_CPU_INTERNALS_H
#define RISCV_CPU_INTERNALS_H
=20
+#include "exec/cpu-common.h"
#include "hw/registerfields.h"
+#include "fpu/softfloat-types.h"
+#include "target/riscv/cpu_bits.h"
=20
/*
* The current MMU Modes are:
--=20
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