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Feedback-ID: idc91472f:Fastmail
From: Klaus Jensen <its@irrelevant.dk>
Date: Mon, 16 Dec 2024 13:53:06 +0100
Subject: [PATCH 5/9] hw/nvme: be compliant wrt. dsm processing limits
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Message-Id: <20241216-nvme-queue-v1-5-4e42212b92f7@samsung.com>
References: <20241216-nvme-queue-v1-0-4e42212b92f7@samsung.com>
In-Reply-To: <20241216-nvme-queue-v1-0-4e42212b92f7@samsung.com>
To: Keith Busch <kbusch@kernel.org>, Klaus Jensen <its@irrelevant.dk>,
Jesper Devantier <foss@defmacro.it>, qemu-block@nongnu.org,
qemu-devel@nongnu.org
Cc: Klaus Jensen <k.jensen@samsung.com>
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From: Klaus Jensen <k.jensen@samsung.com>
The specification states that,
> The controller shall set all three processing limit fields (i.e., the
> DMRL, DMRSL and DMSL fields) to non-zero values or shall clear all
> three processing limit fields to 0h.
So, set the DMRL and DMSL fields in addition to DMRSL.
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
---
hw/nvme/ctrl.c | 24 +++++++++++++++---------
include/block/nvme.h | 2 ++
2 files changed, 17 insertions(+), 9 deletions(-)
diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c
index 120a1ca1076c8110d8550a5e75082c6ed4f23e16..22a8c400bae332285d015e8b590=
de159fd7d1b7a 100644
--- a/hw/nvme/ctrl.c
+++ b/hw/nvme/ctrl.c
@@ -5581,7 +5581,9 @@ static uint16_t nvme_identify_ctrl_csi(NvmeCtrl *n, N=
vmeRequest *req)
switch (c->csi) {
case NVME_CSI_NVM:
id_nvm->vsl =3D n->params.vsl;
+ id_nvm->dmrl =3D NVME_ID_CTRL_NVM_DMRL_MAX;
id_nvm->dmrsl =3D cpu_to_le32(n->dmrsl);
+ id_nvm->dmsl =3D NVME_ID_CTRL_NVM_DMRL_MAX * n->dmrsl;
break;
=20
case NVME_CSI_ZONED:
@@ -6638,18 +6640,23 @@ static uint16_t nvme_aer(NvmeCtrl *n, NvmeRequest *=
req)
return NVME_NO_COMPLETE;
}
=20
-static void nvme_update_dmrsl(NvmeCtrl *n)
+static void nvme_update_dsm_limits(NvmeCtrl *n, NvmeNamespace *ns)
{
- int nsid;
+ if (ns) {
+ n->dmrsl =3D
+ MIN_NON_ZERO(n->dmrsl, BDRV_REQUEST_MAX_BYTES / nvme_l2b(ns, 1=
));
=20
- for (nsid =3D 1; nsid <=3D NVME_MAX_NAMESPACES; nsid++) {
- NvmeNamespace *ns =3D nvme_ns(n, nsid);
+ return;
+ }
+
+ for (uint32_t nsid =3D 1; nsid <=3D NVME_MAX_NAMESPACES; nsid++) {
+ ns =3D nvme_ns(n, nsid);
if (!ns) {
continue;
}
=20
- n->dmrsl =3D MIN_NON_ZERO(n->dmrsl,
- BDRV_REQUEST_MAX_BYTES / nvme_l2b(ns, 1));
+ n->dmrsl =3D
+ MIN_NON_ZERO(n->dmrsl, BDRV_REQUEST_MAX_BYTES / nvme_l2b(ns, 1=
));
}
}
=20
@@ -6737,7 +6744,7 @@ static uint16_t nvme_ns_attachment(NvmeCtrl *n, NvmeR=
equest *req)
ctrl->namespaces[nsid] =3D NULL;
ns->attached--;
=20
- nvme_update_dmrsl(ctrl);
+ nvme_update_dsm_limits(ctrl, NULL);
=20
break;
=20
@@ -8838,8 +8845,7 @@ void nvme_attach_ns(NvmeCtrl *n, NvmeNamespace *ns)
n->namespaces[nsid] =3D ns;
ns->attached++;
=20
- n->dmrsl =3D MIN_NON_ZERO(n->dmrsl,
- BDRV_REQUEST_MAX_BYTES / nvme_l2b(ns, 1));
+ nvme_update_dsm_limits(n, ns);
}
=20
static void nvme_realize(PCIDevice *pci_dev, Error **errp)
diff --git a/include/block/nvme.h b/include/block/nvme.h
index 145a0b65933a699504d6d89222f7979a06f615df..f3f0317524d129f518698c6797e=
d37a7ac0ac847 100644
--- a/include/block/nvme.h
+++ b/include/block/nvme.h
@@ -1167,6 +1167,8 @@ typedef struct NvmeIdCtrlZoned {
uint8_t rsvd1[4095];
} NvmeIdCtrlZoned;
=20
+#define NVME_ID_CTRL_NVM_DMRL_MAX 255
+
typedef struct NvmeIdCtrlNvm {
uint8_t vsl;
uint8_t wzsl;
--=20
2.45.2