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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: stefanha@redhat.com,
=?UTF-8?q?C=C3=A9dric=20Le=20Goater?= <clg@redhat.com>,
=?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@linaro.org>
Subject: [PULL 57/67] hw/ssi: Constify all Property
Date: Sun, 15 Dec 2024 13:05:23 -0600
Message-ID: <20241215190533.3222854-58-richard.henderson@linaro.org>
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Reviewed-by: C=C3=A9dric Le Goater <clg@redhat.com>
Reviewed-by: Philippe Mathieu-Daud=C3=A9 <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
hw/ssi/aspeed_smc.c | 4 ++--
hw/ssi/ibex_spi_host.c | 2 +-
hw/ssi/npcm7xx_fiu.c | 2 +-
hw/ssi/pnv_spi.c | 2 +-
hw/ssi/sifive_spi.c | 2 +-
hw/ssi/ssi.c | 2 +-
hw/ssi/xilinx_spi.c | 2 +-
hw/ssi/xilinx_spips.c | 4 ++--
hw/ssi/xlnx-versal-ospi.c | 2 +-
9 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c
index 033cbbb59b..bbdd4e4786 100644
--- a/hw/ssi/aspeed_smc.c
+++ b/hw/ssi/aspeed_smc.c
@@ -1287,7 +1287,7 @@ static const VMStateDescription vmstate_aspeed_smc =
=3D {
}
};
=20
-static Property aspeed_smc_properties[] =3D {
+static const Property aspeed_smc_properties[] =3D {
DEFINE_PROP_BOOL("inject-failure", AspeedSMCState, inject_failure, fal=
se),
DEFINE_PROP_UINT64("dram-base", AspeedSMCState, dram_base, 0),
DEFINE_PROP_LINK("dram", AspeedSMCState, dram_mr,
@@ -1336,7 +1336,7 @@ static void aspeed_smc_flash_realize(DeviceState *dev=
, Error **errp)
sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->mmio);
}
=20
-static Property aspeed_smc_flash_properties[] =3D {
+static const Property aspeed_smc_flash_properties[] =3D {
DEFINE_PROP_UINT8("cs", AspeedSMCFlash, cs, 0),
DEFINE_PROP_LINK("controller", AspeedSMCFlash, controller, TYPE_ASPEED=
_SMC,
AspeedSMCState *),
diff --git a/hw/ssi/ibex_spi_host.c b/hw/ssi/ibex_spi_host.c
index 9e07432f7c..60a0b17b62 100644
--- a/hw/ssi/ibex_spi_host.c
+++ b/hw/ssi/ibex_spi_host.c
@@ -561,7 +561,7 @@ static const MemoryRegionOps ibex_spi_ops =3D {
.endianness =3D DEVICE_LITTLE_ENDIAN,
};
=20
-static Property ibex_spi_properties[] =3D {
+static const Property ibex_spi_properties[] =3D {
DEFINE_PROP_UINT32("num_cs", IbexSPIHostState, num_cs, 1),
DEFINE_PROP_END_OF_LIST(),
};
diff --git a/hw/ssi/npcm7xx_fiu.c b/hw/ssi/npcm7xx_fiu.c
index 119c38c415..fdd3ad2fdc 100644
--- a/hw/ssi/npcm7xx_fiu.c
+++ b/hw/ssi/npcm7xx_fiu.c
@@ -541,7 +541,7 @@ static const VMStateDescription vmstate_npcm7xx_fiu =3D=
{
},
};
=20
-static Property npcm7xx_fiu_properties[] =3D {
+static const Property npcm7xx_fiu_properties[] =3D {
DEFINE_PROP_INT32("cs-count", NPCM7xxFIUState, cs_count, 0),
DEFINE_PROP_END_OF_LIST(),
};
diff --git a/hw/ssi/pnv_spi.c b/hw/ssi/pnv_spi.c
index c21b2ebb3c..4ca9c469a4 100644
--- a/hw/ssi/pnv_spi.c
+++ b/hw/ssi/pnv_spi.c
@@ -1195,7 +1195,7 @@ static const MemoryRegionOps pnv_spi_xscom_ops =3D {
.endianness =3D DEVICE_BIG_ENDIAN,
};
=20
-static Property pnv_spi_properties[] =3D {
+static const Property pnv_spi_properties[] =3D {
DEFINE_PROP_UINT32("spic_num", PnvSpi, spic_num, 0),
DEFINE_PROP_UINT8("transfer_len", PnvSpi, transfer_len, 4),
DEFINE_PROP_END_OF_LIST(),
diff --git a/hw/ssi/sifive_spi.c b/hw/ssi/sifive_spi.c
index 08a107792b..7458747779 100644
--- a/hw/ssi/sifive_spi.c
+++ b/hw/ssi/sifive_spi.c
@@ -328,7 +328,7 @@ static void sifive_spi_realize(DeviceState *dev, Error =
**errp)
fifo8_create(&s->rx_fifo, FIFO_CAPACITY);
}
=20
-static Property sifive_spi_properties[] =3D {
+static const Property sifive_spi_properties[] =3D {
DEFINE_PROP_UINT32("num-cs", SiFiveSPIState, num_cs, 1),
DEFINE_PROP_END_OF_LIST(),
};
diff --git a/hw/ssi/ssi.c b/hw/ssi/ssi.c
index 3f357e8f16..cab0014c3f 100644
--- a/hw/ssi/ssi.c
+++ b/hw/ssi/ssi.c
@@ -108,7 +108,7 @@ static void ssi_peripheral_realize(DeviceState *dev, Er=
ror **errp)
ssc->realize(s, errp);
}
=20
-static Property ssi_peripheral_properties[] =3D {
+static const Property ssi_peripheral_properties[] =3D {
DEFINE_PROP_UINT8("cs", SSIPeripheral, cs_index, 0),
DEFINE_PROP_END_OF_LIST(),
};
diff --git a/hw/ssi/xilinx_spi.c b/hw/ssi/xilinx_spi.c
index 7f1e1808c5..588c1ec071 100644
--- a/hw/ssi/xilinx_spi.c
+++ b/hw/ssi/xilinx_spi.c
@@ -361,7 +361,7 @@ static const VMStateDescription vmstate_xilinx_spi =3D {
}
};
=20
-static Property xilinx_spi_properties[] =3D {
+static const Property xilinx_spi_properties[] =3D {
DEFINE_PROP_UINT8("num-ss-bits", XilinxSPI, num_cs, 1),
DEFINE_PROP_END_OF_LIST(),
};
diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c
index aeb462c3ce..f72cb3cbc8 100644
--- a/hw/ssi/xilinx_spips.c
+++ b/hw/ssi/xilinx_spips.c
@@ -1420,12 +1420,12 @@ static const VMStateDescription vmstate_xlnx_zynqmp=
_qspips =3D {
}
};
=20
-static Property xilinx_zynqmp_qspips_properties[] =3D {
+static const Property xilinx_zynqmp_qspips_properties[] =3D {
DEFINE_PROP_UINT32("dma-burst-size", XlnxZynqMPQSPIPS, dma_burst_size,=
64),
DEFINE_PROP_END_OF_LIST(),
};
=20
-static Property xilinx_spips_properties[] =3D {
+static const Property xilinx_spips_properties[] =3D {
DEFINE_PROP_UINT8("num-busses", XilinxSPIPS, num_busses, 1),
DEFINE_PROP_UINT8("num-ss-bits", XilinxSPIPS, num_cs, 4),
DEFINE_PROP_UINT8("num-txrx-bytes", XilinxSPIPS, num_txrx_bytes, 1),
diff --git a/hw/ssi/xlnx-versal-ospi.c b/hw/ssi/xlnx-versal-ospi.c
index ecc1903b8e..e51abe9de2 100644
--- a/hw/ssi/xlnx-versal-ospi.c
+++ b/hw/ssi/xlnx-versal-ospi.c
@@ -1825,7 +1825,7 @@ static const VMStateDescription vmstate_xlnx_versal_o=
spi =3D {
}
};
=20
-static Property xlnx_versal_ospi_properties[] =3D {
+static const Property xlnx_versal_ospi_properties[] =3D {
DEFINE_PROP_BOOL("dac-with-indac", XlnxVersalOspi, dac_with_indac, fal=
se),
DEFINE_PROP_BOOL("indac-write-disabled", XlnxVersalOspi,
ind_write_disabled, false),
--=20
2.43.0