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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: stefanha@redhat.com,
=?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@linaro.org>
Subject: [PULL 46/67] hw/pci: Constify all Property
Date: Sun, 15 Dec 2024 13:05:12 -0600
Message-ID: <20241215190533.3222854-47-richard.henderson@linaro.org>
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Reviewed-by: Philippe Mathieu-Daud=C3=A9 <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
hw/pci/pci.c | 2 +-
hw/pci/pci_bridge.c | 2 +-
hw/pci/pci_host.c | 2 +-
hw/pci/pcie_port.c | 4 ++--
4 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index bf0a1840db..90248481b1 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -81,7 +81,7 @@ static const PropertyInfo prop_pci_busnr =3D {
.get =3D prop_pci_busnr_get,
};
=20
-static Property pci_props[] =3D {
+static const Property pci_props[] =3D {
DEFINE_PROP_PCI_DEVFN("addr", PCIDevice, devfn, -1),
DEFINE_PROP_STRING("romfile", PCIDevice, romfile),
DEFINE_PROP_UINT32("romsize", PCIDevice, romsize, UINT32_MAX),
diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c
index 2c7bb1a525..dd4fd3674f 100644
--- a/hw/pci/pci_bridge.c
+++ b/hw/pci/pci_bridge.c
@@ -477,7 +477,7 @@ int pci_bridge_qemu_reserve_cap_init(PCIDevice *dev, in=
t cap_offset,
return 0;
}
=20
-static Property pci_bridge_properties[] =3D {
+static const Property pci_bridge_properties[] =3D {
DEFINE_PROP_BOOL("x-pci-express-writeable-slt-bug", PCIBridge,
pcie_writeable_slt_bug, false),
DEFINE_PROP_END_OF_LIST(),
diff --git a/hw/pci/pci_host.c b/hw/pci/pci_host.c
index dfe6fe6184..321e7be709 100644
--- a/hw/pci/pci_host.c
+++ b/hw/pci/pci_host.c
@@ -240,7 +240,7 @@ const VMStateDescription vmstate_pcihost =3D {
}
};
=20
-static Property pci_host_properties_common[] =3D {
+static const Property pci_host_properties_common[] =3D {
DEFINE_PROP_BOOL("x-config-reg-migration-enabled", PCIHostState,
mig_enabled, true),
DEFINE_PROP_BOOL(PCI_HOST_BYPASS_IOMMU, PCIHostState, bypass_iommu, fa=
lse),
diff --git a/hw/pci/pcie_port.c b/hw/pci/pcie_port.c
index 9f978ba164..bac2822e98 100644
--- a/hw/pci/pcie_port.c
+++ b/hw/pci/pcie_port.c
@@ -111,7 +111,7 @@ void pcie_chassis_del_slot(PCIESlot *s)
QLIST_REMOVE(s, next);
}
=20
-static Property pcie_port_props[] =3D {
+static const Property pcie_port_props[] =3D {
DEFINE_PROP_UINT8("port", PCIEPort, port, 0),
DEFINE_PROP_UINT16("aer_log_max", PCIEPort,
parent_obj.parent_obj.exp.aer_log.log_max,
@@ -204,7 +204,7 @@ static const TypeInfo pcie_port_type_info =3D {
.class_init =3D pcie_port_class_init,
};
=20
-static Property pcie_slot_props[] =3D {
+static const Property pcie_slot_props[] =3D {
DEFINE_PROP_UINT8("chassis", PCIESlot, chassis, 0),
DEFINE_PROP_UINT16("slot", PCIESlot, slot, 0),
DEFINE_PROP_BOOL("hotplug", PCIESlot, hotplug, true),
--=20
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