From nobody Fri Dec 19 20:26:06 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1734059617; cv=none; d=zohomail.com; s=zohoarc; b=J0aF0wNpaf01EcwrQEy+nNaVRYX7LtF1L6y1qYlGNQOgdO1A3X0cB1OyoZic3GDuZDy2OhC8ys6cGsmlnekqWptoHjB6kf6euS/7hCz1TExlMd3ZapXPsZB7oRKlZS3ga5mjV+oRO3xl6FB8tKeqLqopXUdBJ+K+oaVfAh7YR1g= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1734059617; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Reply-To:References:Sender:Subject:Subject:To:To:Message-Id; bh=KOnarFiWyQxP57HlPbagoa3HahoBjhy7wQ2EuIQJAHs=; b=cESFrmZKZ0BNEdgkP4I62FOksYcRfIn4wF7+OWWmMqAHejPPBCMqe2d/BHKuHyYwhmY1RqJyxXUS1KxDP3beaXWC1fVli9xBc07vqZhHKs5yXZD/FeYT2OQhLIXngVBDCw1pY7jm5J3NpUpGBbCLVdMXBJW7/tOLwopNGzoCP3g= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1734059617594763.5487583422373; Thu, 12 Dec 2024 19:13:37 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tLw6Z-0001r7-B3; Thu, 12 Dec 2024 22:12:39 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tLw6X-0001qL-1G; Thu, 12 Dec 2024 22:12:37 -0500 Received: from mail.aspeedtech.com ([211.20.114.72] helo=TWMBX01.aspeed.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tLw6V-0002gT-Ai; Thu, 12 Dec 2024 22:12:36 -0500 Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.12; Fri, 13 Dec 2024 11:12:05 +0800 Received: from localhost.localdomain (192.168.10.10) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1258.12 via Frontend Transport; Fri, 13 Dec 2024 11:12:05 +0800 To: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Bin Meng , "open list:SD (Secure Card)" , "open list:All patches CC here" CC: , , Subject: [PATCH v2 2/2] hw/sd/sdhci: Fix data transfer did not complete if data size is bigger than SDMA Buffer Boundary Date: Fri, 13 Dec 2024 11:12:05 +0800 Message-ID: <20241213031205.641009-3-jamin_lin@aspeedtech.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241213031205.641009-1-jamin_lin@aspeedtech.com> References: <20241213031205.641009-1-jamin_lin@aspeedtech.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=211.20.114.72; envelope-from=jamin_lin@aspeedtech.com; helo=TWMBX01.aspeed.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_FAIL=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Jamin Lin From: Jamin Lin via Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1734059619237116600 Content-Type: text/plain; charset="utf-8" According to the design of sdhci_sdma_transfer_multi_blocks, if the "s->blkcnt * 512" was bigger than the SDMA Buffer boundary, it break the while loop of data transfer and set SDHC_NISEN_DMA in the normal interrupt status to notify the firmware that this SDMA boundary buffer Transfer Compl= ete and firmware should set the system address of the next SDMA boundary buffer for the remained data transfer. However, after firmware set the system address of the next SDMA boundary bu= ffer in the SDMA System Address Register(0x00), SDHCI model did not restart the = data transfer, again. Finally, firmware break the data transfer because firmware did not receive the either "DMA Interrupt" or "Transfer Complete Interrupt" from SDHCI model. Error log from u-boot ``` sdhci_transfer_data: Transfer data timeout ** fs_devread read error - block ``` According to the following mention from SDMA System Address Register of SDH= CI spec, ''' This register contains the system memory address for an SDMA transfer in 32-bit addressing mode. When the Host Controller stops an SDMA transfer, this register shall point to the system address of the next contiguous data position. It can be accessed only if no transaction is executing (i.e., after a trans= action has stopped). Reading this register during SDMA transfers may return an invalid value. The Host Driver shall initialize this register before starting an SDMA transaction. After SDMA has stopped, the next system address of the next contiguous data position can be read from this register. The SDMA transfer waits at the every boundary specified by the SDMA Buffer Boundary in the Block Size register. The Host Controller generates DMA Interrupt to request the Host Driver to update this register. The Host Driver sets the next system address of the next data position to this regis= ter. When the most upper byte of this register (003h) is written, the Host Contr= oller restarts the SDMA transfer. ''', restart the data transfer if firmware writes the most upper byte of SDMA Sy= stem Address, s->blkcnt is bigger than 0 and SDHCI is in the data transfer state. Signed-off-by: Jamin Lin --- hw/sd/sdhci.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index f1a329fdaf..a632177735 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -1180,6 +1180,18 @@ sdhci_write(void *opaque, hwaddr offset, uint64_t va= l, unsigned size) sdhci_sdma_transfer_single_block(s); } } + } else if (TRANSFERRING_DATA(s->prnsts)) { + s->sdmasysad =3D (s->sdmasysad & mask) | value; + MASKED_WRITE(s->sdmasysad, mask, value); + /* restarts the SDMA transfer if the most upper byte is writte= n */ + if ((s->sdmasysad & 0xFF000000) && s->blkcnt && + SDHC_DMA_TYPE(s->hostctl1) =3D=3D SDHC_CTRL_SDMA) { + if (s->trnmod & SDHC_TRNS_MULTI) { + sdhci_sdma_transfer_multi_blocks(s); + } else { + sdhci_sdma_transfer_single_block(s); + } + } } break; case SDHC_BLKSIZE: --=20 2.34.1