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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: qemu-stable@nongnu.org, wannacu <wannacu2049@gmail.com>,
Pierrick Bouvier <pierrick.bouvier@linaro.org>,
=?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@linaro.org>
Subject: [PULL 1/4] tcg: Reset free_temps before tcg_optimize
Date: Thu, 12 Dec 2024 14:48:15 -0600
Message-ID: <20241212204818.2468583-2-richard.henderson@linaro.org>
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When allocating new temps during tcg_optmize, do not re-use
any EBB temps that were used within the TB. We do not have
any idea what span of the TB in which the temp was live.
Introduce tcg_temp_ebb_reset_freed and use before tcg_optimize,
as well as replacing the equivalent in plugin_gen_inject and
tcg_func_start.
Cc: qemu-stable@nongnu.org
Fixes: fb04ab7ddd8 ("tcg/optimize: Lower TCG_COND_TST{EQ,NE} if unsupported=
")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2711
Reported-by: wannacu <wannacu2049@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Philippe Mathieu-Daud=C3=A9 <philmd@linaro.org>
---
include/tcg/tcg-temp-internal.h | 6 ++++++
accel/tcg/plugin-gen.c | 2 +-
tcg/tcg.c | 5 ++++-
3 files changed, 11 insertions(+), 2 deletions(-)
diff --git a/include/tcg/tcg-temp-internal.h b/include/tcg/tcg-temp-interna=
l.h
index 44192c55a9..98f91e68b7 100644
--- a/include/tcg/tcg-temp-internal.h
+++ b/include/tcg/tcg-temp-internal.h
@@ -42,4 +42,10 @@ TCGv_i64 tcg_temp_ebb_new_i64(void);
TCGv_ptr tcg_temp_ebb_new_ptr(void);
TCGv_i128 tcg_temp_ebb_new_i128(void);
=20
+/* Forget all freed EBB temps, so that new allocations produce new temps. =
*/
+static inline void tcg_temp_ebb_reset_freed(TCGContext *s)
+{
+ memset(s->free_temps, 0, sizeof(s->free_temps));
+}
+
#endif /* TCG_TEMP_FREE_H */
diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c
index 0f47bfbb48..1ef075552c 100644
--- a/accel/tcg/plugin-gen.c
+++ b/accel/tcg/plugin-gen.c
@@ -275,7 +275,7 @@ static void plugin_gen_inject(struct qemu_plugin_tb *pl=
ugin_tb)
* that might be live within the existing opcode stream.
* The simplest solution is to release them all and create new.
*/
- memset(tcg_ctx->free_temps, 0, sizeof(tcg_ctx->free_temps));
+ tcg_temp_ebb_reset_freed(tcg_ctx);
=20
QTAILQ_FOREACH_SAFE(op, &tcg_ctx->ops, link, next) {
switch (op->opc) {
diff --git a/tcg/tcg.c b/tcg/tcg.c
index 0babae1b88..4578b185be 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -1489,7 +1489,7 @@ void tcg_func_start(TCGContext *s)
s->nb_temps =3D s->nb_globals;
=20
/* No temps have been previously allocated for size or locality. */
- memset(s->free_temps, 0, sizeof(s->free_temps));
+ tcg_temp_ebb_reset_freed(s);
=20
/* No constant temps have been previously allocated. */
for (int i =3D 0; i < TCG_TYPE_COUNT; ++i) {
@@ -6120,6 +6120,9 @@ int tcg_gen_code(TCGContext *s, TranslationBlock *tb,=
uint64_t pc_start)
}
#endif
=20
+ /* Do not reuse any EBB that may be allocated within the TB. */
+ tcg_temp_ebb_reset_freed(s);
+
tcg_optimize(s);
=20
reachable_code_pass(s);
--=20
2.43.0
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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: Roman Artemev <roman.artemev@syntacore.com>, qemu-stable@nongnu.org,
Denis Tomashev <denis.tomashev@syntacore.com>
Subject: [PULL 2/4] tcg/riscv: Fix StoreStore barrier generation
Date: Thu, 12 Dec 2024 14:48:16 -0600
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From: Roman Artemev <roman.artemev@syntacore.com>
On RISC-V to StoreStore barrier corresponds
`fence w, w` not `fence r, r`
Cc: qemu-stable@nongnu.org
Fixes: efbea94c76b ("tcg/riscv: Add slowpath load and store instructions")
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Denis Tomashev <denis.tomashev@syntacore.com>
Signed-off-by: Roman Artemev <roman.artemev@syntacore.com>
Message-ID: <e2f2131e294a49e79959d4fa9ec02cf4@syntacore.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/riscv/tcg-target.c.inc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv/tcg-target.c.inc
index f8331e4688..96f9a7e348 100644
--- a/tcg/riscv/tcg-target.c.inc
+++ b/tcg/riscv/tcg-target.c.inc
@@ -1624,7 +1624,7 @@ static void tcg_out_mb(TCGContext *s, TCGArg a0)
insn |=3D 0x02100000;
}
if (a0 & TCG_MO_ST_ST) {
- insn |=3D 0x02200000;
+ insn |=3D 0x01100000;
}
tcg_out32(s, insn);
}
--=20
2.43.0
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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@linaro.org>
Subject: [PULL 3/4] include/exec: Introduce fpst alias in helper-head.h.inc
Date: Thu, 12 Dec 2024 14:48:17 -0600
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This allows targets to declare that the helper requires a
float_status pointer and instead of a generic void pointer.
Reviewed-by: Philippe Mathieu-Daud=C3=A9 <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/exec/helper-head.h.inc | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/exec/helper-head.h.inc b/include/exec/helper-head.h.inc
index 5ef467a79d..bce5db06ef 100644
--- a/include/exec/helper-head.h.inc
+++ b/include/exec/helper-head.h.inc
@@ -23,6 +23,7 @@
#define dh_alias_ptr ptr
#define dh_alias_cptr ptr
#define dh_alias_env ptr
+#define dh_alias_fpst ptr
#define dh_alias_void void
#define dh_alias_noreturn noreturn
#define dh_alias(t) glue(dh_alias_, t)
@@ -39,6 +40,7 @@
#define dh_ctype_ptr void *
#define dh_ctype_cptr const void *
#define dh_ctype_env CPUArchState *
+#define dh_ctype_fpst float_status *
#define dh_ctype_void void
#define dh_ctype_noreturn G_NORETURN void
#define dh_ctype(t) dh_ctype_##t
@@ -96,6 +98,7 @@
#define dh_typecode_f64 dh_typecode_i64
#define dh_typecode_cptr dh_typecode_ptr
#define dh_typecode_env dh_typecode_ptr
+#define dh_typecode_fpst dh_typecode_ptr
#define dh_typecode(t) dh_typecode_##t
=20
#define dh_callflag_i32 0
--=20
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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@linaro.org>,
Pierrick Bouvier <pierrick.bouvier@linaro.org>
Subject: [PULL 4/4] target/sparc: Use memcpy() and remove memcpy32()
Date: Thu, 12 Dec 2024 14:48:18 -0600
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From: Philippe Mathieu-Daud=C3=A9 <philmd@linaro.org>
Rather than manually copying each register, use
the libc memcpy(), which is well optimized nowadays.
Suggested-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daud=C3=A9 <philmd@linaro.org>
Message-ID: <20241205205418.67613-1-philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/sparc/win_helper.c | 26 ++++++++------------------
1 file changed, 8 insertions(+), 18 deletions(-)
diff --git a/target/sparc/win_helper.c b/target/sparc/win_helper.c
index b53fc9ce94..0c4b09f2c1 100644
--- a/target/sparc/win_helper.c
+++ b/target/sparc/win_helper.c
@@ -24,29 +24,19 @@
#include "exec/helper-proto.h"
#include "trace.h"
=20
-static inline void memcpy32(target_ulong *dst, const target_ulong *src)
-{
- dst[0] =3D src[0];
- dst[1] =3D src[1];
- dst[2] =3D src[2];
- dst[3] =3D src[3];
- dst[4] =3D src[4];
- dst[5] =3D src[5];
- dst[6] =3D src[6];
- dst[7] =3D src[7];
-}
-
void cpu_set_cwp(CPUSPARCState *env, int new_cwp)
{
/* put the modified wrap registers at their proper location */
if (env->cwp =3D=3D env->nwindows - 1) {
- memcpy32(env->regbase, env->regbase + env->nwindows * 16);
+ memcpy(env->regbase, env->regbase + env->nwindows * 16,
+ sizeof(env->gregs));
}
env->cwp =3D new_cwp;
=20
/* put the wrap registers at their temporary location */
if (new_cwp =3D=3D env->nwindows - 1) {
- memcpy32(env->regbase + env->nwindows * 16, env->regbase);
+ memcpy(env->regbase + env->nwindows * 16, env->regbase,
+ sizeof(env->gregs));
}
env->regwptr =3D env->regbase + (new_cwp * 16);
}
@@ -361,8 +351,8 @@ void cpu_gl_switch_gregs(CPUSPARCState *env, uint32_t n=
ew_gl)
dst =3D get_gl_gregset(env, env->gl);
=20
if (src !=3D dst) {
- memcpy32(dst, env->gregs);
- memcpy32(env->gregs, src);
+ memcpy(dst, env->gregs, sizeof(env->gregs));
+ memcpy(env->gregs, src, sizeof(env->gregs));
}
}
=20
@@ -393,8 +383,8 @@ void cpu_change_pstate(CPUSPARCState *env, uint32_t new=
_pstate)
/* Switch global register bank */
src =3D get_gregset(env, new_pstate_regs);
dst =3D get_gregset(env, pstate_regs);
- memcpy32(dst, env->gregs);
- memcpy32(env->gregs, src);
+ memcpy(dst, env->gregs, sizeof(env->gregs));
+ memcpy(env->gregs, src, sizeof(env->gregs));
} else {
trace_win_helper_no_switch_pstate(new_pstate_regs);
}
--=20
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