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From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
To: huth@tuxfamily.org,
qemu-devel@nongnu.org
Date: Thu, 12 Dec 2024 11:45:47 +0000
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Subject: [PATCH v2 01/34] next-cube: remove 0x14020 dummy value from
next_mmio_read()
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This is a dummy value for the SCSI CSR which appears to have no effect when
removed. Eventually the reads/writes to this register will be directed
towards the WIP implementations in next_scr_readfn() and next_scr_writefn().
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Thomas Huth <huth@tuxfamily.org>
---
hw/m68k/next-cube.c | 4 ----
1 file changed, 4 deletions(-)
diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c
index 08886d432c..0418fbc8aa 100644
--- a/hw/m68k/next-cube.c
+++ b/hw/m68k/next-cube.c
@@ -286,10 +286,6 @@ static uint64_t next_mmio_read(void *opaque, hwaddr ad=
dr, unsigned size)
size << 3);
break;
=20
- case 0x14020:
- val =3D 0x7f;
- break;
-
default:
val =3D 0;
DPRINTF("MMIO Read @ 0x%"HWADDR_PRIx" size %d\n", addr, size);
--=20
2.39.5
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From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
To: huth@tuxfamily.org,
qemu-devel@nongnu.org
Date: Thu, 12 Dec 2024 11:45:48 +0000
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Subject: [PATCH v2 02/34] next-cube: remove overlap between next.dma and
next.mmio memory regions
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Change the start of the next.mmio memory region so that it follows on direc=
tly
after the next.dma memory region. Increase the address offsets in
next_mmio_read() and next_mmio_write(), and reduce the size of the next.mmio
memory region accordingly.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daud=C3=A9 <philmd@linaro.org>
Reviewed-by: Thomas Huth <huth@tuxfamily.org>
---
hw/m68k/next-cube.c | 28 ++++++++++++++--------------
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c
index 0418fbc8aa..550e7f0b0a 100644
--- a/hw/m68k/next-cube.c
+++ b/hw/m68k/next-cube.c
@@ -266,23 +266,23 @@ static uint64_t next_mmio_read(void *opaque, hwaddr a=
ddr, unsigned size)
uint64_t val;
=20
switch (addr) {
- case 0x7000:
+ case 0x2000: /* 0x2005000 */
/* DPRINTF("Read INT status: %x\n", s->int_status); */
val =3D s->int_status;
break;
=20
- case 0x7800:
+ case 0x2800: /* 0x2007800 */
DPRINTF("MMIO Read INT mask: %x\n", s->int_mask);
val =3D s->int_mask;
break;
=20
- case 0xc000 ... 0xc003:
- val =3D extract32(s->scr1, (4 - (addr - 0xc000) - size) << 3,
+ case 0x7000 ... 0x7003: /* 0x200c000 */
+ val =3D extract32(s->scr1, (4 - (addr - 0x7000) - size) << 3,
size << 3);
break;
=20
- case 0xd000 ... 0xd003:
- val =3D extract32(s->scr2, (4 - (addr - 0xd000) - size) << 3,
+ case 0x8000 ... 0x8003: /* 0x200d000 */
+ val =3D extract32(s->scr2, (4 - (addr - 0x8000) - size) << 3,
size << 3);
break;
=20
@@ -301,25 +301,25 @@ static void next_mmio_write(void *opaque, hwaddr addr=
, uint64_t val,
NeXTPC *s =3D NEXT_PC(opaque);
=20
switch (addr) {
- case 0x7000:
+ case 0x2000: /* 0x2005000 */
DPRINTF("INT Status old: %x new: %x\n", s->int_status,
(unsigned int)val);
s->int_status =3D val;
break;
=20
- case 0x7800:
+ case 0x2800: /* 0x2007800 */
DPRINTF("INT Mask old: %x new: %x\n", s->int_mask, (unsigned int)v=
al);
s->int_mask =3D val;
break;
=20
- case 0xc000 ... 0xc003:
+ case 0x7000 ... 0x7003: /* 0x200c000 */
DPRINTF("SCR1 Write: %x\n", (unsigned int)val);
- s->scr1 =3D deposit32(s->scr1, (4 - (addr - 0xc000) - size) << 3,
+ s->scr1 =3D deposit32(s->scr1, (4 - (addr - 0x7000) - size) << 3,
size << 3, val);
break;
=20
- case 0xd000 ... 0xd003:
- s->scr2 =3D deposit32(s->scr2, (4 - (addr - 0xd000) - size) << 3,
+ case 0x8000 ... 0x8003: /* 0x200d000 */
+ s->scr2 =3D deposit32(s->scr2, (4 - (addr - 0x8000) - size) << 3,
size << 3, val);
next_scr2_led_update(s);
next_scr2_rtc_update(s);
@@ -897,7 +897,7 @@ static void next_pc_realize(DeviceState *dev, Error **e=
rrp)
qdev_init_gpio_in(dev, next_irq, NEXT_NUM_IRQS);
=20
memory_region_init_io(&s->mmiomem, OBJECT(s), &next_mmio_ops, s,
- "next.mmio", 0xd0000);
+ "next.mmio", 0x9000);
memory_region_init_io(&s->scrmem, OBJECT(s), &next_scr_ops, s,
"next.scr", 0x20000);
sysbus_init_mmio(sbd, &s->mmiomem);
@@ -1000,7 +1000,7 @@ static void next_cube_init(MachineState *machine)
sysbus_create_simple(TYPE_NEXTFB, 0x0B000000, NULL);
=20
/* MMIO */
- sysbus_mmio_map(SYS_BUS_DEVICE(pcdev), 0, 0x02000000);
+ sysbus_mmio_map(SYS_BUS_DEVICE(pcdev), 0, 0x02005000);
=20
/* BMAP IO - acts as a catch-all for now */
sysbus_mmio_map(SYS_BUS_DEVICE(pcdev), 1, 0x02100000);
--=20
2.39.5
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From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
To: huth@tuxfamily.org,
qemu-devel@nongnu.org
Date: Thu, 12 Dec 2024 11:45:49 +0000
Message-Id: <20241212114620.549285-4-mark.cave-ayland@ilande.co.uk>
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Subject: [PATCH v2 03/34] next-cube: create new next.scsi container memory
region
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Move the ESP SCSI and SCSI CSR registers to the new next.scsi container mem=
ory
region.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daud=C3=A9 <philmd@linaro.org>
Reviewed-by: Thomas Huth <huth@tuxfamily.org>
---
hw/m68k/next-cube.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c
index 550e7f0b0a..f95ed4a170 100644
--- a/hw/m68k/next-cube.c
+++ b/hw/m68k/next-cube.c
@@ -94,6 +94,7 @@ struct NeXTPC {
=20
MemoryRegion mmiomem;
MemoryRegion scrmem;
+ MemoryRegion scsimem;
=20
uint32_t scr1;
uint32_t scr2;
@@ -843,7 +844,12 @@ static void next_scsi_init(DeviceState *pcdev)
sysbusdev =3D SYS_BUS_DEVICE(dev);
sysbus_realize_and_unref(sysbusdev, &error_fatal);
sysbus_connect_irq(sysbusdev, 0, qdev_get_gpio_in(pcdev, NEXT_SCSI_I));
- sysbus_mmio_map(sysbusdev, 0, 0x2114000);
+
+ memory_region_init(&next_pc->scsimem, OBJECT(next_pc), "next.scsi", 0x=
40);
+ memory_region_add_subregion(&next_pc->scsimem, 0x0,
+ sysbus_mmio_get_region(sysbusdev, 0));
+
+ memory_region_add_subregion(&next_pc->scrmem, 0x14000, &next_pc->scsim=
em);
=20
next_pc->scsi_reset =3D qdev_get_gpio_in(dev, 0);
next_pc->scsi_dma =3D qdev_get_gpio_in(dev, 1);
--=20
2.39.5
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From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
To: huth@tuxfamily.org,
qemu-devel@nongnu.org
Date: Thu, 12 Dec 2024 11:45:50 +0000
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Subject: [PATCH v2 04/34] next-cube: move next_scsi_init() to
next_pc_realize()
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This reflects that the SCSI interface exists within the NeXT Peripheral
Controller (PC).
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Thomas Huth <huth@tuxfamily.org>
---
hw/m68k/next-cube.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c
index f95ed4a170..9b3578cd4f 100644
--- a/hw/m68k/next-cube.c
+++ b/hw/m68k/next-cube.c
@@ -908,6 +908,9 @@ static void next_pc_realize(DeviceState *dev, Error **e=
rrp)
"next.scr", 0x20000);
sysbus_init_mmio(sbd, &s->mmiomem);
sysbus_init_mmio(sbd, &s->scrmem);
+
+ /* SCSI */
+ next_scsi_init(dev);
}
=20
/*
@@ -1051,8 +1054,6 @@ static void next_cube_init(MachineState *machine)
=20
/* TODO: */
/* Network */
- /* SCSI */
- next_scsi_init(pcdev);
=20
/* DMA */
memory_region_init_io(&m->dmamem, NULL, &next_dma_ops, machine,
--=20
2.39.5
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From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
To: huth@tuxfamily.org,
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Date: Thu, 12 Dec 2024 11:45:51 +0000
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Move initialisation of the memory regions and GPIOs from next_pc_realize() =
to
the new next_pc_init() function.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Thomas Huth <huth@tuxfamily.org>
---
hw/m68k/next-cube.c | 17 +++++++++++------
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c
index 9b3578cd4f..fcd48f045e 100644
--- a/hw/m68k/next-cube.c
+++ b/hw/m68k/next-cube.c
@@ -897,20 +897,24 @@ static void next_pc_reset(DeviceState *dev)
=20
static void next_pc_realize(DeviceState *dev, Error **errp)
{
- NeXTPC *s =3D NEXT_PC(dev);
- SysBusDevice *sbd =3D SYS_BUS_DEVICE(dev);
+ /* SCSI */
+ next_scsi_init(dev);
+}
+
+static void next_pc_init(Object *obj)
+{
+ NeXTPC *s =3D NEXT_PC(obj);
+ SysBusDevice *sbd =3D SYS_BUS_DEVICE(obj);
=20
- qdev_init_gpio_in(dev, next_irq, NEXT_NUM_IRQS);
+ qdev_init_gpio_in(DEVICE(obj), next_irq, NEXT_NUM_IRQS);
=20
memory_region_init_io(&s->mmiomem, OBJECT(s), &next_mmio_ops, s,
"next.mmio", 0x9000);
memory_region_init_io(&s->scrmem, OBJECT(s), &next_scr_ops, s,
"next.scr", 0x20000);
+
sysbus_init_mmio(sbd, &s->mmiomem);
sysbus_init_mmio(sbd, &s->scrmem);
-
- /* SCSI */
- next_scsi_init(dev);
}
=20
/*
@@ -972,6 +976,7 @@ static void next_pc_class_init(ObjectClass *klass, void=
*data)
static const TypeInfo next_pc_info =3D {
.name =3D TYPE_NEXT_PC,
.parent =3D TYPE_SYS_BUS_DEVICE,
+ .instance_init =3D next_pc_init,
.instance_size =3D sizeof(NeXTPC),
.class_init =3D next_pc_class_init,
};
--=20
2.39.5
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From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
To: huth@tuxfamily.org,
qemu-devel@nongnu.org
Date: Thu, 12 Dec 2024 11:45:52 +0000
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Subject: [PATCH v2 06/34] next-cube: introduce next-scsi device
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This device is intended to hold the ESP SCSI controller and the NeXT SCSI C=
SRs.
Start by creating the device and moving the ESP SCSI controller to be an
embedded child device.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Thomas Huth <huth@tuxfamily.org>
---
hw/m68k/next-cube.c | 93 ++++++++++++++++++++++++++++++++++++---------
1 file changed, 74 insertions(+), 19 deletions(-)
diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c
index fcd48f045e..1321c04520 100644
--- a/hw/m68k/next-cube.c
+++ b/hw/m68k/next-cube.c
@@ -83,6 +83,18 @@ struct NeXTState {
next_dma dma[10];
};
=20
+#define TYPE_NEXT_SCSI "next-scsi"
+OBJECT_DECLARE_SIMPLE_TYPE(NeXTSCSI, NEXT_SCSI)
+
+/* NeXT SCSI Controller */
+struct NeXTSCSI {
+ SysBusDevice parent_obj;
+
+ MemoryRegion scsi_mem;
+
+ SysBusESPState sysbus_esp;
+};
+
#define TYPE_NEXT_PC "next-pc"
OBJECT_DECLARE_SIMPLE_TYPE(NeXTPC, NEXT_PC)
=20
@@ -94,7 +106,6 @@ struct NeXTPC {
=20
MemoryRegion mmiomem;
MemoryRegion scrmem;
- MemoryRegion scsimem;
=20
uint32_t scr1;
uint32_t scr2;
@@ -102,6 +113,8 @@ struct NeXTPC {
uint32_t int_mask;
uint32_t int_status;
uint32_t led;
+
+ NeXTSCSI next_scsi;
uint8_t scsi_csr_1;
uint8_t scsi_csr_2;
=20
@@ -825,38 +838,61 @@ static void nextscsi_write(void *opaque, uint8_t *buf=
, int size)
nextdma_write(opaque, buf, size, NEXTDMA_SCSI);
}
=20
-static void next_scsi_init(DeviceState *pcdev)
+static void next_scsi_init(Object *obj)
{
- struct NeXTPC *next_pc =3D NEXT_PC(pcdev);
- DeviceState *dev;
- SysBusDevice *sysbusdev;
+ NeXTSCSI *s =3D NEXT_SCSI(obj);
+ SysBusDevice *sbd =3D SYS_BUS_DEVICE(obj);
+
+ object_initialize_child(obj, "esp", &s->sysbus_esp, TYPE_SYSBUS_ESP);
+
+ memory_region_init(&s->scsi_mem, obj, "next.scsi", 0x40);
+ sysbus_init_mmio(sbd, &s->scsi_mem);
+}
+
+static void next_scsi_realize(DeviceState *dev, Error **errp)
+{
+ NeXTSCSI *s =3D NEXT_SCSI(dev);
SysBusESPState *sysbus_esp;
+ SysBusDevice *sbd;
ESPState *esp;
+ NeXTPC *pcdev;
+
+ pcdev =3D NEXT_PC(container_of(s, NeXTPC, next_scsi));
=20
- dev =3D qdev_new(TYPE_SYSBUS_ESP);
- sysbus_esp =3D SYSBUS_ESP(dev);
+ /* ESP */
+ sysbus_esp =3D SYSBUS_ESP(&s->sysbus_esp);
esp =3D &sysbus_esp->esp;
esp->dma_memory_read =3D nextscsi_read;
esp->dma_memory_write =3D nextscsi_write;
esp->dma_opaque =3D pcdev;
sysbus_esp->it_shift =3D 0;
esp->dma_enabled =3D 1;
- sysbusdev =3D SYS_BUS_DEVICE(dev);
- sysbus_realize_and_unref(sysbusdev, &error_fatal);
- sysbus_connect_irq(sysbusdev, 0, qdev_get_gpio_in(pcdev, NEXT_SCSI_I));
-
- memory_region_init(&next_pc->scsimem, OBJECT(next_pc), "next.scsi", 0x=
40);
- memory_region_add_subregion(&next_pc->scsimem, 0x0,
- sysbus_mmio_get_region(sysbusdev, 0));
+ sbd =3D SYS_BUS_DEVICE(sysbus_esp);
+ if (!sysbus_realize(sbd, errp)) {
+ return;
+ }
+ memory_region_add_subregion(&s->scsi_mem, 0x0,
+ sysbus_mmio_get_region(sbd, 0));
=20
- memory_region_add_subregion(&next_pc->scrmem, 0x14000, &next_pc->scsim=
em);
+ scsi_bus_legacy_handle_cmdline(&s->sysbus_esp.esp.bus);
+}
=20
- next_pc->scsi_reset =3D qdev_get_gpio_in(dev, 0);
- next_pc->scsi_dma =3D qdev_get_gpio_in(dev, 1);
+static void next_scsi_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc =3D DEVICE_CLASS(klass);
=20
- scsi_bus_legacy_handle_cmdline(&esp->bus);
+ dc->desc =3D "NeXT SCSI Controller";
+ dc->realize =3D next_scsi_realize;
}
=20
+static const TypeInfo next_scsi_info =3D {
+ .name =3D TYPE_NEXT_SCSI,
+ .parent =3D TYPE_SYS_BUS_DEVICE,
+ .instance_init =3D next_scsi_init,
+ .instance_size =3D sizeof(NeXTSCSI),
+ .class_init =3D next_scsi_class_init,
+};
+
static void next_escc_init(DeviceState *pcdev)
{
DeviceState *dev;
@@ -897,8 +933,24 @@ static void next_pc_reset(DeviceState *dev)
=20
static void next_pc_realize(DeviceState *dev, Error **errp)
{
+ NeXTPC *s =3D NEXT_PC(dev);
+ SysBusDevice *sbd;
+ DeviceState *d;
+
/* SCSI */
- next_scsi_init(dev);
+ sbd =3D SYS_BUS_DEVICE(&s->next_scsi);
+ if (!sysbus_realize(sbd, errp)) {
+ return;
+ }
+ memory_region_add_subregion(&s->scrmem, 0x14000,
+ sysbus_mmio_get_region(sbd, 0));
+
+ d =3D DEVICE(object_resolve_path_component(OBJECT(&s->next_scsi), "esp=
"));
+ sysbus_connect_irq(SYS_BUS_DEVICE(d), 0,
+ qdev_get_gpio_in(DEVICE(s), NEXT_SCSI_I));
+
+ s->scsi_reset =3D qdev_get_gpio_in(d, 0);
+ s->scsi_dma =3D qdev_get_gpio_in(d, 1);
}
=20
static void next_pc_init(Object *obj)
@@ -915,6 +967,8 @@ static void next_pc_init(Object *obj)
=20
sysbus_init_mmio(sbd, &s->mmiomem);
sysbus_init_mmio(sbd, &s->scrmem);
+
+ object_initialize_child(obj, "next-scsi", &s->next_scsi, TYPE_NEXT_SCS=
I);
}
=20
/*
@@ -1089,6 +1143,7 @@ static void next_register_type(void)
{
type_register_static(&next_typeinfo);
type_register_static(&next_pc_info);
+ type_register_static(&next_scsi_info);
}
=20
type_init(next_register_type)
--=20
2.39.5
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From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
To: huth@tuxfamily.org,
qemu-devel@nongnu.org
Date: Thu, 12 Dec 2024 11:45:53 +0000
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Subject: [PATCH v2 07/34] next-cube: move SCSI CSRs from next-pc to the
next-scsi device
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The SCSI CSRs are located within the SCSI subsystem of the NeXT PC (Periphe=
ral
Contoller) which is now modelled as a separate QEMU device. Add a new memory
region subregion to contain the SCSI CSRs that simply store and retrieve the
register values.
Add a new VMStateDescription for the next-scsi device to enable the SCSI CS=
Rs
to be migrated.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Thomas Huth <huth@tuxfamily.org>
---
hw/m68k/next-cube.c | 88 +++++++++++++++++++++++++++++++++++++++------
1 file changed, 78 insertions(+), 10 deletions(-)
diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c
index 1321c04520..928740b281 100644
--- a/hw/m68k/next-cube.c
+++ b/hw/m68k/next-cube.c
@@ -93,6 +93,10 @@ struct NeXTSCSI {
MemoryRegion scsi_mem;
=20
SysBusESPState sysbus_esp;
+
+ MemoryRegion scsi_csr_mem;
+ uint8_t scsi_csr_1;
+ uint8_t scsi_csr_2;
};
=20
#define TYPE_NEXT_PC "next-pc"
@@ -115,8 +119,6 @@ struct NeXTPC {
uint32_t led;
=20
NeXTSCSI next_scsi;
- uint8_t scsi_csr_1;
- uint8_t scsi_csr_2;
=20
qemu_irq scsi_reset;
qemu_irq scsi_dma;
@@ -364,6 +366,7 @@ static const MemoryRegionOps next_mmio_ops =3D {
static uint64_t next_scr_readfn(void *opaque, hwaddr addr, unsigned size)
{
NeXTPC *s =3D NEXT_PC(opaque);
+ NeXTSCSI *ns =3D NEXT_SCSI(&s->next_scsi);
uint64_t val;
=20
switch (addr) {
@@ -373,12 +376,12 @@ static uint64_t next_scr_readfn(void *opaque, hwaddr =
addr, unsigned size)
break;
=20
case 0x14020:
- DPRINTF("SCSI 4020 STATUS READ %X\n", s->scsi_csr_1);
- val =3D s->scsi_csr_1;
+ DPRINTF("SCSI 4020 STATUS READ %X\n", ns->scsi_csr_1);
+ val =3D ns->scsi_csr_1;
break;
=20
case 0x14021:
- DPRINTF("SCSI 4021 STATUS READ %X\n", s->scsi_csr_2);
+ DPRINTF("SCSI 4021 STATUS READ %X\n", ns->scsi_csr_2);
val =3D 0x40;
break;
=20
@@ -411,6 +414,7 @@ static void next_scr_writefn(void *opaque, hwaddr addr,=
uint64_t val,
unsigned size)
{
NeXTPC *s =3D NEXT_PC(opaque);
+ NeXTSCSI *ns =3D NEXT_SCSI(&s->next_scsi);
=20
switch (addr) {
case 0x14108:
@@ -445,7 +449,7 @@ static void next_scr_writefn(void *opaque, hwaddr addr,=
uint64_t val,
DPRINTF("SCSICSR Reset\n");
/* I think this should set DMADIR. CPUDMA and INTMASK to 0 */
qemu_irq_raise(s->scsi_reset);
- s->scsi_csr_1 &=3D ~(SCSICSR_INTMASK | 0x80 | 0x1);
+ ns->scsi_csr_1 &=3D ~(SCSICSR_INTMASK | 0x80 | 0x1);
qemu_irq_lower(s->scsi_reset);
}
if (val & SCSICSR_DMADIR) {
@@ -838,6 +842,54 @@ static void nextscsi_write(void *opaque, uint8_t *buf,=
int size)
nextdma_write(opaque, buf, size, NEXTDMA_SCSI);
}
=20
+static void next_scsi_csr_write(void *opaque, hwaddr addr, uint64_t val,
+ unsigned size)
+{
+ NeXTSCSI *s =3D NEXT_SCSI(opaque);
+
+ switch (addr) {
+ case 0:
+ s->scsi_csr_1 =3D val;
+ break;
+
+ case 1:
+ s->scsi_csr_2 =3D val;
+ break;
+
+ default:
+ g_assert_not_reached();
+ }
+}
+
+static uint64_t next_scsi_csr_read(void *opaque, hwaddr addr, unsigned siz=
e)
+{
+ NeXTSCSI *s =3D NEXT_SCSI(opaque);
+ uint64_t val;
+
+ switch (addr) {
+ case 0:
+ val =3D s->scsi_csr_1;
+ break;
+
+ case 1:
+ val =3D s->scsi_csr_2;
+ break;
+
+ default:
+ g_assert_not_reached();
+ }
+
+ return val;
+}
+
+static const MemoryRegionOps next_scsi_csr_ops =3D {
+ .read =3D next_scsi_csr_read,
+ .write =3D next_scsi_csr_write,
+ .valid.min_access_size =3D 1,
+ .valid.max_access_size =3D 1,
+ .endianness =3D DEVICE_BIG_ENDIAN,
+};
+
static void next_scsi_init(Object *obj)
{
NeXTSCSI *s =3D NEXT_SCSI(obj);
@@ -845,6 +897,9 @@ static void next_scsi_init(Object *obj)
=20
object_initialize_child(obj, "esp", &s->sysbus_esp, TYPE_SYSBUS_ESP);
=20
+ memory_region_init_io(&s->scsi_csr_mem, obj, &next_scsi_csr_ops,
+ s, "csrs", 2);
+
memory_region_init(&s->scsi_mem, obj, "next.scsi", 0x40);
sysbus_init_mmio(sbd, &s->scsi_mem);
}
@@ -874,15 +929,30 @@ static void next_scsi_realize(DeviceState *dev, Error=
**errp)
memory_region_add_subregion(&s->scsi_mem, 0x0,
sysbus_mmio_get_region(sbd, 0));
=20
+ /* SCSI CSRs */
+ memory_region_add_subregion(&s->scsi_mem, 0x20, &s->scsi_csr_mem);
+
scsi_bus_legacy_handle_cmdline(&s->sysbus_esp.esp.bus);
}
=20
+static const VMStateDescription next_scsi_vmstate =3D {
+ .name =3D "next-scsi",
+ .version_id =3D 0,
+ .minimum_version_id =3D 0,
+ .fields =3D (const VMStateField[]) {
+ VMSTATE_UINT8(scsi_csr_1, NeXTSCSI),
+ VMSTATE_UINT8(scsi_csr_2, NeXTSCSI),
+ VMSTATE_END_OF_LIST()
+ },
+};
+
static void next_scsi_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc =3D DEVICE_CLASS(klass);
=20
dc->desc =3D "NeXT SCSI Controller";
dc->realize =3D next_scsi_realize;
+ dc->vmsd =3D &next_scsi_vmstate;
}
=20
static const TypeInfo next_scsi_info =3D {
@@ -1000,8 +1070,8 @@ static const VMStateDescription next_rtc_vmstate =3D {
=20
static const VMStateDescription next_pc_vmstate =3D {
.name =3D "next-pc",
- .version_id =3D 2,
- .minimum_version_id =3D 2,
+ .version_id =3D 3,
+ .minimum_version_id =3D 3,
.fields =3D (const VMStateField[]) {
VMSTATE_UINT32(scr1, NeXTPC),
VMSTATE_UINT32(scr2, NeXTPC),
@@ -1009,8 +1079,6 @@ static const VMStateDescription next_pc_vmstate =3D {
VMSTATE_UINT32(int_mask, NeXTPC),
VMSTATE_UINT32(int_status, NeXTPC),
VMSTATE_UINT32(led, NeXTPC),
- VMSTATE_UINT8(scsi_csr_1, NeXTPC),
- VMSTATE_UINT8(scsi_csr_2, NeXTPC),
VMSTATE_STRUCT(rtc, NeXTPC, 0, next_rtc_vmstate, NextRtc),
VMSTATE_END_OF_LIST()
},
--=20
2.39.5
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From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
To: huth@tuxfamily.org,
qemu-devel@nongnu.org
Date: Thu, 12 Dec 2024 11:45:54 +0000
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Subject: [PATCH v2 08/34] next-cube: move SCSI 4020/4021 logic from next-pc
device to next-scsi device
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The SCSI 4020/4021 logic refers to the offset of the SCSI CSRs within the N=
eXTCube
address space. Due to the previously overlapping memory regions, there were
duplicate MMIO accessors in the next.scr memory region for these registers =
but
this has now been resolved.
Move the remaining SCSI 4020/4021 logic from the next-pc device to the next=
-scsi
device, with the exception that the SCSI 4021 register now returns its prev=
ious
value like a normal register instead of a hardcoded 0x40 value. This also m=
atches
how the registers are implemented in the Previous emulator.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Thomas Huth <huth@tuxfamily.org>
---
hw/m68k/next-cube.c | 139 ++++++++++++++++++++------------------------
1 file changed, 62 insertions(+), 77 deletions(-)
diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c
index 928740b281..ea1006efb3 100644
--- a/hw/m68k/next-cube.c
+++ b/hw/m68k/next-cube.c
@@ -365,8 +365,6 @@ static const MemoryRegionOps next_mmio_ops =3D {
=20
static uint64_t next_scr_readfn(void *opaque, hwaddr addr, unsigned size)
{
- NeXTPC *s =3D NEXT_PC(opaque);
- NeXTSCSI *ns =3D NEXT_SCSI(&s->next_scsi);
uint64_t val;
=20
switch (addr) {
@@ -375,16 +373,6 @@ static uint64_t next_scr_readfn(void *opaque, hwaddr a=
ddr, unsigned size)
val =3D 0x40 | 0x04 | 0x2 | 0x1;
break;
=20
- case 0x14020:
- DPRINTF("SCSI 4020 STATUS READ %X\n", ns->scsi_csr_1);
- val =3D ns->scsi_csr_1;
- break;
-
- case 0x14021:
- DPRINTF("SCSI 4021 STATUS READ %X\n", ns->scsi_csr_2);
- val =3D 0x40;
- break;
-
/*
* These 4 registers are the hardware timer, not sure which register
* is the latch instead of data, but no problems so far.
@@ -413,9 +401,6 @@ static uint64_t next_scr_readfn(void *opaque, hwaddr ad=
dr, unsigned size)
static void next_scr_writefn(void *opaque, hwaddr addr, uint64_t val,
unsigned size)
{
- NeXTPC *s =3D NEXT_PC(opaque);
- NeXTSCSI *ns =3D NEXT_SCSI(&s->next_scsi);
-
switch (addr) {
case 0x14108:
DPRINTF("FDCSR Write: %"PRIx64 "\n", val);
@@ -424,68 +409,6 @@ static void next_scr_writefn(void *opaque, hwaddr addr=
, uint64_t val,
}
break;
=20
- case 0x14020: /* SCSI Control Register */
- if (val & SCSICSR_FIFOFL) {
- DPRINTF("SCSICSR FIFO Flush\n");
- /* will have to add another irq to the esp if this is needed */
- /* esp_puflush_fifo(esp_g); */
- }
-
- if (val & SCSICSR_ENABLE) {
- DPRINTF("SCSICSR Enable\n");
- /*
- * qemu_irq_raise(s->scsi_dma);
- * s->scsi_csr_1 =3D 0xc0;
- * s->scsi_csr_1 |=3D 0x1;
- * qemu_irq_pulse(s->scsi_dma);
- */
- }
- /*
- * else
- * s->scsi_csr_1 &=3D ~SCSICSR_ENABLE;
- */
-
- if (val & SCSICSR_RESET) {
- DPRINTF("SCSICSR Reset\n");
- /* I think this should set DMADIR. CPUDMA and INTMASK to 0 */
- qemu_irq_raise(s->scsi_reset);
- ns->scsi_csr_1 &=3D ~(SCSICSR_INTMASK | 0x80 | 0x1);
- qemu_irq_lower(s->scsi_reset);
- }
- if (val & SCSICSR_DMADIR) {
- DPRINTF("SCSICSR DMAdir\n");
- }
- if (val & SCSICSR_CPUDMA) {
- DPRINTF("SCSICSR CPUDMA\n");
- /* qemu_irq_raise(s->scsi_dma); */
- s->int_status |=3D 0x4000000;
- } else {
- /* fprintf(stderr,"SCSICSR CPUDMA disabled\n"); */
- s->int_status &=3D ~(0x4000000);
- /* qemu_irq_lower(s->scsi_dma); */
- }
- if (val & SCSICSR_INTMASK) {
- DPRINTF("SCSICSR INTMASK\n");
- /*
- * int_mask &=3D ~0x1000;
- * s->scsi_csr_1 |=3D val;
- * s->scsi_csr_1 &=3D ~SCSICSR_INTMASK;
- * if (s->scsi_queued) {
- * s->scsi_queued =3D 0;
- * next_irq(s, NEXT_SCSI_I, level);
- * }
- */
- } else {
- /* int_mask |=3D 0x1000; */
- }
- if (val & 0x80) {
- /* int_mask |=3D 0x1000; */
- /* s->scsi_csr_1 |=3D 0x80; */
- }
- DPRINTF("SCSICSR Write: %"PRIx64 "\n", val);
- /* s->scsi_csr_1 =3D val; */
- break;
-
/* Hardware timer latch - not implemented yet */
case 0x1a000:
default:
@@ -846,13 +769,73 @@ static void next_scsi_csr_write(void *opaque, hwaddr =
addr, uint64_t val,
unsigned size)
{
NeXTSCSI *s =3D NEXT_SCSI(opaque);
+ NeXTPC *pc =3D NEXT_PC(container_of(s, NeXTPC, next_scsi));
=20
switch (addr) {
case 0:
+ if (val & SCSICSR_FIFOFL) {
+ DPRINTF("SCSICSR FIFO Flush\n");
+ /* will have to add another irq to the esp if this is needed */
+ /* esp_puflush_fifo(esp_g); */
+ }
+
+ if (val & SCSICSR_ENABLE) {
+ DPRINTF("SCSICSR Enable\n");
+ /*
+ * qemu_irq_raise(s->scsi_dma);
+ * s->scsi_csr_1 =3D 0xc0;
+ * s->scsi_csr_1 |=3D 0x1;
+ * qemu_irq_pulse(s->scsi_dma);
+ */
+ }
+ /*
+ * else
+ * s->scsi_csr_1 &=3D ~SCSICSR_ENABLE;
+ */
+
+ if (val & SCSICSR_RESET) {
+ DPRINTF("SCSICSR Reset\n");
+ /* I think this should set DMADIR. CPUDMA and INTMASK to 0 */
+ qemu_irq_raise(pc->scsi_reset);
+ s->scsi_csr_1 &=3D ~(SCSICSR_INTMASK | 0x80 | 0x1);
+ qemu_irq_lower(pc->scsi_reset);
+ }
+ if (val & SCSICSR_DMADIR) {
+ DPRINTF("SCSICSR DMAdir\n");
+ }
+ if (val & SCSICSR_CPUDMA) {
+ DPRINTF("SCSICSR CPUDMA\n");
+ /* qemu_irq_raise(s->scsi_dma); */
+ pc->int_status |=3D 0x4000000;
+ } else {
+ /* fprintf(stderr,"SCSICSR CPUDMA disabled\n"); */
+ pc->int_status &=3D ~(0x4000000);
+ /* qemu_irq_lower(s->scsi_dma); */
+ }
+ if (val & SCSICSR_INTMASK) {
+ DPRINTF("SCSICSR INTMASK\n");
+ /*
+ * int_mask &=3D ~0x1000;
+ * s->scsi_csr_1 |=3D val;
+ * s->scsi_csr_1 &=3D ~SCSICSR_INTMASK;
+ * if (s->scsi_queued) {
+ * s->scsi_queued =3D 0;
+ * next_irq(s, NEXT_SCSI_I, level);
+ * }
+ */
+ } else {
+ /* int_mask |=3D 0x1000; */
+ }
+ if (val & 0x80) {
+ /* int_mask |=3D 0x1000; */
+ /* s->scsi_csr_1 |=3D 0x80; */
+ }
+ DPRINTF("SCSICSR1 Write: %"PRIx64 "\n", val);
s->scsi_csr_1 =3D val;
break;
=20
case 1:
+ DPRINTF("SCSICSR2 Write: %"PRIx64 "\n", val);
s->scsi_csr_2 =3D val;
break;
=20
@@ -868,10 +851,12 @@ static uint64_t next_scsi_csr_read(void *opaque, hwad=
dr addr, unsigned size)
=20
switch (addr) {
case 0:
+ DPRINTF("SCSI 4020 STATUS READ %X\n", s->scsi_csr_1);
val =3D s->scsi_csr_1;
break;
=20
case 1:
+ DPRINTF("SCSI 4021 STATUS READ %X\n", s->scsi_csr_2);
val =3D s->scsi_csr_2;
break;
=20
--=20
2.39.5
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From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
To: huth@tuxfamily.org,
qemu-devel@nongnu.org
Date: Thu, 12 Dec 2024 11:45:55 +0000
Message-Id: <20241212114620.549285-10-mark.cave-ayland@ilande.co.uk>
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Subject: [PATCH v2 09/34] next-cube: move floppy disk MMIO to separate memory
region in next-pc
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The dummy floppy disk device is part of the next-pc device, and not related=
to
the NeXTCube SCRs.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Thomas Huth <huth@tuxfamily.org>
---
hw/m68k/next-cube.c | 61 ++++++++++++++++++++++++++++++++++++---------
1 file changed, 49 insertions(+), 12 deletions(-)
diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c
index ea1006efb3..d08026ccf9 100644
--- a/hw/m68k/next-cube.c
+++ b/hw/m68k/next-cube.c
@@ -108,6 +108,7 @@ struct NeXTPC {
=20
M68kCPU *cpu;
=20
+ MemoryRegion floppy_mem;
MemoryRegion mmiomem;
MemoryRegion scrmem;
=20
@@ -368,11 +369,6 @@ static uint64_t next_scr_readfn(void *opaque, hwaddr a=
ddr, unsigned size)
uint64_t val;
=20
switch (addr) {
- case 0x14108:
- DPRINTF("FD read @ %x\n", (unsigned int)addr);
- val =3D 0x40 | 0x04 | 0x2 | 0x1;
- break;
-
/*
* These 4 registers are the hardware timer, not sure which register
* is the latch instead of data, but no problems so far.
@@ -402,13 +398,6 @@ static void next_scr_writefn(void *opaque, hwaddr addr=
, uint64_t val,
unsigned size)
{
switch (addr) {
- case 0x14108:
- DPRINTF("FDCSR Write: %"PRIx64 "\n", val);
- if (val =3D=3D 0x0) {
- /* qemu_irq_raise(s->fd_irq[0]); */
- }
- break;
-
/* Hardware timer latch - not implemented yet */
case 0x1a000:
default:
@@ -948,6 +937,47 @@ static const TypeInfo next_scsi_info =3D {
.class_init =3D next_scsi_class_init,
};
=20
+static void next_floppy_write(void *opaque, hwaddr addr, uint64_t val,
+ unsigned size)
+{
+ switch (addr) {
+ case 0:
+ DPRINTF("FDCSR Write: %"PRIx64 "\n", val);
+ if (val =3D=3D 0x0) {
+ /* qemu_irq_raise(s->fd_irq[0]); */
+ }
+ break;
+
+ default:
+ g_assert_not_reached();
+ }
+}
+
+static uint64_t next_floppy_read(void *opaque, hwaddr addr, unsigned size)
+{
+ uint64_t val;
+
+ switch (addr) {
+ case 0:
+ DPRINTF("FD read @ %x\n", (unsigned int)addr);
+ val =3D 0x40 | 0x04 | 0x2 | 0x1;
+ break;
+
+ default:
+ g_assert_not_reached();
+ }
+
+ return val;
+}
+
+static const MemoryRegionOps next_floppy_ops =3D {
+ .read =3D next_floppy_read,
+ .write =3D next_floppy_write,
+ .valid.min_access_size =3D 1,
+ .valid.max_access_size =3D 4,
+ .endianness =3D DEVICE_BIG_ENDIAN,
+};
+
static void next_escc_init(DeviceState *pcdev)
{
DeviceState *dev;
@@ -1006,6 +1036,10 @@ static void next_pc_realize(DeviceState *dev, Error =
**errp)
=20
s->scsi_reset =3D qdev_get_gpio_in(d, 0);
s->scsi_dma =3D qdev_get_gpio_in(d, 1);
+
+ /* Floppy */
+ memory_region_add_subregion(&s->scrmem, 0x14108,
+ &s->floppy_mem);
}
=20
static void next_pc_init(Object *obj)
@@ -1024,6 +1058,9 @@ static void next_pc_init(Object *obj)
sysbus_init_mmio(sbd, &s->scrmem);
=20
object_initialize_child(obj, "next-scsi", &s->next_scsi, TYPE_NEXT_SCS=
I);
+
+ memory_region_init_io(&s->floppy_mem, OBJECT(s), &next_floppy_ops, s,
+ "next.floppy", 4);
}
=20
/*
--=20
2.39.5
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From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
To: huth@tuxfamily.org,
qemu-devel@nongnu.org
Date: Thu, 12 Dec 2024 11:45:56 +0000
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Subject: [PATCH v2 10/34] next-cube: map ESCC registers as a subregion of the
next.scr memory region
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Since the ESCC device exists within the memory range of the next.scr memory=
region, map
the ESCC device registers as a subregion of the next.scr memory region inst=
ead of
directly to the system address space.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Thomas Huth <huth@tuxfamily.org>
Reviewed-by: Philippe Mathieu-Daud=C3=A9 <philmd@linaro.org>
---
hw/m68k/next-cube.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c
index d08026ccf9..efbb11e74b 100644
--- a/hw/m68k/next-cube.c
+++ b/hw/m68k/next-cube.c
@@ -980,6 +980,7 @@ static const MemoryRegionOps next_floppy_ops =3D {
=20
static void next_escc_init(DeviceState *pcdev)
{
+ NeXTPC *next_pc =3D NEXT_PC(pcdev);
DeviceState *dev;
SysBusDevice *s;
=20
@@ -997,7 +998,9 @@ static void next_escc_init(DeviceState *pcdev)
sysbus_realize_and_unref(s, &error_fatal);
sysbus_connect_irq(s, 0, qdev_get_gpio_in(pcdev, NEXT_SCC_I));
sysbus_connect_irq(s, 1, qdev_get_gpio_in(pcdev, NEXT_SCC_DMA_I));
- sysbus_mmio_map(s, 0, 0x2118000);
+
+ memory_region_add_subregion(&next_pc->scrmem, 0x18000,
+ sysbus_mmio_get_region(s, 0));
}
=20
static void next_pc_reset(DeviceState *dev)
--=20
2.39.5
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From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
To: huth@tuxfamily.org,
qemu-devel@nongnu.org
Date: Thu, 12 Dec 2024 11:45:57 +0000
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Since the ESCC is part of the next-pc device, move the ESCC to be a QOM chi=
ld
of the next-pc device.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daud=C3=A9 <philmd@linaro.org>
Reviewed-by: Thomas Huth <huth@tuxfamily.org>
---
hw/m68k/next-cube.c | 54 ++++++++++++++++++++++-----------------------
1 file changed, 26 insertions(+), 28 deletions(-)
diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c
index efbb11e74b..20a0b073e1 100644
--- a/hw/m68k/next-cube.c
+++ b/hw/m68k/next-cube.c
@@ -124,6 +124,8 @@ struct NeXTPC {
qemu_irq scsi_reset;
qemu_irq scsi_dma;
=20
+ ESCCState escc;
+
NextRtc rtc;
};
=20
@@ -978,31 +980,6 @@ static const MemoryRegionOps next_floppy_ops =3D {
.endianness =3D DEVICE_BIG_ENDIAN,
};
=20
-static void next_escc_init(DeviceState *pcdev)
-{
- NeXTPC *next_pc =3D NEXT_PC(pcdev);
- DeviceState *dev;
- SysBusDevice *s;
-
- dev =3D qdev_new(TYPE_ESCC);
- qdev_prop_set_uint32(dev, "disabled", 0);
- qdev_prop_set_uint32(dev, "frequency", 9600 * 384);
- qdev_prop_set_uint32(dev, "it_shift", 0);
- qdev_prop_set_bit(dev, "bit_swap", true);
- qdev_prop_set_chr(dev, "chrB", serial_hd(1));
- qdev_prop_set_chr(dev, "chrA", serial_hd(0));
- qdev_prop_set_uint32(dev, "chnBtype", escc_serial);
- qdev_prop_set_uint32(dev, "chnAtype", escc_serial);
-
- s =3D SYS_BUS_DEVICE(dev);
- sysbus_realize_and_unref(s, &error_fatal);
- sysbus_connect_irq(s, 0, qdev_get_gpio_in(pcdev, NEXT_SCC_I));
- sysbus_connect_irq(s, 1, qdev_get_gpio_in(pcdev, NEXT_SCC_DMA_I));
-
- memory_region_add_subregion(&next_pc->scrmem, 0x18000,
- sysbus_mmio_get_region(s, 0));
-}
-
static void next_pc_reset(DeviceState *dev)
{
NeXTPC *s =3D NEXT_PC(dev);
@@ -1043,6 +1020,28 @@ static void next_pc_realize(DeviceState *dev, Error =
**errp)
/* Floppy */
memory_region_add_subregion(&s->scrmem, 0x14108,
&s->floppy_mem);
+
+ /* ESCC */
+ d =3D DEVICE(object_resolve_path_component(OBJECT(dev), "escc"));
+ qdev_prop_set_uint32(d, "disabled", 0);
+ qdev_prop_set_uint32(d, "frequency", 9600 * 384);
+ qdev_prop_set_uint32(d, "it_shift", 0);
+ qdev_prop_set_bit(d, "bit_swap", true);
+ qdev_prop_set_chr(d, "chrB", serial_hd(1));
+ qdev_prop_set_chr(d, "chrA", serial_hd(0));
+ qdev_prop_set_uint32(d, "chnBtype", escc_serial);
+ qdev_prop_set_uint32(d, "chnAtype", escc_serial);
+
+ sbd =3D SYS_BUS_DEVICE(d);
+ if (!sysbus_realize(sbd, errp)) {
+ return;
+ }
+ sysbus_connect_irq(sbd, 0, qdev_get_gpio_in(dev, NEXT_SCC_I));
+ sysbus_connect_irq(sbd, 1, qdev_get_gpio_in(dev, NEXT_SCC_DMA_I));
+
+ memory_region_add_subregion(&s->scrmem, 0x18000,
+ sysbus_mmio_get_region(sbd, 0));
+
}
=20
static void next_pc_init(Object *obj)
@@ -1064,6 +1063,8 @@ static void next_pc_init(Object *obj)
=20
memory_region_init_io(&s->floppy_mem, OBJECT(s), &next_floppy_ops, s,
"next.floppy", 4);
+
+ object_initialize_child(obj, "escc", &s->escc, TYPE_ESCC);
}
=20
/*
@@ -1201,9 +1202,6 @@ static void next_cube_init(MachineState *machine)
}
}
=20
- /* Serial */
- next_escc_init(pcdev);
-
/* TODO: */
/* Network */
=20
--=20
2.39.5
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From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
To: huth@tuxfamily.org,
qemu-devel@nongnu.org
Date: Thu, 12 Dec 2024 11:45:58 +0000
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Subject: [PATCH v2 12/34] next-cube: move timer MMIO to separate memory region
on next-pc device
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Move the timer MMIO accesses to a separate memory region on the next-pc dev=
ice
instead of being part of the next.scr MMIO memory region.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Thomas Huth <huth@tuxfamily.org>
Reviewed-by: Philippe Mathieu-Daud=C3=A9 <philmd@linaro.org>
---
hw/m68k/next-cube.c | 63 +++++++++++++++++++++++++++++++++++----------
1 file changed, 50 insertions(+), 13 deletions(-)
diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c
index 20a0b073e1..861d90024a 100644
--- a/hw/m68k/next-cube.c
+++ b/hw/m68k/next-cube.c
@@ -109,6 +109,7 @@ struct NeXTPC {
M68kCPU *cpu;
=20
MemoryRegion floppy_mem;
+ MemoryRegion timer_mem;
MemoryRegion mmiomem;
MemoryRegion scrmem;
=20
@@ -371,17 +372,6 @@ static uint64_t next_scr_readfn(void *opaque, hwaddr a=
ddr, unsigned size)
uint64_t val;
=20
switch (addr) {
- /*
- * These 4 registers are the hardware timer, not sure which register
- * is the latch instead of data, but no problems so far.
- *
- * Hack: We need to have the LSB change consistently to make it work
- */
- case 0x1a000 ... 0x1a003:
- val =3D extract32(clock(), (4 - (addr - 0x1a000) - size) << 3,
- size << 3);
- break;
-
/* For now return dummy byte to allow the Ethernet test to timeout */
case 0x6000:
val =3D 0xff;
@@ -400,8 +390,6 @@ static void next_scr_writefn(void *opaque, hwaddr addr,=
uint64_t val,
unsigned size)
{
switch (addr) {
- /* Hardware timer latch - not implemented yet */
- case 0x1a000:
default:
DPRINTF("BMAP Write @ 0x%x with 0x%"PRIx64 " size %u\n",
(unsigned int)addr, val, size);
@@ -980,6 +968,50 @@ static const MemoryRegionOps next_floppy_ops =3D {
.endianness =3D DEVICE_BIG_ENDIAN,
};
=20
+static void next_timer_write(void *opaque, hwaddr addr, uint64_t val,
+ unsigned size)
+{
+ switch (addr) {
+ case 0 ... 3:
+ /* Hardware timer latch - not implemented yet */
+ break;
+
+ default:
+ g_assert_not_reached();
+ }
+}
+
+static uint64_t next_timer_read(void *opaque, hwaddr addr, unsigned size)
+{
+ uint64_t val;
+
+ switch (addr) {
+ case 0 ... 3:
+ /*
+ * These 4 registers are the hardware timer, not sure which regist=
er
+ * is the latch instead of data, but no problems so far.
+ *
+ * Hack: We need to have the LSB change consistently to make it wo=
rk
+ */
+ val =3D extract32(clock(), (4 - addr - size) << 3,
+ size << 3);
+ break;
+
+ default:
+ g_assert_not_reached();
+ }
+
+ return val;
+}
+
+static const MemoryRegionOps next_timer_ops =3D {
+ .read =3D next_timer_read,
+ .write =3D next_timer_write,
+ .valid.min_access_size =3D 1,
+ .valid.max_access_size =3D 4,
+ .endianness =3D DEVICE_BIG_ENDIAN,
+};
+
static void next_pc_reset(DeviceState *dev)
{
NeXTPC *s =3D NEXT_PC(dev);
@@ -1042,6 +1074,8 @@ static void next_pc_realize(DeviceState *dev, Error *=
*errp)
memory_region_add_subregion(&s->scrmem, 0x18000,
sysbus_mmio_get_region(sbd, 0));
=20
+ /* Timer */
+ memory_region_add_subregion(&s->scrmem, 0x1a000, &s->timer_mem);
}
=20
static void next_pc_init(Object *obj)
@@ -1065,6 +1099,9 @@ static void next_pc_init(Object *obj)
"next.floppy", 4);
=20
object_initialize_child(obj, "escc", &s->escc, TYPE_ESCC);
+
+ memory_region_init_io(&s->timer_mem, OBJECT(s), &next_timer_ops, s,
+ "next.timer", 4);
}
=20
/*
--=20
2.39.5
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Date: Thu, 12 Dec 2024 11:45:59 +0000
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Move the en ethernet MMIO accesses to a separate memory region on the next-=
pc
device instead of being part of the next.scr MMIO memory region.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Thomas Huth <huth@tuxfamily.org>
---
hw/m68k/next-cube.c | 48 +++++++++++++++++++++++++++++++++++++--------
1 file changed, 40 insertions(+), 8 deletions(-)
diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c
index 861d90024a..76ecf86ed0 100644
--- a/hw/m68k/next-cube.c
+++ b/hw/m68k/next-cube.c
@@ -110,6 +110,7 @@ struct NeXTPC {
=20
MemoryRegion floppy_mem;
MemoryRegion timer_mem;
+ MemoryRegion dummyen_mem;
MemoryRegion mmiomem;
MemoryRegion scrmem;
=20
@@ -372,11 +373,6 @@ static uint64_t next_scr_readfn(void *opaque, hwaddr a=
ddr, unsigned size)
uint64_t val;
=20
switch (addr) {
- /* For now return dummy byte to allow the Ethernet test to timeout */
- case 0x6000:
- val =3D 0xff;
- break;
-
default:
DPRINTF("BMAP Read @ 0x%x size %u\n", (unsigned int)addr, size);
val =3D 0;
@@ -1012,6 +1008,38 @@ static const MemoryRegionOps next_timer_ops =3D {
.endianness =3D DEVICE_BIG_ENDIAN,
};
=20
+static void next_dummy_en_write(void *opaque, hwaddr addr, uint64_t val,
+ unsigned size)
+{
+ /* Do nothing */
+ return;
+}
+
+static uint64_t next_dummy_en_read(void *opaque, hwaddr addr, unsigned siz=
e)
+{
+ uint64_t val;
+
+ switch (addr) {
+ case 0:
+ /* For now return dummy byte to allow the Ethernet test to timeout=
*/
+ val =3D 0xff;
+ break;
+
+ default:
+ val =3D 0;
+ }
+
+ return val;
+}
+
+static const MemoryRegionOps next_dummy_en_ops =3D {
+ .read =3D next_dummy_en_read,
+ .write =3D next_dummy_en_write,
+ .valid.min_access_size =3D 1,
+ .valid.max_access_size =3D 4,
+ .endianness =3D DEVICE_BIG_ENDIAN,
+};
+
static void next_pc_reset(DeviceState *dev)
{
NeXTPC *s =3D NEXT_PC(dev);
@@ -1034,6 +1062,10 @@ static void next_pc_realize(DeviceState *dev, Error =
**errp)
SysBusDevice *sbd;
DeviceState *d;
=20
+ /* en network (dummy) */
+ memory_region_add_subregion(&s->scrmem, 0x6000,
+ &s->dummyen_mem);
+
/* SCSI */
sbd =3D SYS_BUS_DEVICE(&s->next_scsi);
if (!sysbus_realize(sbd, errp)) {
@@ -1093,6 +1125,9 @@ static void next_pc_init(Object *obj)
sysbus_init_mmio(sbd, &s->mmiomem);
sysbus_init_mmio(sbd, &s->scrmem);
=20
+ memory_region_init_io(&s->dummyen_mem, OBJECT(s), &next_dummy_en_ops, =
s,
+ "next.en", 0x20);
+
object_initialize_child(obj, "next-scsi", &s->next_scsi, TYPE_NEXT_SCS=
I);
=20
memory_region_init_io(&s->floppy_mem, OBJECT(s), &next_floppy_ops, s,
@@ -1239,9 +1274,6 @@ static void next_cube_init(MachineState *machine)
}
}
=20
- /* TODO: */
- /* Network */
-
/* DMA */
memory_region_init_io(&m->dmamem, NULL, &next_dma_ops, machine,
"next.dma", 0x5000);
--=20
2.39.5
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From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
To: huth@tuxfamily.org,
qemu-devel@nongnu.org
Date: Thu, 12 Dec 2024 11:46:00 +0000
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Subject: [PATCH v2 14/34] next-cube: add empty slots for unknown accesses to
next.scr memory region
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The next.scr memory is now effectively unused, however there are 3 separate=
region
accesses still logged that occur when booting a NeXTStep disk image. Use the
empty_slot device to capture and ignore memory accesses to these 3 memory r=
egions.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Thomas Huth <huth@tuxfamily.org>
---
hw/m68k/Kconfig | 1 +
hw/m68k/next-cube.c | 8 ++++++++
2 files changed, 9 insertions(+)
diff --git a/hw/m68k/Kconfig b/hw/m68k/Kconfig
index 0092cda4e9..aff769b30f 100644
--- a/hw/m68k/Kconfig
+++ b/hw/m68k/Kconfig
@@ -18,6 +18,7 @@ config NEXTCUBE
depends on M68K
select FRAMEBUFFER
select ESCC
+ select EMPTY_SLOT
=20
config Q800
bool
diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c
index 76ecf86ed0..95d01030cd 100644
--- a/hw/m68k/next-cube.c
+++ b/hw/m68k/next-cube.c
@@ -22,6 +22,7 @@
#include "qom/object.h"
#include "hw/char/escc.h" /* ZILOG 8530 Serial Emulation */
#include "hw/block/fdc.h"
+#include "hw/misc/empty_slot.h"
#include "hw/qdev-properties.h"
#include "qapi/error.h"
#include "qemu/error-report.h"
@@ -1239,6 +1240,13 @@ static void next_cube_init(MachineState *machine)
/* BMAP IO - acts as a catch-all for now */
sysbus_mmio_map(SYS_BUS_DEVICE(pcdev), 1, 0x02100000);
=20
+ /* unknown: Brightness control register? */
+ empty_slot_init("next.unknown", 0x02110000, 0x10);
+ /* unknown: Magneto-Optical drive controller? */
+ empty_slot_init("next.unknown", 0x02112000, 0x10);
+ /* unknown: Serial clock configuration register? */
+ empty_slot_init("next.unknown", 0x02118004, 0x10);
+
/* BMAP memory */
memory_region_init_ram_flags_nomigrate(&m->bmapm1, NULL, "next.bmapmem=
",
64, RAM_SHARED, &error_fatal);
--=20
2.39.5
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From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
To: huth@tuxfamily.org,
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Date: Thu, 12 Dec 2024 11:46:01 +0000
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Subject: [PATCH v2 15/34] next-cube: remove unused next.scr memory region
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Now that the next.scr memory region is unused it can be removed and the nex=
t-pc
devices mapped directly within the machine init function. This is the last
remaining overlapping memory region within the NeXTCube machine.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Thomas Huth <huth@tuxfamily.org>
---
hw/m68k/next-cube.c | 73 +++++++++++++--------------------------------
1 file changed, 21 insertions(+), 52 deletions(-)
diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c
index 95d01030cd..86a0aaa511 100644
--- a/hw/m68k/next-cube.c
+++ b/hw/m68k/next-cube.c
@@ -369,38 +369,6 @@ static const MemoryRegionOps next_mmio_ops =3D {
#define SCSICSR_CPUDMA 0x10 /* if set, dma enabled */
#define SCSICSR_INTMASK 0x20 /* if set, interrupt enabled */
=20
-static uint64_t next_scr_readfn(void *opaque, hwaddr addr, unsigned size)
-{
- uint64_t val;
-
- switch (addr) {
- default:
- DPRINTF("BMAP Read @ 0x%x size %u\n", (unsigned int)addr, size);
- val =3D 0;
- break;
- }
-
- return val;
-}
-
-static void next_scr_writefn(void *opaque, hwaddr addr, uint64_t val,
- unsigned size)
-{
- switch (addr) {
- default:
- DPRINTF("BMAP Write @ 0x%x with 0x%"PRIx64 " size %u\n",
- (unsigned int)addr, val, size);
- }
-}
-
-static const MemoryRegionOps next_scr_ops =3D {
- .read =3D next_scr_readfn,
- .write =3D next_scr_writefn,
- .valid.min_access_size =3D 1,
- .valid.max_access_size =3D 4,
- .endianness =3D DEVICE_BIG_ENDIAN,
-};
-
#define NEXTDMA_SCSI(x) (0x10 + x)
#define NEXTDMA_FD(x) (0x10 + x)
#define NEXTDMA_ENTX(x) (0x110 + x)
@@ -1063,17 +1031,11 @@ static void next_pc_realize(DeviceState *dev, Error=
**errp)
SysBusDevice *sbd;
DeviceState *d;
=20
- /* en network (dummy) */
- memory_region_add_subregion(&s->scrmem, 0x6000,
- &s->dummyen_mem);
-
/* SCSI */
sbd =3D SYS_BUS_DEVICE(&s->next_scsi);
if (!sysbus_realize(sbd, errp)) {
return;
}
- memory_region_add_subregion(&s->scrmem, 0x14000,
- sysbus_mmio_get_region(sbd, 0));
=20
d =3D DEVICE(object_resolve_path_component(OBJECT(&s->next_scsi), "esp=
"));
sysbus_connect_irq(SYS_BUS_DEVICE(d), 0,
@@ -1082,10 +1044,6 @@ static void next_pc_realize(DeviceState *dev, Error =
**errp)
s->scsi_reset =3D qdev_get_gpio_in(d, 0);
s->scsi_dma =3D qdev_get_gpio_in(d, 1);
=20
- /* Floppy */
- memory_region_add_subregion(&s->scrmem, 0x14108,
- &s->floppy_mem);
-
/* ESCC */
d =3D DEVICE(object_resolve_path_component(OBJECT(dev), "escc"));
qdev_prop_set_uint32(d, "disabled", 0);
@@ -1103,12 +1061,6 @@ static void next_pc_realize(DeviceState *dev, Error =
**errp)
}
sysbus_connect_irq(sbd, 0, qdev_get_gpio_in(dev, NEXT_SCC_I));
sysbus_connect_irq(sbd, 1, qdev_get_gpio_in(dev, NEXT_SCC_DMA_I));
-
- memory_region_add_subregion(&s->scrmem, 0x18000,
- sysbus_mmio_get_region(sbd, 0));
-
- /* Timer */
- memory_region_add_subregion(&s->scrmem, 0x1a000, &s->timer_mem);
}
=20
static void next_pc_init(Object *obj)
@@ -1120,24 +1072,27 @@ static void next_pc_init(Object *obj)
=20
memory_region_init_io(&s->mmiomem, OBJECT(s), &next_mmio_ops, s,
"next.mmio", 0x9000);
- memory_region_init_io(&s->scrmem, OBJECT(s), &next_scr_ops, s,
- "next.scr", 0x20000);
-
sysbus_init_mmio(sbd, &s->mmiomem);
- sysbus_init_mmio(sbd, &s->scrmem);
=20
memory_region_init_io(&s->dummyen_mem, OBJECT(s), &next_dummy_en_ops, =
s,
"next.en", 0x20);
+ sysbus_init_mmio(sbd, &s->dummyen_mem);
=20
object_initialize_child(obj, "next-scsi", &s->next_scsi, TYPE_NEXT_SCS=
I);
+ sysbus_init_mmio(sbd,
+ sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->next_scsi),=
0));
=20
memory_region_init_io(&s->floppy_mem, OBJECT(s), &next_floppy_ops, s,
"next.floppy", 4);
+ sysbus_init_mmio(sbd, &s->floppy_mem);
=20
object_initialize_child(obj, "escc", &s->escc, TYPE_ESCC);
+ sysbus_init_mmio(sbd,
+ sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->escc), 0));
=20
memory_region_init_io(&s->timer_mem, OBJECT(s), &next_timer_ops, s,
"next.timer", 4);
+ sysbus_init_mmio(sbd, &s->timer_mem);
}
=20
/*
@@ -1240,13 +1195,27 @@ static void next_cube_init(MachineState *machine)
/* BMAP IO - acts as a catch-all for now */
sysbus_mmio_map(SYS_BUS_DEVICE(pcdev), 1, 0x02100000);
=20
+ /* en network (dummy) */
+ sysbus_mmio_map(SYS_BUS_DEVICE(pcdev), 1, 0x02106000);
+
/* unknown: Brightness control register? */
empty_slot_init("next.unknown", 0x02110000, 0x10);
/* unknown: Magneto-Optical drive controller? */
empty_slot_init("next.unknown", 0x02112000, 0x10);
+
+ /* SCSI */
+ sysbus_mmio_map(SYS_BUS_DEVICE(pcdev), 2, 0x02114000);
+ /* Floppy */
+ sysbus_mmio_map(SYS_BUS_DEVICE(pcdev), 3, 0x02114108);
+ /* ESCC */
+ sysbus_mmio_map(SYS_BUS_DEVICE(pcdev), 4, 0x02118000);
+
/* unknown: Serial clock configuration register? */
empty_slot_init("next.unknown", 0x02118004, 0x10);
=20
+ /* Timer */
+ sysbus_mmio_map(SYS_BUS_DEVICE(pcdev), 5, 0x0211a000);
+
/* BMAP memory */
memory_region_init_ram_flags_nomigrate(&m->bmapm1, NULL, "next.bmapmem=
",
64, RAM_SHARED, &error_fatal);
--=20
2.39.5
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From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
To: huth@tuxfamily.org,
qemu-devel@nongnu.org
Date: Thu, 12 Dec 2024 11:46:02 +0000
Message-Id: <20241212114620.549285-17-mark.cave-ayland@ilande.co.uk>
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Subject: [PATCH v2 16/34] next-cube: rearrange NeXTState declarations to
improve readability
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Move the NeXTState, next_dma and TYPE_NEXT_MACHINE definition to the same a=
rea
at the top of next-cube.c.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Thomas Huth <huth@tuxfamily.org>
Reviewed-by: Philippe Mathieu-Daud=C3=A9 <philmd@linaro.org>
---
hw/m68k/next-cube.c | 64 ++++++++++++++++++++++-----------------------
1 file changed, 32 insertions(+), 32 deletions(-)
diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c
index 86a0aaa511..5333fc7bef 100644
--- a/hw/m68k/next-cube.c
+++ b/hw/m68k/next-cube.c
@@ -38,30 +38,10 @@
#define DPRINTF(fmt, ...) do { } while (0)
#endif
=20
-#define TYPE_NEXT_MACHINE MACHINE_TYPE_NAME("next-cube")
-OBJECT_DECLARE_SIMPLE_TYPE(NeXTState, NEXT_MACHINE)
-
#define ENTRY 0x0100001e
#define RAM_SIZE 0x4000000
#define ROM_FILE "Rev_2.5_v66.bin"
=20
-typedef struct next_dma {
- uint32_t csr;
-
- uint32_t saved_next;
- uint32_t saved_limit;
- uint32_t saved_start;
- uint32_t saved_stop;
-
- uint32_t next;
- uint32_t limit;
- uint32_t start;
- uint32_t stop;
-
- uint32_t next_initbuf;
- uint32_t size;
-} next_dma;
-
typedef struct NextRtc {
int8_t phase;
uint8_t ram[32];
@@ -72,18 +52,6 @@ typedef struct NextRtc {
uint8_t retval;
} NextRtc;
=20
-struct NeXTState {
- MachineState parent;
-
- MemoryRegion rom;
- MemoryRegion rom2;
- MemoryRegion dmamem;
- MemoryRegion bmapm1;
- MemoryRegion bmapm2;
-
- next_dma dma[10];
-};
-
#define TYPE_NEXT_SCSI "next-scsi"
OBJECT_DECLARE_SIMPLE_TYPE(NeXTSCSI, NEXT_SCSI)
=20
@@ -132,6 +100,38 @@ struct NeXTPC {
NextRtc rtc;
};
=20
+typedef struct next_dma {
+ uint32_t csr;
+
+ uint32_t saved_next;
+ uint32_t saved_limit;
+ uint32_t saved_start;
+ uint32_t saved_stop;
+
+ uint32_t next;
+ uint32_t limit;
+ uint32_t start;
+ uint32_t stop;
+
+ uint32_t next_initbuf;
+ uint32_t size;
+} next_dma;
+
+#define TYPE_NEXT_MACHINE MACHINE_TYPE_NAME("next-cube")
+OBJECT_DECLARE_SIMPLE_TYPE(NeXTState, NEXT_MACHINE)
+
+struct NeXTState {
+ MachineState parent;
+
+ MemoryRegion rom;
+ MemoryRegion rom2;
+ MemoryRegion dmamem;
+ MemoryRegion bmapm1;
+ MemoryRegion bmapm2;
+
+ next_dma dma[10];
+};
+
/* Thanks to NeXT forums for this */
/*
static const uint8_t rtc_ram3[32] =3D {
--=20
2.39.5
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From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
To: huth@tuxfamily.org,
qemu-devel@nongnu.org
Date: Thu, 12 Dec 2024 11:46:03 +0000
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Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Thomas Huth <huth@tuxfamily.org>
Reviewed-by: Philippe Mathieu-Daud=C3=A9 <philmd@linaro.org>
---
hw/m68k/next-cube.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c
index 5333fc7bef..4a11fe6b39 100644
--- a/hw/m68k/next-cube.c
+++ b/hw/m68k/next-cube.c
@@ -1009,9 +1009,9 @@ static const MemoryRegionOps next_dummy_en_ops =3D {
.endianness =3D DEVICE_BIG_ENDIAN,
};
=20
-static void next_pc_reset(DeviceState *dev)
+static void next_pc_reset_hold(Object *obj, ResetType type)
{
- NeXTPC *s =3D NEXT_PC(dev);
+ NeXTPC *s =3D NEXT_PC(obj);
=20
/* Set internal registers to initial values */
/* 0x0000XX00 << vital bits */
@@ -1141,12 +1141,13 @@ static const VMStateDescription next_pc_vmstate =3D=
{
static void next_pc_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc =3D DEVICE_CLASS(klass);
+ ResettableClass *rc =3D RESETTABLE_CLASS(klass);
=20
dc->desc =3D "NeXT Peripheral Controller";
dc->realize =3D next_pc_realize;
- device_class_set_legacy_reset(dc, next_pc_reset);
device_class_set_props(dc, next_pc_properties);
dc->vmsd =3D &next_pc_vmstate;
+ rc->phases.hold =3D next_pc_reset_hold;
}
=20
static const TypeInfo next_pc_info =3D {
--=20
2.39.5
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From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
To: huth@tuxfamily.org,
qemu-devel@nongnu.org
Date: Thu, 12 Dec 2024 11:46:04 +0000
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Subject: [PATCH v2 18/34] next-cube: rename typedef struct NextRtc to NeXTRTC
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This brings the capitalisation in line with the other NeXTCube definitions.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Thomas Huth <huth@tuxfamily.org>
---
hw/m68k/next-cube.c | 24 ++++++++++++------------
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c
index 4a11fe6b39..0b07cd1a75 100644
--- a/hw/m68k/next-cube.c
+++ b/hw/m68k/next-cube.c
@@ -42,7 +42,7 @@
#define RAM_SIZE 0x4000000
#define ROM_FILE "Rev_2.5_v66.bin"
=20
-typedef struct NextRtc {
+typedef struct NeXTRTC {
int8_t phase;
uint8_t ram[32];
uint8_t command;
@@ -50,7 +50,7 @@ typedef struct NextRtc {
uint8_t status;
uint8_t control;
uint8_t retval;
-} NextRtc;
+} NeXTRTC;
=20
#define TYPE_NEXT_SCSI "next-scsi"
OBJECT_DECLARE_SIMPLE_TYPE(NeXTSCSI, NEXT_SCSI)
@@ -97,7 +97,7 @@ struct NeXTPC {
=20
ESCCState escc;
=20
- NextRtc rtc;
+ NeXTRTC rtc;
};
=20
typedef struct next_dma {
@@ -167,7 +167,7 @@ static void next_scr2_led_update(NeXTPC *s)
static void next_scr2_rtc_update(NeXTPC *s)
{
uint8_t old_scr2, scr2_2;
- NextRtc *rtc =3D &s->rtc;
+ NeXTRTC *rtc =3D &s->rtc;
=20
old_scr2 =3D extract32(s->old_scr2, 8, 8);
scr2_2 =3D extract32(s->scr2, 8, 8);
@@ -1111,13 +1111,13 @@ static const VMStateDescription next_rtc_vmstate =
=3D {
.version_id =3D 2,
.minimum_version_id =3D 2,
.fields =3D (const VMStateField[]) {
- VMSTATE_INT8(phase, NextRtc),
- VMSTATE_UINT8_ARRAY(ram, NextRtc, 32),
- VMSTATE_UINT8(command, NextRtc),
- VMSTATE_UINT8(value, NextRtc),
- VMSTATE_UINT8(status, NextRtc),
- VMSTATE_UINT8(control, NextRtc),
- VMSTATE_UINT8(retval, NextRtc),
+ VMSTATE_INT8(phase, NeXTRTC),
+ VMSTATE_UINT8_ARRAY(ram, NeXTRTC, 32),
+ VMSTATE_UINT8(command, NeXTRTC),
+ VMSTATE_UINT8(value, NeXTRTC),
+ VMSTATE_UINT8(status, NeXTRTC),
+ VMSTATE_UINT8(control, NeXTRTC),
+ VMSTATE_UINT8(retval, NeXTRTC),
VMSTATE_END_OF_LIST()
},
};
@@ -1133,7 +1133,7 @@ static const VMStateDescription next_pc_vmstate =3D {
VMSTATE_UINT32(int_mask, NeXTPC),
VMSTATE_UINT32(int_status, NeXTPC),
VMSTATE_UINT32(led, NeXTPC),
- VMSTATE_STRUCT(rtc, NeXTPC, 0, next_rtc_vmstate, NextRtc),
+ VMSTATE_STRUCT(rtc, NeXTPC, 0, next_rtc_vmstate, NeXTRTC),
VMSTATE_END_OF_LIST()
},
};
--=20
2.39.5
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From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
To: huth@tuxfamily.org,
qemu-devel@nongnu.org
Date: Thu, 12 Dec 2024 11:46:05 +0000
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Rather than directly clear bit 3 in int_status in next_scr2_rtc_update(), u=
se
a qemu_irq to drive the equivalent NEXT_PWR_I signal.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Thomas Huth <huth@tuxfamily.org>
---
hw/m68k/next-cube.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c
index 0b07cd1a75..7c6dc132fe 100644
--- a/hw/m68k/next-cube.c
+++ b/hw/m68k/next-cube.c
@@ -98,6 +98,7 @@ struct NeXTPC {
ESCCState escc;
=20
NeXTRTC rtc;
+ qemu_irq rtc_power_irq;
};
=20
typedef struct next_dma {
@@ -267,7 +268,7 @@ static void next_scr2_rtc_update(NeXTPC *s)
/* clear FTU */
if (rtc->value & 0x04) {
rtc->status =3D rtc->status & (~0x18);
- s->int_status =3D s->int_status & (~0x04);
+ qemu_irq_lower(s->rtc_power_irq);
}
}
}
@@ -1093,6 +1094,8 @@ static void next_pc_init(Object *obj)
memory_region_init_io(&s->timer_mem, OBJECT(s), &next_timer_ops, s,
"next.timer", 4);
sysbus_init_mmio(sbd, &s->timer_mem);
+
+ s->rtc_power_irq =3D qdev_get_gpio_in(DEVICE(obj), NEXT_PWR_I);
}
=20
/*
--=20
2.39.5
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Date: Thu, 12 Dec 2024 11:46:06 +0000
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Introduce a new next_rtc_cmd_is_write() function to determine if an rtc com=
mand
is a read or write, and start by using it to avoid shifting the rtc input v=
alue
if a rtc read command is executed.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Thomas Huth <huth@tuxfamily.org>
---
hw/m68k/next-cube.c | 138 ++++++++++++++++++++++++--------------------
1 file changed, 74 insertions(+), 64 deletions(-)
diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c
index 7c6dc132fe..cc3dcad4e6 100644
--- a/hw/m68k/next-cube.c
+++ b/hw/m68k/next-cube.c
@@ -165,6 +165,12 @@ static void next_scr2_led_update(NeXTPC *s)
}
}
=20
+static bool next_rtc_cmd_is_write(uint8_t cmd)
+{
+ return (cmd >=3D 0x80 && cmd <=3D 0x9f) ||
+ (cmd =3D=3D 0xb1);
+}
+
static void next_scr2_rtc_update(NeXTPC *s)
{
uint8_t old_scr2, scr2_2;
@@ -186,76 +192,80 @@ static void next_scr2_rtc_update(NeXTPC *s)
((scr2_2 & SCR2_RTDATA) ? 1 : 0);
}
if (rtc->phase >=3D 8 && rtc->phase < 16) {
- rtc->value =3D (rtc->value << 1) |
- ((scr2_2 & SCR2_RTDATA) ? 1 : 0);
-
- /* if we read RAM register, output RT_DATA bit */
- if (rtc->command <=3D 0x1F) {
- scr2_2 =3D scr2_2 & (~SCR2_RTDATA);
- if (rtc->ram[rtc->command] & (0x80 >> (rtc->phase - 8)=
)) {
- scr2_2 |=3D SCR2_RTDATA;
- }
-
- rtc->retval =3D (rtc->retval << 1) |
- ((scr2_2 & SCR2_RTDATA) ? 1 : 0);
- }
- /* read the status 0x30 */
- if (rtc->command =3D=3D 0x30) {
- scr2_2 =3D scr2_2 & (~SCR2_RTDATA);
- /* for now status =3D 0x98 (new rtc + FTU) */
- if (rtc->status & (0x80 >> (rtc->phase - 8))) {
- scr2_2 |=3D SCR2_RTDATA;
+ if (next_rtc_cmd_is_write(rtc->command)) {
+ /* Shift in value to write */
+ rtc->value =3D (rtc->value << 1) |
+ ((scr2_2 & SCR2_RTDATA) ? 1 : 0);
+ } else {
+ /* Shift out value to read */
+
+ /* if we read RAM register, output RT_DATA bit */
+ if (rtc->command <=3D 0x1F) {
+ scr2_2 =3D scr2_2 & (~SCR2_RTDATA);
+ if (rtc->ram[rtc->command] &
+ (0x80 >> (rtc->phase - 8))) {
+ scr2_2 |=3D SCR2_RTDATA;
+ }
+
+ rtc->retval =3D (rtc->retval << 1) |
+ ((scr2_2 & SCR2_RTDATA) ? 1 : 0);
}
-
- rtc->retval =3D (rtc->retval << 1) |
- ((scr2_2 & SCR2_RTDATA) ? 1 : 0);
- }
- /* read the status 0x31 */
- if (rtc->command =3D=3D 0x31) {
- scr2_2 =3D scr2_2 & (~SCR2_RTDATA);
- if (rtc->control & (0x80 >> (rtc->phase - 8))) {
- scr2_2 |=3D SCR2_RTDATA;
+ /* read the status 0x30 */
+ if (rtc->command =3D=3D 0x30) {
+ scr2_2 =3D scr2_2 & (~SCR2_RTDATA);
+ /* for now status =3D 0x98 (new rtc + FTU) */
+ if (rtc->status & (0x80 >> (rtc->phase - 8))) {
+ scr2_2 |=3D SCR2_RTDATA;
+ }
+
+ rtc->retval =3D (rtc->retval << 1) |
+ ((scr2_2 & SCR2_RTDATA) ? 1 : 0);
}
- rtc->retval =3D (rtc->retval << 1) |
- ((scr2_2 & SCR2_RTDATA) ? 1 : 0);
- }
-
- if ((rtc->command >=3D 0x20) && (rtc->command <=3D 0x2F)) {
- scr2_2 =3D scr2_2 & (~SCR2_RTDATA);
- /* for now 0x00 */
- time_t time_h =3D time(NULL);
- struct tm *info =3D localtime(&time_h);
- int ret =3D 0;
-
- switch (rtc->command) {
- case 0x20:
- ret =3D SCR2_TOBCD(info->tm_sec);
- break;
- case 0x21:
- ret =3D SCR2_TOBCD(info->tm_min);
- break;
- case 0x22:
- ret =3D SCR2_TOBCD(info->tm_hour);
- break;
- case 0x24:
- ret =3D SCR2_TOBCD(info->tm_mday);
- break;
- case 0x25:
- ret =3D SCR2_TOBCD((info->tm_mon + 1));
- break;
- case 0x26:
- ret =3D SCR2_TOBCD((info->tm_year - 100));
- break;
-
+ /* read the status 0x31 */
+ if (rtc->command =3D=3D 0x31) {
+ scr2_2 =3D scr2_2 & (~SCR2_RTDATA);
+ if (rtc->control & (0x80 >> (rtc->phase - 8))) {
+ scr2_2 |=3D SCR2_RTDATA;
+ }
+ rtc->retval =3D (rtc->retval << 1) |
+ ((scr2_2 & SCR2_RTDATA) ? 1 : 0);
}
=20
- if (ret & (0x80 >> (rtc->phase - 8))) {
- scr2_2 |=3D SCR2_RTDATA;
+ if ((rtc->command >=3D 0x20) && (rtc->command <=3D 0x2=
F)) {
+ scr2_2 =3D scr2_2 & (~SCR2_RTDATA);
+ /* for now 0x00 */
+ time_t time_h =3D time(NULL);
+ struct tm *info =3D localtime(&time_h);
+ int ret =3D 0;
+
+ switch (rtc->command) {
+ case 0x20:
+ ret =3D SCR2_TOBCD(info->tm_sec);
+ break;
+ case 0x21:
+ ret =3D SCR2_TOBCD(info->tm_min);
+ break;
+ case 0x22:
+ ret =3D SCR2_TOBCD(info->tm_hour);
+ break;
+ case 0x24:
+ ret =3D SCR2_TOBCD(info->tm_mday);
+ break;
+ case 0x25:
+ ret =3D SCR2_TOBCD((info->tm_mon + 1));
+ break;
+ case 0x26:
+ ret =3D SCR2_TOBCD((info->tm_year - 100));
+ break;
+ }
+
+ if (ret & (0x80 >> (rtc->phase - 8))) {
+ scr2_2 |=3D SCR2_RTDATA;
+ }
+ rtc->retval =3D (rtc->retval << 1) |
+ ((scr2_2 & SCR2_RTDATA) ? 1 : 0);
}
- rtc->retval =3D (rtc->retval << 1) |
- ((scr2_2 & SCR2_RTDATA) ? 1 : 0);
}
-
}
=20
rtc->phase++;
--=20
2.39.5
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From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
To: huth@tuxfamily.org,
qemu-devel@nongnu.org
Date: Thu, 12 Dec 2024 11:46:07 +0000
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Subject: [PATCH v2 21/34] next-cube: always use retval to return rtc read
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Instead of shifting out rtc read values from individual rtc registers, chan=
ge
the logic so that rtc read commands are executed when the last bit of the r=
tc
command is received and the result stored in retval. This simplifies the rtc
read logic such that the shift out logic can be consolidated for rtc phases
between 8 and 16.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
---
hw/m68k/next-cube.c | 99 ++++++++++++++++++---------------------------
1 file changed, 40 insertions(+), 59 deletions(-)
diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c
index cc3dcad4e6..b5abc2b822 100644
--- a/hw/m68k/next-cube.c
+++ b/hw/m68k/next-cube.c
@@ -190,93 +190,74 @@ static void next_scr2_rtc_update(NeXTPC *s)
if (rtc->phase < 8) {
rtc->command =3D (rtc->command << 1) |
((scr2_2 & SCR2_RTDATA) ? 1 : 0);
- }
- if (rtc->phase >=3D 8 && rtc->phase < 16) {
- if (next_rtc_cmd_is_write(rtc->command)) {
- /* Shift in value to write */
- rtc->value =3D (rtc->value << 1) |
- ((scr2_2 & SCR2_RTDATA) ? 1 : 0);
- } else {
- /* Shift out value to read */
=20
- /* if we read RAM register, output RT_DATA bit */
- if (rtc->command <=3D 0x1F) {
- scr2_2 =3D scr2_2 & (~SCR2_RTDATA);
- if (rtc->ram[rtc->command] &
- (0x80 >> (rtc->phase - 8))) {
- scr2_2 |=3D SCR2_RTDATA;
- }
-
- rtc->retval =3D (rtc->retval << 1) |
- ((scr2_2 & SCR2_RTDATA) ? 1 : 0);
- }
- /* read the status 0x30 */
- if (rtc->command =3D=3D 0x30) {
- scr2_2 =3D scr2_2 & (~SCR2_RTDATA);
- /* for now status =3D 0x98 (new rtc + FTU) */
- if (rtc->status & (0x80 >> (rtc->phase - 8))) {
- scr2_2 |=3D SCR2_RTDATA;
- }
-
- rtc->retval =3D (rtc->retval << 1) |
- ((scr2_2 & SCR2_RTDATA) ? 1 : 0);
- }
- /* read the status 0x31 */
- if (rtc->command =3D=3D 0x31) {
- scr2_2 =3D scr2_2 & (~SCR2_RTDATA);
- if (rtc->control & (0x80 >> (rtc->phase - 8))) {
- scr2_2 |=3D SCR2_RTDATA;
- }
- rtc->retval =3D (rtc->retval << 1) |
- ((scr2_2 & SCR2_RTDATA) ? 1 : 0);
+ if (rtc->phase =3D=3D 7 && !next_rtc_cmd_is_write(rtc->com=
mand)) {
+ if (rtc->command <=3D 0x1f) {
+ /* RAM registers */
+ rtc->retval =3D rtc->ram[rtc->command];
}
-
if ((rtc->command >=3D 0x20) && (rtc->command <=3D 0x2=
F)) {
- scr2_2 =3D scr2_2 & (~SCR2_RTDATA);
- /* for now 0x00 */
+ /* RTC */
time_t time_h =3D time(NULL);
struct tm *info =3D localtime(&time_h);
- int ret =3D 0;
+ rtc->retval =3D 0;
=20
switch (rtc->command) {
case 0x20:
- ret =3D SCR2_TOBCD(info->tm_sec);
+ rtc->retval =3D SCR2_TOBCD(info->tm_sec);
break;
case 0x21:
- ret =3D SCR2_TOBCD(info->tm_min);
+ rtc->retval =3D SCR2_TOBCD(info->tm_min);
break;
case 0x22:
- ret =3D SCR2_TOBCD(info->tm_hour);
+ rtc->retval =3D SCR2_TOBCD(info->tm_hour);
break;
case 0x24:
- ret =3D SCR2_TOBCD(info->tm_mday);
+ rtc->retval =3D SCR2_TOBCD(info->tm_mday);
break;
case 0x25:
- ret =3D SCR2_TOBCD((info->tm_mon + 1));
+ rtc->retval =3D SCR2_TOBCD((info->tm_mon + 1));
break;
case 0x26:
- ret =3D SCR2_TOBCD((info->tm_year - 100));
+ rtc->retval =3D SCR2_TOBCD((info->tm_year - 10=
0));
break;
}
-
- if (ret & (0x80 >> (rtc->phase - 8))) {
- scr2_2 |=3D SCR2_RTDATA;
- }
- rtc->retval =3D (rtc->retval << 1) |
- ((scr2_2 & SCR2_RTDATA) ? 1 : 0);
+ }
+ if (rtc->command =3D=3D 0x30) {
+ /* read the status 0x30 */
+ rtc->retval =3D rtc->status;
+ }
+ if (rtc->command =3D=3D 0x31) {
+ /* read the control 0x31 */
+ rtc->retval =3D rtc->control;
+ }
+ }
+ }
+ if (rtc->phase >=3D 8 && rtc->phase < 16) {
+ if (next_rtc_cmd_is_write(rtc->command)) {
+ /* Shift in value to write */
+ rtc->value =3D (rtc->value << 1) |
+ ((scr2_2 & SCR2_RTDATA) ? 1 : 0);
+ } else {
+ /* Shift out value to read */
+ if (rtc->retval & (0x80 >> (rtc->phase - 8))) {
+ scr2_2 |=3D SCR2_RTDATA;
+ } else {
+ scr2_2 &=3D ~SCR2_RTDATA;
}
}
}
=20
rtc->phase++;
- if (rtc->phase =3D=3D 16) {
- if (rtc->command >=3D 0x80 && rtc->command <=3D 0x9F) {
+ if (rtc->phase =3D=3D 16 && next_rtc_cmd_is_write(rtc->command=
)) {
+ if (rtc->command >=3D 0x80 && rtc->command <=3D 0x9f) {
+ /* RAM registers */
rtc->ram[rtc->command - 0x80] =3D rtc->value;
}
- /* write to x30 register */
- if (rtc->command =3D=3D 0xB1) {
- /* clear FTU */
+ if (rtc->command =3D=3D 0xb1) {
+ /* write to 0x30 register */
if (rtc->value & 0x04) {
+ /* clear FTU */
rtc->status =3D rtc->status & (~0x18);
qemu_irq_lower(s->rtc_power_irq);
}
--=20
2.39.5
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From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
To: huth@tuxfamily.org,
qemu-devel@nongnu.org
Date: Thu, 12 Dec 2024 11:46:08 +0000
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Subject: [PATCH v2 22/34] next-cube: use named gpio to set RTC data bit in
scr2
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This is in preparation for moving NeXTRTC to its own separate device.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Thomas Huth <huth@tuxfamily.org>
---
hw/m68k/next-cube.c | 25 +++++++++++++++++++++----
1 file changed, 21 insertions(+), 4 deletions(-)
diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c
index b5abc2b822..89dd9f5b85 100644
--- a/hw/m68k/next-cube.c
+++ b/hw/m68k/next-cube.c
@@ -240,10 +240,13 @@ static void next_scr2_rtc_update(NeXTPC *s)
((scr2_2 & SCR2_RTDATA) ? 1 : 0);
} else {
/* Shift out value to read */
+ qemu_irq rtc_data_in_irq =3D qdev_get_gpio_in_named(
+ DEVICE(s), "pc-rtc-data-in", 0);
+
if (rtc->retval & (0x80 >> (rtc->phase - 8))) {
- scr2_2 |=3D SCR2_RTDATA;
+ qemu_irq_raise(rtc_data_in_irq);
} else {
- scr2_2 &=3D ~SCR2_RTDATA;
+ qemu_irq_lower(rtc_data_in_irq);
}
}
}
@@ -270,8 +273,6 @@ static void next_scr2_rtc_update(NeXTPC *s)
rtc->command =3D 0;
rtc->value =3D 0;
}
-
- s->scr2 =3D deposit32(s->scr2, 8, 8, scr2_2);
}
=20
static uint64_t next_mmio_read(void *opaque, hwaddr addr, unsigned size)
@@ -1001,6 +1002,20 @@ static const MemoryRegionOps next_dummy_en_ops =3D {
.endianness =3D DEVICE_BIG_ENDIAN,
};
=20
+static void next_pc_rtc_data_in_irq(void *opaque, int n, int level)
+{
+ NeXTPC *s =3D NEXT_PC(opaque);
+ uint8_t scr2_2 =3D extract32(s->scr2, 8, 8);
+
+ if (level) {
+ scr2_2 |=3D SCR2_RTDATA;
+ } else {
+ scr2_2 &=3D ~SCR2_RTDATA;
+ }
+
+ s->scr2 =3D deposit32(s->scr2, 8, 8, scr2_2);
+}
+
static void next_pc_reset_hold(Object *obj, ResetType type)
{
NeXTPC *s =3D NEXT_PC(obj);
@@ -1087,6 +1102,8 @@ static void next_pc_init(Object *obj)
sysbus_init_mmio(sbd, &s->timer_mem);
=20
s->rtc_power_irq =3D qdev_get_gpio_in(DEVICE(obj), NEXT_PWR_I);
+ qdev_init_gpio_in_named(DEVICE(obj), next_pc_rtc_data_in_irq,
+ "pc-rtc-data-in", 1);
}
=20
/*
--=20
2.39.5
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From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
To: huth@tuxfamily.org,
qemu-devel@nongnu.org
Date: Thu, 12 Dec 2024 11:46:09 +0000
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This is in preparation for moving NeXTRTC to its own separate device.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Thomas Huth <huth@tuxfamily.org>
---
hw/m68k/next-cube.c | 169 ++++++++++++++++++++++++--------------------
1 file changed, 92 insertions(+), 77 deletions(-)
diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c
index 89dd9f5b85..e13f46add2 100644
--- a/hw/m68k/next-cube.c
+++ b/hw/m68k/next-cube.c
@@ -171,6 +171,90 @@ static bool next_rtc_cmd_is_write(uint8_t cmd)
(cmd =3D=3D 0xb1);
}
=20
+static void next_rtc_data_in_irq(void *opaque, int n, int level)
+{
+ NeXTPC *s =3D NEXT_PC(opaque);
+ NeXTRTC *rtc =3D &s->rtc;
+
+ if (rtc->phase < 8) {
+ rtc->command =3D (rtc->command << 1) | level;
+
+ if (rtc->phase =3D=3D 7 && !next_rtc_cmd_is_write(rtc->command)) {
+ if (rtc->command <=3D 0x1f) {
+ /* RAM registers */
+ rtc->retval =3D rtc->ram[rtc->command];
+ }
+ if ((rtc->command >=3D 0x20) && (rtc->command <=3D 0x2f)) {
+ /* RTC */
+ time_t time_h =3D time(NULL);
+ struct tm *info =3D localtime(&time_h);
+ rtc->retval =3D 0;
+
+ switch (rtc->command) {
+ case 0x20:
+ rtc->retval =3D SCR2_TOBCD(info->tm_sec);
+ break;
+ case 0x21:
+ rtc->retval =3D SCR2_TOBCD(info->tm_min);
+ break;
+ case 0x22:
+ rtc->retval =3D SCR2_TOBCD(info->tm_hour);
+ break;
+ case 0x24:
+ rtc->retval =3D SCR2_TOBCD(info->tm_mday);
+ break;
+ case 0x25:
+ rtc->retval =3D SCR2_TOBCD((info->tm_mon + 1));
+ break;
+ case 0x26:
+ rtc->retval =3D SCR2_TOBCD((info->tm_year - 100));
+ break;
+ }
+ }
+ if (rtc->command =3D=3D 0x30) {
+ /* read the status 0x30 */
+ rtc->retval =3D rtc->status;
+ }
+ if (rtc->command =3D=3D 0x31) {
+ /* read the control 0x31 */
+ rtc->retval =3D rtc->control;
+ }
+ }
+ }
+ if (rtc->phase >=3D 8 && rtc->phase < 16) {
+ if (next_rtc_cmd_is_write(rtc->command)) {
+ /* Shift in value to write */
+ rtc->value =3D (rtc->value << 1) | level;
+ } else {
+ /* Shift out value to read */
+ qemu_irq rtc_data_in_irq =3D qdev_get_gpio_in_named(
+ DEVICE(s), "pc-rtc-data-in", 0);
+
+ if (rtc->retval & (0x80 >> (rtc->phase - 8))) {
+ qemu_irq_raise(rtc_data_in_irq);
+ } else {
+ qemu_irq_lower(rtc_data_in_irq);
+ }
+ }
+ }
+
+ rtc->phase++;
+ if (rtc->phase =3D=3D 16 && next_rtc_cmd_is_write(rtc->command)) {
+ if (rtc->command >=3D 0x80 && rtc->command <=3D 0x9f) {
+ /* RAM registers */
+ rtc->ram[rtc->command - 0x80] =3D rtc->value;
+ }
+ if (rtc->command =3D=3D 0xb1) {
+ /* write to 0x30 register */
+ if (rtc->value & 0x04) {
+ /* clear FTU */
+ rtc->status =3D rtc->status & (~0x18);
+ qemu_irq_lower(s->rtc_power_irq);
+ }
+ }
+ }
+}
+
static void next_scr2_rtc_update(NeXTPC *s)
{
uint8_t old_scr2, scr2_2;
@@ -187,84 +271,13 @@ static void next_scr2_rtc_update(NeXTPC *s)
/* If we are in going down clock... do something */
if (((old_scr2 & SCR2_RTCLK) !=3D (scr2_2 & SCR2_RTCLK)) &&
((scr2_2 & SCR2_RTCLK) =3D=3D 0)) {
- if (rtc->phase < 8) {
- rtc->command =3D (rtc->command << 1) |
- ((scr2_2 & SCR2_RTDATA) ? 1 : 0);
-
- if (rtc->phase =3D=3D 7 && !next_rtc_cmd_is_write(rtc->com=
mand)) {
- if (rtc->command <=3D 0x1f) {
- /* RAM registers */
- rtc->retval =3D rtc->ram[rtc->command];
- }
- if ((rtc->command >=3D 0x20) && (rtc->command <=3D 0x2=
F)) {
- /* RTC */
- time_t time_h =3D time(NULL);
- struct tm *info =3D localtime(&time_h);
- rtc->retval =3D 0;
-
- switch (rtc->command) {
- case 0x20:
- rtc->retval =3D SCR2_TOBCD(info->tm_sec);
- break;
- case 0x21:
- rtc->retval =3D SCR2_TOBCD(info->tm_min);
- break;
- case 0x22:
- rtc->retval =3D SCR2_TOBCD(info->tm_hour);
- break;
- case 0x24:
- rtc->retval =3D SCR2_TOBCD(info->tm_mday);
- break;
- case 0x25:
- rtc->retval =3D SCR2_TOBCD((info->tm_mon + 1));
- break;
- case 0x26:
- rtc->retval =3D SCR2_TOBCD((info->tm_year - 10=
0));
- break;
- }
- }
- if (rtc->command =3D=3D 0x30) {
- /* read the status 0x30 */
- rtc->retval =3D rtc->status;
- }
- if (rtc->command =3D=3D 0x31) {
- /* read the control 0x31 */
- rtc->retval =3D rtc->control;
- }
- }
- }
- if (rtc->phase >=3D 8 && rtc->phase < 16) {
- if (next_rtc_cmd_is_write(rtc->command)) {
- /* Shift in value to write */
- rtc->value =3D (rtc->value << 1) |
- ((scr2_2 & SCR2_RTDATA) ? 1 : 0);
- } else {
- /* Shift out value to read */
- qemu_irq rtc_data_in_irq =3D qdev_get_gpio_in_named(
- DEVICE(s), "pc-rtc-data-in", 0);
-
- if (rtc->retval & (0x80 >> (rtc->phase - 8))) {
- qemu_irq_raise(rtc_data_in_irq);
- } else {
- qemu_irq_lower(rtc_data_in_irq);
- }
- }
- }
+ qemu_irq rtc_data_in_irq =3D qdev_get_gpio_in_named(
+ DEVICE(s), "rtc-data-in", 0);
=20
- rtc->phase++;
- if (rtc->phase =3D=3D 16 && next_rtc_cmd_is_write(rtc->command=
)) {
- if (rtc->command >=3D 0x80 && rtc->command <=3D 0x9f) {
- /* RAM registers */
- rtc->ram[rtc->command - 0x80] =3D rtc->value;
- }
- if (rtc->command =3D=3D 0xb1) {
- /* write to 0x30 register */
- if (rtc->value & 0x04) {
- /* clear FTU */
- rtc->status =3D rtc->status & (~0x18);
- qemu_irq_lower(s->rtc_power_irq);
- }
- }
+ if (scr2_2 & SCR2_RTDATA) {
+ qemu_irq_raise(rtc_data_in_irq);
+ } else {
+ qemu_irq_lower(rtc_data_in_irq);
}
}
} else {
@@ -1104,6 +1117,8 @@ static void next_pc_init(Object *obj)
s->rtc_power_irq =3D qdev_get_gpio_in(DEVICE(obj), NEXT_PWR_I);
qdev_init_gpio_in_named(DEVICE(obj), next_pc_rtc_data_in_irq,
"pc-rtc-data-in", 1);
+ qdev_init_gpio_in_named(DEVICE(obj), next_rtc_data_in_irq,
+ "rtc-data-in", 1);
}
=20
/*
--=20
2.39.5
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From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
To: huth@tuxfamily.org,
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Date: Thu, 12 Dec 2024 11:46:10 +0000
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Subject: [PATCH v2 24/34] next-cube: don't use rtc phase value of -1
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The rtc phase value of -1 is directly equivalent to using a phase value of =
0 so
simplify the logic to use an initial rtc phase of 0.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Thomas Huth <huth@tuxfamily.org>
---
hw/m68k/next-cube.c | 5 +----
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c
index e13f46add2..9c91ee146a 100644
--- a/hw/m68k/next-cube.c
+++ b/hw/m68k/next-cube.c
@@ -265,9 +265,6 @@ static void next_scr2_rtc_update(NeXTPC *s)
=20
if (scr2_2 & 0x1) {
/* DPRINTF("RTC %x phase %i\n", scr2_2, rtc->phase); */
- if (rtc->phase =3D=3D -1) {
- rtc->phase =3D 0;
- }
/* If we are in going down clock... do something */
if (((old_scr2 & SCR2_RTCLK) !=3D (scr2_2 & SCR2_RTCLK)) &&
((scr2_2 & SCR2_RTCLK) =3D=3D 0)) {
@@ -282,7 +279,7 @@ static void next_scr2_rtc_update(NeXTPC *s)
}
} else {
/* else end or abort */
- rtc->phase =3D -1;
+ rtc->phase =3D 0;
rtc->command =3D 0;
rtc->value =3D 0;
}
--=20
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Date: Thu, 12 Dec 2024 11:46:11 +0000
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Subject: [PATCH v2 25/34] next-cube: QOMify NeXTRTC
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This is to allow the RTC functionality to be maintained within its own sepa=
rate
device rather than as part of the next-pc device.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
---
hw/m68k/next-cube.c | 71 +++++++++++++++++++++++++++++++--------------
1 file changed, 50 insertions(+), 21 deletions(-)
diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c
index 9c91ee146a..c947af65e2 100644
--- a/hw/m68k/next-cube.c
+++ b/hw/m68k/next-cube.c
@@ -42,7 +42,13 @@
#define RAM_SIZE 0x4000000
#define ROM_FILE "Rev_2.5_v66.bin"
=20
-typedef struct NeXTRTC {
+
+#define TYPE_NEXT_RTC "next-rtc"
+OBJECT_DECLARE_SIMPLE_TYPE(NeXTRTC, NEXT_RTC)
+
+struct NeXTRTC {
+ SysBusDevice parent_obj;
+
int8_t phase;
uint8_t ram[32];
uint8_t command;
@@ -50,7 +56,7 @@ typedef struct NeXTRTC {
uint8_t status;
uint8_t control;
uint8_t retval;
-} NeXTRTC;
+};
=20
#define TYPE_NEXT_SCSI "next-scsi"
OBJECT_DECLARE_SIMPLE_TYPE(NeXTSCSI, NEXT_SCSI)
@@ -1012,6 +1018,37 @@ static const MemoryRegionOps next_dummy_en_ops =3D {
.endianness =3D DEVICE_BIG_ENDIAN,
};
=20
+static const VMStateDescription next_rtc_vmstate =3D {
+ .name =3D "next-rtc",
+ .version_id =3D 3,
+ .minimum_version_id =3D 3,
+ .fields =3D (const VMStateField[]) {
+ VMSTATE_INT8(phase, NeXTRTC),
+ VMSTATE_UINT8_ARRAY(ram, NeXTRTC, 32),
+ VMSTATE_UINT8(command, NeXTRTC),
+ VMSTATE_UINT8(value, NeXTRTC),
+ VMSTATE_UINT8(status, NeXTRTC),
+ VMSTATE_UINT8(control, NeXTRTC),
+ VMSTATE_UINT8(retval, NeXTRTC),
+ VMSTATE_END_OF_LIST()
+ },
+};
+
+static void next_rtc_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc =3D DEVICE_CLASS(klass);
+
+ dc->desc =3D "NeXT RTC";
+ dc->vmsd =3D &next_rtc_vmstate;
+}
+
+static const TypeInfo next_rtc_info =3D {
+ .name =3D TYPE_NEXT_RTC,
+ .parent =3D TYPE_SYS_BUS_DEVICE,
+ .instance_size =3D sizeof(NeXTRTC),
+ .class_init =3D next_rtc_class_init,
+};
+
static void next_pc_rtc_data_in_irq(void *opaque, int n, int level)
{
NeXTPC *s =3D NEXT_PC(opaque);
@@ -1078,6 +1115,12 @@ static void next_pc_realize(DeviceState *dev, Error =
**errp)
}
sysbus_connect_irq(sbd, 0, qdev_get_gpio_in(dev, NEXT_SCC_I));
sysbus_connect_irq(sbd, 1, qdev_get_gpio_in(dev, NEXT_SCC_DMA_I));
+
+ /* RTC */
+ d =3D DEVICE(object_resolve_path_component(OBJECT(dev), "rtc"));
+ if (!sysbus_realize(SYS_BUS_DEVICE(d), errp)) {
+ return;
+ }
}
=20
static void next_pc_init(Object *obj)
@@ -1111,6 +1154,8 @@ static void next_pc_init(Object *obj)
"next.timer", 4);
sysbus_init_mmio(sbd, &s->timer_mem);
=20
+ object_initialize_child(obj, "rtc", &s->rtc, TYPE_NEXT_RTC);
+
s->rtc_power_irq =3D qdev_get_gpio_in(DEVICE(obj), NEXT_PWR_I);
qdev_init_gpio_in_named(DEVICE(obj), next_pc_rtc_data_in_irq,
"pc-rtc-data-in", 1);
@@ -1129,26 +1174,10 @@ static Property next_pc_properties[] =3D {
DEFINE_PROP_END_OF_LIST(),
};
=20
-static const VMStateDescription next_rtc_vmstate =3D {
- .name =3D "next-rtc",
- .version_id =3D 2,
- .minimum_version_id =3D 2,
- .fields =3D (const VMStateField[]) {
- VMSTATE_INT8(phase, NeXTRTC),
- VMSTATE_UINT8_ARRAY(ram, NeXTRTC, 32),
- VMSTATE_UINT8(command, NeXTRTC),
- VMSTATE_UINT8(value, NeXTRTC),
- VMSTATE_UINT8(status, NeXTRTC),
- VMSTATE_UINT8(control, NeXTRTC),
- VMSTATE_UINT8(retval, NeXTRTC),
- VMSTATE_END_OF_LIST()
- },
-};
-
static const VMStateDescription next_pc_vmstate =3D {
.name =3D "next-pc",
- .version_id =3D 3,
- .minimum_version_id =3D 3,
+ .version_id =3D 4,
+ .minimum_version_id =3D 4,
.fields =3D (const VMStateField[]) {
VMSTATE_UINT32(scr1, NeXTPC),
VMSTATE_UINT32(scr2, NeXTPC),
@@ -1156,7 +1185,6 @@ static const VMStateDescription next_pc_vmstate =3D {
VMSTATE_UINT32(int_mask, NeXTPC),
VMSTATE_UINT32(int_status, NeXTPC),
VMSTATE_UINT32(led, NeXTPC),
- VMSTATE_STRUCT(rtc, NeXTPC, 0, next_rtc_vmstate, NeXTRTC),
VMSTATE_END_OF_LIST()
},
};
@@ -1305,6 +1333,7 @@ static void next_register_type(void)
type_register_static(&next_typeinfo);
type_register_static(&next_pc_info);
type_register_static(&next_scsi_info);
+ type_register_static(&next_rtc_info);
}
=20
type_init(next_register_type)
--=20
2.39.5
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From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
To: huth@tuxfamily.org,
qemu-devel@nongnu.org
Date: Thu, 12 Dec 2024 11:46:12 +0000
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Subject: [PATCH v2 26/34] next-cube: move reset of next-rtc fields from
next-pc to next-rtc
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Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Thomas Huth <huth@tuxfamily.org>
---
hw/m68k/next-cube.c | 17 ++++++++++++-----
1 file changed, 12 insertions(+), 5 deletions(-)
diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c
index c947af65e2..a7a8b3cbbf 100644
--- a/hw/m68k/next-cube.c
+++ b/hw/m68k/next-cube.c
@@ -1018,6 +1018,16 @@ static const MemoryRegionOps next_dummy_en_ops =3D {
.endianness =3D DEVICE_BIG_ENDIAN,
};
=20
+static void next_rtc_reset_hold(Object *obj, ResetType type)
+{
+ NeXTRTC *rtc =3D NEXT_RTC(obj);
+
+ rtc->status =3D 0x90;
+
+ /* Load RTC RAM - TODO: provide possibility to load contents from file=
*/
+ memcpy(rtc->ram, rtc_ram2, 32);
+}
+
static const VMStateDescription next_rtc_vmstate =3D {
.name =3D "next-rtc",
.version_id =3D 3,
@@ -1037,9 +1047,11 @@ static const VMStateDescription next_rtc_vmstate =3D=
{
static void next_rtc_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc =3D DEVICE_CLASS(klass);
+ ResettableClass *rc =3D RESETTABLE_CLASS(klass);
=20
dc->desc =3D "NeXT RTC";
dc->vmsd =3D &next_rtc_vmstate;
+ rc->phases.hold =3D next_rtc_reset_hold;
}
=20
static const TypeInfo next_rtc_info =3D {
@@ -1072,11 +1084,6 @@ static void next_pc_reset_hold(Object *obj, ResetTyp=
e type)
s->scr1 =3D 0x00011102;
s->scr2 =3D 0x00ff0c80;
s->old_scr2 =3D s->scr2;
-
- s->rtc.status =3D 0x90;
-
- /* Load RTC RAM - TODO: provide possibility to load contents from file=
*/
- memcpy(s->rtc.ram, rtc_ram2, 32);
}
=20
static void next_pc_realize(DeviceState *dev, Error **errp)
--=20
2.39.5
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From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
To: huth@tuxfamily.org,
qemu-devel@nongnu.org
Date: Thu, 12 Dec 2024 11:46:13 +0000
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Subject: [PATCH v2 27/34] next-cube: move rtc-data-in gpio from next-pc to
next-rtc device
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Add a new rtc-data-out gpio to the next-pc device and wire it up to the nex=
t-rtc
rtc-data-in gpio using the standard qdev gpio APIs.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Thomas Huth <huth@tuxfamily.org>
---
hw/m68k/next-cube.c | 26 +++++++++++++++++---------
1 file changed, 17 insertions(+), 9 deletions(-)
diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c
index a7a8b3cbbf..35eeeb0d59 100644
--- a/hw/m68k/next-cube.c
+++ b/hw/m68k/next-cube.c
@@ -105,6 +105,7 @@ struct NeXTPC {
=20
NeXTRTC rtc;
qemu_irq rtc_power_irq;
+ qemu_irq rtc_data_irq;
};
=20
typedef struct next_dma {
@@ -179,8 +180,8 @@ static bool next_rtc_cmd_is_write(uint8_t cmd)
=20
static void next_rtc_data_in_irq(void *opaque, int n, int level)
{
- NeXTPC *s =3D NEXT_PC(opaque);
- NeXTRTC *rtc =3D &s->rtc;
+ NeXTRTC *rtc =3D NEXT_RTC(opaque);
+ NeXTPC *s =3D NEXT_PC(container_of(rtc, NeXTPC, rtc));
=20
if (rtc->phase < 8) {
rtc->command =3D (rtc->command << 1) | level;
@@ -274,13 +275,10 @@ static void next_scr2_rtc_update(NeXTPC *s)
/* If we are in going down clock... do something */
if (((old_scr2 & SCR2_RTCLK) !=3D (scr2_2 & SCR2_RTCLK)) &&
((scr2_2 & SCR2_RTCLK) =3D=3D 0)) {
- qemu_irq rtc_data_in_irq =3D qdev_get_gpio_in_named(
- DEVICE(s), "rtc-data-in", 0);
-
if (scr2_2 & SCR2_RTDATA) {
- qemu_irq_raise(rtc_data_in_irq);
+ qemu_irq_raise(s->rtc_data_irq);
} else {
- qemu_irq_lower(rtc_data_in_irq);
+ qemu_irq_lower(s->rtc_data_irq);
}
}
} else {
@@ -1028,6 +1026,12 @@ static void next_rtc_reset_hold(Object *obj, ResetTy=
pe type)
memcpy(rtc->ram, rtc_ram2, 32);
}
=20
+static void next_rtc_init(Object *obj)
+{
+ qdev_init_gpio_in_named(DEVICE(obj), next_rtc_data_in_irq,
+ "rtc-data-in", 1);
+}
+
static const VMStateDescription next_rtc_vmstate =3D {
.name =3D "next-rtc",
.version_id =3D 3,
@@ -1057,6 +1061,7 @@ static void next_rtc_class_init(ObjectClass *klass, v=
oid *data)
static const TypeInfo next_rtc_info =3D {
.name =3D TYPE_NEXT_RTC,
.parent =3D TYPE_SYS_BUS_DEVICE,
+ .instance_init =3D next_rtc_init,
.instance_size =3D sizeof(NeXTRTC),
.class_init =3D next_rtc_class_init,
};
@@ -1128,6 +1133,9 @@ static void next_pc_realize(DeviceState *dev, Error *=
*errp)
if (!sysbus_realize(SYS_BUS_DEVICE(d), errp)) {
return;
}
+ /* Data from NeXTPC to RTC */
+ qdev_connect_gpio_out_named(dev, "rtc-data-out", 0,
+ qdev_get_gpio_in_named(d, "rtc-data-in", 0=
));
}
=20
static void next_pc_init(Object *obj)
@@ -1166,8 +1174,8 @@ static void next_pc_init(Object *obj)
s->rtc_power_irq =3D qdev_get_gpio_in(DEVICE(obj), NEXT_PWR_I);
qdev_init_gpio_in_named(DEVICE(obj), next_pc_rtc_data_in_irq,
"pc-rtc-data-in", 1);
- qdev_init_gpio_in_named(DEVICE(obj), next_rtc_data_in_irq,
- "rtc-data-in", 1);
+ qdev_init_gpio_out_named(DEVICE(obj), &s->rtc_data_irq,
+ "rtc-data-out", 1);
}
=20
/*
--=20
2.39.5
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From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
To: huth@tuxfamily.org,
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Date: Thu, 12 Dec 2024 11:46:14 +0000
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Add a named gpio output for the next-rtc data and then update
next_rtc_data_in_irq() to drive the IRQ directly. This enables the next-rtc=
to
next-pc data to be wired up using the standard qdev gpio APIs.
At the same time rename the pc-rtc-data-in gpio to rtc-data-in which is pos=
sible
now that the previous rtc-data-in gpio has been moved to the next-rtc devic=
e.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
---
hw/m68k/next-cube.c | 19 +++++++++++++------
1 file changed, 13 insertions(+), 6 deletions(-)
diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c
index 35eeeb0d59..5d3ffebb93 100644
--- a/hw/m68k/next-cube.c
+++ b/hw/m68k/next-cube.c
@@ -56,6 +56,8 @@ struct NeXTRTC {
uint8_t status;
uint8_t control;
uint8_t retval;
+
+ qemu_irq data_out_irq;
};
=20
#define TYPE_NEXT_SCSI "next-scsi"
@@ -234,13 +236,10 @@ static void next_rtc_data_in_irq(void *opaque, int n,=
int level)
rtc->value =3D (rtc->value << 1) | level;
} else {
/* Shift out value to read */
- qemu_irq rtc_data_in_irq =3D qdev_get_gpio_in_named(
- DEVICE(s), "pc-rtc-data-in", 0);
-
if (rtc->retval & (0x80 >> (rtc->phase - 8))) {
- qemu_irq_raise(rtc_data_in_irq);
+ qemu_irq_raise(rtc->data_out_irq);
} else {
- qemu_irq_lower(rtc_data_in_irq);
+ qemu_irq_lower(rtc->data_out_irq);
}
}
}
@@ -1028,8 +1027,12 @@ static void next_rtc_reset_hold(Object *obj, ResetTy=
pe type)
=20
static void next_rtc_init(Object *obj)
{
+ NeXTRTC *rtc =3D NEXT_RTC(obj);
+
qdev_init_gpio_in_named(DEVICE(obj), next_rtc_data_in_irq,
"rtc-data-in", 1);
+ qdev_init_gpio_out_named(DEVICE(obj), &rtc->data_out_irq,
+ "rtc-data-out", 1);
}
=20
static const VMStateDescription next_rtc_vmstate =3D {
@@ -1136,6 +1139,10 @@ static void next_pc_realize(DeviceState *dev, Error =
**errp)
/* Data from NeXTPC to RTC */
qdev_connect_gpio_out_named(dev, "rtc-data-out", 0,
qdev_get_gpio_in_named(d, "rtc-data-in", 0=
));
+ /* Data from RTC to NeXTPC */
+ qdev_connect_gpio_out_named(d, "rtc-data-out", 0,
+ qdev_get_gpio_in_named(dev,
+ "rtc-data-in", 0));
}
=20
static void next_pc_init(Object *obj)
@@ -1173,7 +1180,7 @@ static void next_pc_init(Object *obj)
=20
s->rtc_power_irq =3D qdev_get_gpio_in(DEVICE(obj), NEXT_PWR_I);
qdev_init_gpio_in_named(DEVICE(obj), next_pc_rtc_data_in_irq,
- "pc-rtc-data-in", 1);
+ "rtc-data-in", 1);
qdev_init_gpio_out_named(DEVICE(obj), &s->rtc_data_irq,
"rtc-data-out", 1);
}
--=20
2.39.5
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From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
To: huth@tuxfamily.org,
qemu-devel@nongnu.org
Date: Thu, 12 Dec 2024 11:46:15 +0000
Message-Id: <20241212114620.549285-30-mark.cave-ayland@ilande.co.uk>
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Subject: [PATCH v2 29/34] next-cube: add rtc-cmd-reset named gpio to reset the
rtc state machine
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This allows us to decouple the next-pc and next-rtc devices from each
other in next_scr2_rtc_update().
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
---
hw/m68k/next-cube.c | 23 +++++++++++++++++++----
1 file changed, 19 insertions(+), 4 deletions(-)
diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c
index 5d3ffebb93..d61deda6e0 100644
--- a/hw/m68k/next-cube.c
+++ b/hw/m68k/next-cube.c
@@ -108,6 +108,7 @@ struct NeXTPC {
NeXTRTC rtc;
qemu_irq rtc_power_irq;
qemu_irq rtc_data_irq;
+ qemu_irq rtc_cmd_reset_irq;
};
=20
typedef struct next_dma {
@@ -264,7 +265,6 @@ static void next_rtc_data_in_irq(void *opaque, int n, i=
nt level)
static void next_scr2_rtc_update(NeXTPC *s)
{
uint8_t old_scr2, scr2_2;
- NeXTRTC *rtc =3D &s->rtc;
=20
old_scr2 =3D extract32(s->old_scr2, 8, 8);
scr2_2 =3D extract32(s->scr2, 8, 8);
@@ -282,9 +282,7 @@ static void next_scr2_rtc_update(NeXTPC *s)
}
} else {
/* else end or abort */
- rtc->phase =3D 0;
- rtc->command =3D 0;
- rtc->value =3D 0;
+ qemu_irq_raise(s->rtc_cmd_reset_irq);
}
}
=20
@@ -1015,6 +1013,17 @@ static const MemoryRegionOps next_dummy_en_ops =3D {
.endianness =3D DEVICE_BIG_ENDIAN,
};
=20
+static void next_rtc_cmd_reset_irq(void *opaque, int n, int level)
+{
+ NeXTRTC *rtc =3D NEXT_RTC(opaque);
+
+ if (level) {
+ rtc->phase =3D 0;
+ rtc->command =3D 0;
+ rtc->value =3D 0;
+ }
+}
+
static void next_rtc_reset_hold(Object *obj, ResetType type)
{
NeXTRTC *rtc =3D NEXT_RTC(obj);
@@ -1033,6 +1042,8 @@ static void next_rtc_init(Object *obj)
"rtc-data-in", 1);
qdev_init_gpio_out_named(DEVICE(obj), &rtc->data_out_irq,
"rtc-data-out", 1);
+ qdev_init_gpio_in_named(DEVICE(obj), next_rtc_cmd_reset_irq,
+ "rtc-cmd-reset", 1);
}
=20
static const VMStateDescription next_rtc_vmstate =3D {
@@ -1143,6 +1154,8 @@ static void next_pc_realize(DeviceState *dev, Error *=
*errp)
qdev_connect_gpio_out_named(d, "rtc-data-out", 0,
qdev_get_gpio_in_named(dev,
"rtc-data-in", 0));
+ qdev_connect_gpio_out_named(dev, "rtc-cmd-reset", 0,
+ qdev_get_gpio_in_named(d, "rtc-cmd-reset",=
0));
}
=20
static void next_pc_init(Object *obj)
@@ -1183,6 +1196,8 @@ static void next_pc_init(Object *obj)
"rtc-data-in", 1);
qdev_init_gpio_out_named(DEVICE(obj), &s->rtc_data_irq,
"rtc-data-out", 1);
+ qdev_init_gpio_out_named(DEVICE(obj), &s->rtc_cmd_reset_irq,
+ "rtc-cmd-reset", 1);
}
=20
/*
--=20
2.39.5
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From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
To: huth@tuxfamily.org,
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Date: Thu, 12 Dec 2024 11:46:16 +0000
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This allows us to decouple the next-pc and next-rtc devices from each
other in next_rtc_data_in_irq().
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
---
hw/m68k/next-cube.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c
index d61deda6e0..94a9b90171 100644
--- a/hw/m68k/next-cube.c
+++ b/hw/m68k/next-cube.c
@@ -58,6 +58,7 @@ struct NeXTRTC {
uint8_t retval;
=20
qemu_irq data_out_irq;
+ qemu_irq power_irq;
};
=20
#define TYPE_NEXT_SCSI "next-scsi"
@@ -106,7 +107,6 @@ struct NeXTPC {
ESCCState escc;
=20
NeXTRTC rtc;
- qemu_irq rtc_power_irq;
qemu_irq rtc_data_irq;
qemu_irq rtc_cmd_reset_irq;
};
@@ -184,7 +184,6 @@ static bool next_rtc_cmd_is_write(uint8_t cmd)
static void next_rtc_data_in_irq(void *opaque, int n, int level)
{
NeXTRTC *rtc =3D NEXT_RTC(opaque);
- NeXTPC *s =3D NEXT_PC(container_of(rtc, NeXTPC, rtc));
=20
if (rtc->phase < 8) {
rtc->command =3D (rtc->command << 1) | level;
@@ -256,7 +255,7 @@ static void next_rtc_data_in_irq(void *opaque, int n, i=
nt level)
if (rtc->value & 0x04) {
/* clear FTU */
rtc->status =3D rtc->status & (~0x18);
- qemu_irq_lower(s->rtc_power_irq);
+ qemu_irq_lower(rtc->power_irq);
}
}
}
@@ -1044,6 +1043,8 @@ static void next_rtc_init(Object *obj)
"rtc-data-out", 1);
qdev_init_gpio_in_named(DEVICE(obj), next_rtc_cmd_reset_irq,
"rtc-cmd-reset", 1);
+ qdev_init_gpio_out_named(DEVICE(obj), &rtc->power_irq,
+ "rtc-power-out", 1);
}
=20
static const VMStateDescription next_rtc_vmstate =3D {
@@ -1156,6 +1157,8 @@ static void next_pc_realize(DeviceState *dev, Error *=
*errp)
"rtc-data-in", 0));
qdev_connect_gpio_out_named(dev, "rtc-cmd-reset", 0,
qdev_get_gpio_in_named(d, "rtc-cmd-reset",=
0));
+ qdev_connect_gpio_out_named(d, "rtc-power-out", 0,
+ qdev_get_gpio_in(dev, NEXT_PWR_I));
}
=20
static void next_pc_init(Object *obj)
@@ -1191,7 +1194,6 @@ static void next_pc_init(Object *obj)
=20
object_initialize_child(obj, "rtc", &s->rtc, TYPE_NEXT_RTC);
=20
- s->rtc_power_irq =3D qdev_get_gpio_in(DEVICE(obj), NEXT_PWR_I);
qdev_init_gpio_in_named(DEVICE(obj), next_pc_rtc_data_in_irq,
"rtc-data-in", 1);
qdev_init_gpio_out_named(DEVICE(obj), &s->rtc_data_irq,
--=20
2.39.5
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From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
To: huth@tuxfamily.org,
qemu-devel@nongnu.org
Date: Thu, 12 Dec 2024 11:46:17 +0000
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Subject: [PATCH v2 31/34] next-cube: move next_rtc_cmd_is_write() and
next_rtc_data_in_irq() functions
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Move these functions in next-cube.c so that they are with the rest of the
next-rtc functions.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Thomas Huth <huth@tuxfamily.org>
---
hw/m68k/next-cube.c | 172 ++++++++++++++++++++++----------------------
1 file changed, 86 insertions(+), 86 deletions(-)
diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c
index 94a9b90171..12d31dfaad 100644
--- a/hw/m68k/next-cube.c
+++ b/hw/m68k/next-cube.c
@@ -175,92 +175,6 @@ static void next_scr2_led_update(NeXTPC *s)
}
}
=20
-static bool next_rtc_cmd_is_write(uint8_t cmd)
-{
- return (cmd >=3D 0x80 && cmd <=3D 0x9f) ||
- (cmd =3D=3D 0xb1);
-}
-
-static void next_rtc_data_in_irq(void *opaque, int n, int level)
-{
- NeXTRTC *rtc =3D NEXT_RTC(opaque);
-
- if (rtc->phase < 8) {
- rtc->command =3D (rtc->command << 1) | level;
-
- if (rtc->phase =3D=3D 7 && !next_rtc_cmd_is_write(rtc->command)) {
- if (rtc->command <=3D 0x1f) {
- /* RAM registers */
- rtc->retval =3D rtc->ram[rtc->command];
- }
- if ((rtc->command >=3D 0x20) && (rtc->command <=3D 0x2f)) {
- /* RTC */
- time_t time_h =3D time(NULL);
- struct tm *info =3D localtime(&time_h);
- rtc->retval =3D 0;
-
- switch (rtc->command) {
- case 0x20:
- rtc->retval =3D SCR2_TOBCD(info->tm_sec);
- break;
- case 0x21:
- rtc->retval =3D SCR2_TOBCD(info->tm_min);
- break;
- case 0x22:
- rtc->retval =3D SCR2_TOBCD(info->tm_hour);
- break;
- case 0x24:
- rtc->retval =3D SCR2_TOBCD(info->tm_mday);
- break;
- case 0x25:
- rtc->retval =3D SCR2_TOBCD((info->tm_mon + 1));
- break;
- case 0x26:
- rtc->retval =3D SCR2_TOBCD((info->tm_year - 100));
- break;
- }
- }
- if (rtc->command =3D=3D 0x30) {
- /* read the status 0x30 */
- rtc->retval =3D rtc->status;
- }
- if (rtc->command =3D=3D 0x31) {
- /* read the control 0x31 */
- rtc->retval =3D rtc->control;
- }
- }
- }
- if (rtc->phase >=3D 8 && rtc->phase < 16) {
- if (next_rtc_cmd_is_write(rtc->command)) {
- /* Shift in value to write */
- rtc->value =3D (rtc->value << 1) | level;
- } else {
- /* Shift out value to read */
- if (rtc->retval & (0x80 >> (rtc->phase - 8))) {
- qemu_irq_raise(rtc->data_out_irq);
- } else {
- qemu_irq_lower(rtc->data_out_irq);
- }
- }
- }
-
- rtc->phase++;
- if (rtc->phase =3D=3D 16 && next_rtc_cmd_is_write(rtc->command)) {
- if (rtc->command >=3D 0x80 && rtc->command <=3D 0x9f) {
- /* RAM registers */
- rtc->ram[rtc->command - 0x80] =3D rtc->value;
- }
- if (rtc->command =3D=3D 0xb1) {
- /* write to 0x30 register */
- if (rtc->value & 0x04) {
- /* clear FTU */
- rtc->status =3D rtc->status & (~0x18);
- qemu_irq_lower(rtc->power_irq);
- }
- }
- }
-}
-
static void next_scr2_rtc_update(NeXTPC *s)
{
uint8_t old_scr2, scr2_2;
@@ -1012,6 +926,92 @@ static const MemoryRegionOps next_dummy_en_ops =3D {
.endianness =3D DEVICE_BIG_ENDIAN,
};
=20
+static bool next_rtc_cmd_is_write(uint8_t cmd)
+{
+ return (cmd >=3D 0x80 && cmd <=3D 0x9f) ||
+ (cmd =3D=3D 0xb1);
+}
+
+static void next_rtc_data_in_irq(void *opaque, int n, int level)
+{
+ NeXTRTC *rtc =3D NEXT_RTC(opaque);
+
+ if (rtc->phase < 8) {
+ rtc->command =3D (rtc->command << 1) | level;
+
+ if (rtc->phase =3D=3D 7 && !next_rtc_cmd_is_write(rtc->command)) {
+ if (rtc->command <=3D 0x1f) {
+ /* RAM registers */
+ rtc->retval =3D rtc->ram[rtc->command];
+ }
+ if ((rtc->command >=3D 0x20) && (rtc->command <=3D 0x2f)) {
+ /* RTC */
+ time_t time_h =3D time(NULL);
+ struct tm *info =3D localtime(&time_h);
+ rtc->retval =3D 0;
+
+ switch (rtc->command) {
+ case 0x20:
+ rtc->retval =3D SCR2_TOBCD(info->tm_sec);
+ break;
+ case 0x21:
+ rtc->retval =3D SCR2_TOBCD(info->tm_min);
+ break;
+ case 0x22:
+ rtc->retval =3D SCR2_TOBCD(info->tm_hour);
+ break;
+ case 0x24:
+ rtc->retval =3D SCR2_TOBCD(info->tm_mday);
+ break;
+ case 0x25:
+ rtc->retval =3D SCR2_TOBCD((info->tm_mon + 1));
+ break;
+ case 0x26:
+ rtc->retval =3D SCR2_TOBCD((info->tm_year - 100));
+ break;
+ }
+ }
+ if (rtc->command =3D=3D 0x30) {
+ /* read the status 0x30 */
+ rtc->retval =3D rtc->status;
+ }
+ if (rtc->command =3D=3D 0x31) {
+ /* read the control 0x31 */
+ rtc->retval =3D rtc->control;
+ }
+ }
+ }
+ if (rtc->phase >=3D 8 && rtc->phase < 16) {
+ if (next_rtc_cmd_is_write(rtc->command)) {
+ /* Shift in value to write */
+ rtc->value =3D (rtc->value << 1) | level;
+ } else {
+ /* Shift out value to read */
+ if (rtc->retval & (0x80 >> (rtc->phase - 8))) {
+ qemu_irq_raise(rtc->data_out_irq);
+ } else {
+ qemu_irq_lower(rtc->data_out_irq);
+ }
+ }
+ }
+
+ rtc->phase++;
+ if (rtc->phase =3D=3D 16 && next_rtc_cmd_is_write(rtc->command)) {
+ if (rtc->command >=3D 0x80 && rtc->command <=3D 0x9f) {
+ /* RAM registers */
+ rtc->ram[rtc->command - 0x80] =3D rtc->value;
+ }
+ if (rtc->command =3D=3D 0xb1) {
+ /* write to 0x30 register */
+ if (rtc->value & 0x04) {
+ /* clear FTU */
+ rtc->status =3D rtc->status & (~0x18);
+ qemu_irq_lower(rtc->power_irq);
+ }
+ }
+ }
+}
+
static void next_rtc_cmd_reset_irq(void *opaque, int n, int level)
{
NeXTRTC *rtc =3D NEXT_RTC(opaque);
--=20
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From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
To: huth@tuxfamily.org,
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Date: Thu, 12 Dec 2024 11:46:18 +0000
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Rename them to old_scr2_rtc and scr2_rtc to reflect that they contain the p=
revious
and current values of the SCR2 RTC bits.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Thomas Huth <huth@tuxfamily.org>
---
hw/m68k/next-cube.c | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c
index 12d31dfaad..7b0769c0d3 100644
--- a/hw/m68k/next-cube.c
+++ b/hw/m68k/next-cube.c
@@ -177,17 +177,17 @@ static void next_scr2_led_update(NeXTPC *s)
=20
static void next_scr2_rtc_update(NeXTPC *s)
{
- uint8_t old_scr2, scr2_2;
+ uint8_t old_scr2_rtc, scr2_rtc;
=20
- old_scr2 =3D extract32(s->old_scr2, 8, 8);
- scr2_2 =3D extract32(s->scr2, 8, 8);
+ old_scr2_rtc =3D extract32(s->old_scr2, 8, 8);
+ scr2_rtc =3D extract32(s->scr2, 8, 8);
=20
- if (scr2_2 & 0x1) {
+ if (scr2_rtc & 0x1) {
/* DPRINTF("RTC %x phase %i\n", scr2_2, rtc->phase); */
/* If we are in going down clock... do something */
- if (((old_scr2 & SCR2_RTCLK) !=3D (scr2_2 & SCR2_RTCLK)) &&
- ((scr2_2 & SCR2_RTCLK) =3D=3D 0)) {
- if (scr2_2 & SCR2_RTDATA) {
+ if (((old_scr2_rtc & SCR2_RTCLK) !=3D (scr2_rtc & SCR2_RTCLK)) &&
+ ((scr2_rtc & SCR2_RTCLK) =3D=3D 0)) {
+ if (scr2_rtc & SCR2_RTDATA) {
qemu_irq_raise(s->rtc_data_irq);
} else {
qemu_irq_lower(s->rtc_data_irq);
--=20
2.39.5
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From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
To: huth@tuxfamily.org,
qemu-devel@nongnu.org
Date: Thu, 12 Dec 2024 11:46:19 +0000
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Subject: [PATCH v2 33/34] next-cube: add my copyright to the top of the file
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This series has involved rewriting and/or updating a considerable part of t=
he
next-cube emulation so update the copyright in next-cube.c to reflect this.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Thomas Huth <huth@tuxfamily.org>
Reviewed-by: Philippe Mathieu-Daud=C3=A9 <philmd@linaro.org>
---
hw/m68k/next-cube.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c
index 7b0769c0d3..1e96bb02f8 100644
--- a/hw/m68k/next-cube.c
+++ b/hw/m68k/next-cube.c
@@ -2,6 +2,7 @@
* NeXT Cube System Driver
*
* Copyright (c) 2011 Bryce Lanham
+ * Copyright (c) 2024 Mark Cave-Ayland
*
* This code is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published
--=20
2.39.5
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From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
To: huth@tuxfamily.org,
qemu-devel@nongnu.org
Date: Thu, 12 Dec 2024 11:46:20 +0000
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Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
---
hw/m68k/next-cube.c | 5 +----
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c
index 1e96bb02f8..3c2f3e295c 100644
--- a/hw/m68k/next-cube.c
+++ b/hw/m68k/next-cube.c
@@ -4,10 +4,7 @@
* Copyright (c) 2011 Bryce Lanham
* Copyright (c) 2024 Mark Cave-Ayland
*
- * This code is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published
- * by the Free Software Foundation; either version 2 of the License,
- * or (at your option) any later version.
+ * SPDX-License-Identifier: GPL-2.0-or-later
*/
=20
#include "qemu/osdep.h"
--=20
2.39.5