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From: Nicholas Piggin <npiggin@gmail.com>
To: qemu-devel@nongnu.org
Cc: Nicholas Piggin <npiggin@gmail.com>,
Phil Dennis-Jordan <phil@philjordan.eu>,
Akihiko Odaki <akihiko.odaki@daynix.com>,
=?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@linaro.org>
Subject: [PATCH v2 1/2] hw/usb/hcd-xhci-pci: Make PCI device more configurable
Date: Thu, 12 Dec 2024 18:52:06 +1000
Message-ID: <20241212085207.1439501-2-npiggin@gmail.com>
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To prepare to support another USB PCI Host Controller, make some PCI
configuration dynamic.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
hw/usb/hcd-xhci-pci.h | 9 ++++++
hw/usb/hcd-xhci-nec.c | 10 +++++++
hw/usb/hcd-xhci-pci.c | 69 ++++++++++++++++++++++++++++++++++++-------
3 files changed, 78 insertions(+), 10 deletions(-)
diff --git a/hw/usb/hcd-xhci-pci.h b/hw/usb/hcd-xhci-pci.h
index 08f70ce97cc..213076aabf6 100644
--- a/hw/usb/hcd-xhci-pci.h
+++ b/hw/usb/hcd-xhci-pci.h
@@ -40,6 +40,15 @@ typedef struct XHCIPciState {
XHCIState xhci;
OnOffAuto msi;
OnOffAuto msix;
+ uint8_t cache_line_size;
+ uint8_t pm_cap_off;
+ uint8_t pcie_cap_off;
+ uint8_t msi_cap_off;
+ uint8_t msix_cap_off;
+ int msix_bar_nr;
+ uint64_t msix_bar_size;
+ uint32_t msix_table_off;
+ uint32_t msix_pba_off;
} XHCIPciState;
=20
#endif
diff --git a/hw/usb/hcd-xhci-nec.c b/hw/usb/hcd-xhci-nec.c
index 0e61c6c4f06..6ac1dc7764c 100644
--- a/hw/usb/hcd-xhci-nec.c
+++ b/hw/usb/hcd-xhci-nec.c
@@ -52,6 +52,16 @@ static void nec_xhci_instance_init(Object *obj)
=20
pci->xhci.numintrs =3D nec->intrs;
pci->xhci.numslots =3D nec->slots;
+
+ pci->cache_line_size =3D 0x10;
+ pci->pm_cap_off =3D 0;
+ pci->pcie_cap_off =3D 0xa0;
+ pci->msi_cap_off =3D 0x70;
+ pci->msix_cap_off =3D 0x90;
+ pci->msix_bar_nr =3D 0;
+ pci->msix_bar_size =3D 0;
+ pci->msix_table_off =3D 0x3000;
+ pci->msix_pba_off =3D 0x3800;
}
=20
static void nec_xhci_class_init(ObjectClass *klass, void *data)
diff --git a/hw/usb/hcd-xhci-pci.c b/hw/usb/hcd-xhci-pci.c
index a039f5778a6..948d75b7379 100644
--- a/hw/usb/hcd-xhci-pci.c
+++ b/hw/usb/hcd-xhci-pci.c
@@ -32,8 +32,9 @@
#include "trace.h"
#include "qapi/error.h"
=20
-#define OFF_MSIX_TABLE 0x3000
-#define OFF_MSIX_PBA 0x3800
+#define MSIX_BAR_SIZE 0x800000
+#define OFF_MSIX_TABLE 0x0000
+#define OFF_MSIX_PBA 0x1000
=20
static void xhci_pci_intr_update(XHCIState *xhci, int n, bool enable)
{
@@ -104,6 +105,31 @@ static int xhci_pci_vmstate_post_load(void *opaque, in=
t version_id)
return 0;
}
=20
+static int xhci_pci_add_pm_capability(PCIDevice *pci_dev, uint8_t offset,
+ Error **errp)
+{
+ int err;
+
+ err =3D pci_add_capability(pci_dev, PCI_CAP_ID_PM, offset,
+ PCI_PM_SIZEOF, errp);
+ if (err < 0) {
+ return err;
+ }
+
+ pci_set_word(pci_dev->config + offset + PCI_PM_PMC,
+ PCI_PM_CAP_VER_1_2 |
+ PCI_PM_CAP_D1 | PCI_PM_CAP_D2 |
+ PCI_PM_CAP_PME_D0 | PCI_PM_CAP_PME_D1 |
+ PCI_PM_CAP_PME_D2 | PCI_PM_CAP_PME_D3hot);
+ pci_set_word(pci_dev->wmask + offset + PCI_PM_PMC, 0);
+ pci_set_word(pci_dev->config + offset + PCI_PM_CTRL,
+ PCI_PM_CTRL_NO_SOFT_RESET);
+ pci_set_word(pci_dev->wmask + offset + PCI_PM_CTRL,
+ PCI_PM_CTRL_STATE_MASK);
+
+ return 0;
+}
+
static void usb_xhci_pci_realize(struct PCIDevice *dev, Error **errp)
{
int ret;
@@ -112,7 +138,7 @@ static void usb_xhci_pci_realize(struct PCIDevice *dev,=
Error **errp)
=20
dev->config[PCI_CLASS_PROG] =3D 0x30; /* xHCI */
dev->config[PCI_INTERRUPT_PIN] =3D 0x01; /* interrupt pin 1 */
- dev->config[PCI_CACHE_LINE_SIZE] =3D 0x10;
+ dev->config[PCI_CACHE_LINE_SIZE] =3D s->cache_line_size;
dev->config[0x60] =3D 0x30; /* release number */
=20
object_property_set_link(OBJECT(&s->xhci), "host", OBJECT(s), NULL);
@@ -125,8 +151,16 @@ static void usb_xhci_pci_realize(struct PCIDevice *dev=
, Error **errp)
s->xhci.nec_quirks =3D true;
}
=20
+ if (s->pm_cap_off) {
+ if (xhci_pci_add_pm_capability(dev, s->pm_cap_off, &err)) {
+ error_propagate(errp, err);
+ return;
+ }
+ }
+
if (s->msi !=3D ON_OFF_AUTO_OFF) {
- ret =3D msi_init(dev, 0x70, s->xhci.numintrs, true, false, &err);
+ ret =3D msi_init(dev, s->msi_cap_off, s->xhci.numintrs,
+ true, false, &err);
/*
* Any error other than -ENOTSUP(board's MSI support is broken)
* is a programming error
@@ -143,22 +177,37 @@ static void usb_xhci_pci_realize(struct PCIDevice *de=
v, Error **errp)
/* With msi=3Dauto, we fall back to MSI off silently */
error_free(err);
}
+
pci_register_bar(dev, 0,
PCI_BASE_ADDRESS_SPACE_MEMORY |
PCI_BASE_ADDRESS_MEM_TYPE_64,
&s->xhci.mem);
=20
if (pci_bus_is_express(pci_get_bus(dev))) {
- ret =3D pcie_endpoint_cap_init(dev, 0xa0);
+ ret =3D pcie_endpoint_cap_init(dev, s->pcie_cap_off);
assert(ret > 0);
}
=20
if (s->msix !=3D ON_OFF_AUTO_OFF) {
- /* TODO check for errors, and should fail when msix=3Don */
- msix_init(dev, s->xhci.numintrs,
- &s->xhci.mem, 0, OFF_MSIX_TABLE,
- &s->xhci.mem, 0, OFF_MSIX_PBA,
- 0x90, NULL);
+ MemoryRegion *msix_bar =3D &s->xhci.mem;
+ if (s->msix_bar_nr !=3D 0) {
+ memory_region_init(&dev->msix_exclusive_bar, OBJECT(dev),
+ "xhci-msix", s->msix_bar_size);
+ msix_bar =3D &dev->msix_exclusive_bar;
+ }
+
+ ret =3D msix_init(dev, s->xhci.numintrs,
+ msix_bar, s->msix_bar_nr, s->msix_table_off,
+ msix_bar, s->msix_bar_nr, s->msix_pba_off,
+ s->msix_cap_off, errp);
+ if (ret) {
+ return;
+ }
+
+ pci_register_bar(dev, s->msix_bar_nr,
+ PCI_BASE_ADDRESS_SPACE_MEMORY |
+ PCI_BASE_ADDRESS_MEM_TYPE_64,
+ msix_bar);
}
s->xhci.as =3D pci_get_address_space(dev);
}
--=20
2.45.2
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Thu, 12 Dec 2024 00:52:25 -0800 (PST)
From: Nicholas Piggin <npiggin@gmail.com>
To: qemu-devel@nongnu.org
Cc: Nicholas Piggin <npiggin@gmail.com>,
Phil Dennis-Jordan <phil@philjordan.eu>,
Akihiko Odaki <akihiko.odaki@daynix.com>,
=?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@linaro.org>
Subject: [PATCH v2 2/2] hw/usb/hcd-xhci-pci: Add TI TUSB73X0 XHCI controller
model
Date: Thu, 12 Dec 2024 18:52:07 +1000
Message-ID: <20241212085207.1439501-3-npiggin@gmail.com>
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The TI TUSB73X0 controller has some interesting differences from NEC,
notably a separate BAR for MSIX, and PM capabilities. The spec is freely
available without sign-up.
This controller is accepted by IBM Power proprietary firmware and
software (when the subsystem IDs are set to Power servers, which is not
done here). IBM code is picky about device support, so the NEC device
can not be used.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
include/hw/pci/pci_ids.h | 1 +
include/hw/usb/xhci.h | 1 +
hw/usb/hcd-xhci-ti.c | 92 +++++++++++++++++++++++++++++++++
tests/qtest/usb-hcd-xhci-test.c | 21 +++++---
hw/usb/Kconfig | 5 ++
hw/usb/meson.build | 1 +
6 files changed, 115 insertions(+), 6 deletions(-)
create mode 100644 hw/usb/hcd-xhci-ti.c
diff --git a/include/hw/pci/pci_ids.h b/include/hw/pci/pci_ids.h
index f1a53fea8d6..fdb692db513 100644
--- a/include/hw/pci/pci_ids.h
+++ b/include/hw/pci/pci_ids.h
@@ -182,6 +182,7 @@
#define PCI_VENDOR_ID_HP 0x103c
=20
#define PCI_VENDOR_ID_TI 0x104c
+#define PCI_DEVICE_ID_TI_TUSB73X0 0x8241
=20
#define PCI_VENDOR_ID_MOTOROLA 0x1057
#define PCI_DEVICE_ID_MOTOROLA_MPC106 0x0002
diff --git a/include/hw/usb/xhci.h b/include/hw/usb/xhci.h
index 5c90e1373e5..203ec1fca32 100644
--- a/include/hw/usb/xhci.h
+++ b/include/hw/usb/xhci.h
@@ -3,6 +3,7 @@
=20
#define TYPE_XHCI "base-xhci"
#define TYPE_NEC_XHCI "nec-usb-xhci"
+#define TYPE_TI_XHCI "ti-usb-xhci"
#define TYPE_QEMU_XHCI "qemu-xhci"
#define TYPE_XHCI_SYSBUS "sysbus-xhci"
=20
diff --git a/hw/usb/hcd-xhci-ti.c b/hw/usb/hcd-xhci-ti.c
new file mode 100644
index 00000000000..6d4b44f6aaf
--- /dev/null
+++ b/hw/usb/hcd-xhci-ti.c
@@ -0,0 +1,92 @@
+/*
+ * USB xHCI controller emulation
+ * Datasheet https://www.ti.com/product/TUSB7340
+ *
+ * Copyright (c) 2011 Securiforest
+ * Date: 2011-05-11 ; Author: Hector Martin <hector@marcansoft.com>
+ * Based on usb-xhci-nec.c, emulates TI TUSB73X0
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2.1 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see <http://www.gnu.org/licens=
es/>.
+ */
+
+#include "qemu/osdep.h"
+#include "hw/usb.h"
+#include "qemu/module.h"
+#include "hw/pci/pci.h"
+#include "hw/qdev-properties.h"
+
+#include "hcd-xhci-pci.h"
+
+OBJECT_DECLARE_SIMPLE_TYPE(XHCITiState, TI_XHCI)
+
+struct XHCITiState {
+ /*< private >*/
+ XHCIPciState parent_obj;
+ /*< public >*/
+ uint32_t intrs;
+ uint32_t slots;
+};
+
+static Property ti_xhci_properties[] =3D {
+ DEFINE_PROP_ON_OFF_AUTO("msi", XHCIPciState, msi, ON_OFF_AUTO_AUTO),
+ DEFINE_PROP_ON_OFF_AUTO("msix", XHCIPciState, msix, ON_OFF_AUTO_AUTO),
+ DEFINE_PROP_UINT32("intrs", XHCITiState, intrs, 8),
+ DEFINE_PROP_UINT32("slots", XHCITiState, slots, XHCI_MAXSLOTS),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void ti_xhci_instance_init(Object *obj)
+{
+ XHCIPciState *pci =3D XHCI_PCI(obj);
+ XHCITiState *ti =3D TI_XHCI(obj);
+
+ pci->xhci.numintrs =3D ti->intrs;
+ pci->xhci.numslots =3D ti->slots;
+
+ pci->cache_line_size =3D 0x0;
+ pci->pm_cap_off =3D 0x40;
+ pci->pcie_cap_off =3D 0x70;
+ pci->msi_cap_off =3D 0x48;
+ pci->msix_cap_off =3D 0xc0;
+ pci->msix_bar_nr =3D 0x2;
+ pci->msix_bar_size =3D 0x800000;
+ pci->msix_table_off =3D 0x0;
+ pci->msix_pba_off =3D 0x1000;
+}
+
+static void ti_xhci_class_init(ObjectClass *klass, void *data)
+{
+ PCIDeviceClass *k =3D PCI_DEVICE_CLASS(klass);
+ DeviceClass *dc =3D DEVICE_CLASS(klass);
+
+ device_class_set_props(dc, ti_xhci_properties);
+ k->vendor_id =3D PCI_VENDOR_ID_TI;
+ k->device_id =3D PCI_DEVICE_ID_TI_TUSB73X0;
+ k->revision =3D 0x02;
+}
+
+static const TypeInfo ti_xhci_info =3D {
+ .name =3D TYPE_TI_XHCI,
+ .parent =3D TYPE_XHCI_PCI,
+ .instance_size =3D sizeof(XHCITiState),
+ .instance_init =3D ti_xhci_instance_init,
+ .class_init =3D ti_xhci_class_init,
+};
+
+static void ti_xhci_register_types(void)
+{
+ type_register_static(&ti_xhci_info);
+}
+
+type_init(ti_xhci_register_types)
diff --git a/tests/qtest/usb-hcd-xhci-test.c b/tests/qtest/usb-hcd-xhci-tes=
t.c
index 93614e55461..d4a0d8cc217 100644
--- a/tests/qtest/usb-hcd-xhci-test.c
+++ b/tests/qtest/usb-hcd-xhci-test.c
@@ -59,6 +59,9 @@ typedef struct XHCIQState {
#define XHCI_NEC_ID (PCI_DEVICE_ID_NEC_UPD720200 << 16 | \
PCI_VENDOR_ID_NEC)
=20
+#define XHCI_TI_ID (PCI_DEVICE_ID_TI_TUSB73X0 << 16 | \
+ PCI_VENDOR_ID_TI)
+
/**
* Locate, verify, and return a handle to the XHCI device.
*/
@@ -78,6 +81,8 @@ static QPCIDevice *get_xhci_device(QTestState *qts, uint3=
2_t *fingerprint)
switch (xhci_fingerprint) {
case XHCI_NEC_ID:
break;
+ case XHCI_TI_ID:
+ break;
default:
/* Unknown device. */
g_assert_not_reached();
@@ -134,11 +139,12 @@ static XHCIQState *xhci_boot(const char *cli, ...)
va_end(ap);
} else {
s =3D xhci_boot("-M q35 "
- "-device nec-usb-xhci,id=3Dxhci,bus=3Dpcie.0,addr=3D=
1d.0 "
+ "-device %s,id=3Dxhci,bus=3Dpcie.0,addr=3D1d.0 "
"-drive id=3Ddrive0,if=3Dnone,file=3Dnull-co://,"
- "file.read-zeroes=3Don,format=3Draw");
+ "file.read-zeroes=3Don,format=3Draw",
+ qtest_has_device("ti-usb-xhci") ?
+ "ti-usb-xhci" : "nec-usb-xhci");
}
-
return s;
}
=20
@@ -392,10 +398,12 @@ static void pci_xhci_stress_rings(void)
int i;
=20
s =3D xhci_boot("-M q35 "
- "-device nec-usb-xhci,id=3Dxhci,bus=3Dpcie.0,addr=3D1d.0 "
+ "-device %s,id=3Dxhci,bus=3Dpcie.0,addr=3D1d.0 "
"-device usb-storage,bus=3Dxhci.0,drive=3Ddrive0 "
"-drive id=3Ddrive0,if=3Dnone,file=3Dnull-co://,"
- "file.read-zeroes=3Don,format=3Draw "
+ "file.read-zeroes=3Don,format=3Draw ",
+ qtest_has_device("ti-usb-xhci") ?
+ "ti-usb-xhci" : "nec-usb-xhci"
);
=20
hcsparams1 =3D xhci_cap_readl(s, 0x4); /* HCSPARAMS1 */
@@ -567,7 +575,8 @@ int main(int argc, char **argv)
return 0;
}
=20
- if (!qtest_has_device("nec-usb-xhci")) {
+ if (!qtest_has_device("nec-usb-xhci") &&
+ !qtest_has_device("ti-usb-xhci")) {
return 0;
}
=20
diff --git a/hw/usb/Kconfig b/hw/usb/Kconfig
index 5fbecd2f43b..8e5c4747af9 100644
--- a/hw/usb/Kconfig
+++ b/hw/usb/Kconfig
@@ -49,6 +49,11 @@ config USB_XHCI_NEC
default y if PCI_DEVICES
select USB_XHCI_PCI
=20
+config USB_XHCI_TI
+ bool
+ default y if PCI_DEVICES
+ select USB_XHCI_PCI
+
config USB_XHCI_SYSBUS
bool
select USB_XHCI
diff --git a/hw/usb/meson.build b/hw/usb/meson.build
index 1b4d1507e41..b874a93f16e 100644
--- a/hw/usb/meson.build
+++ b/hw/usb/meson.build
@@ -23,6 +23,7 @@ system_ss.add(when: 'CONFIG_USB_XHCI', if_true: files('hc=
d-xhci.c'))
system_ss.add(when: 'CONFIG_USB_XHCI_PCI', if_true: files('hcd-xhci-pci.c'=
))
system_ss.add(when: 'CONFIG_USB_XHCI_SYSBUS', if_true: files('hcd-xhci-sys=
bus.c'))
system_ss.add(when: 'CONFIG_USB_XHCI_NEC', if_true: files('hcd-xhci-nec.c'=
))
+system_ss.add(when: 'CONFIG_USB_XHCI_TI', if_true: files('hcd-xhci-ti.c'))
system_ss.add(when: 'CONFIG_USB_DWC2', if_true: files('hcd-dwc2.c'))
system_ss.add(when: 'CONFIG_USB_DWC3', if_true: files('hcd-dwc3.c'))
=20
--=20
2.45.2