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a="34124985" X-IronPort-AV: E=Sophos;i="6.12,228,1728975600"; d="scan'208";a="34124985" X-CSE-ConnectionGUID: L+S4SyNSRFeJk/J9+riH1w== X-CSE-MsgGUID: 2AkWO9jUQ8moQC3ow8s5bA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="119407154" From: Zhenzhong Duan To: qemu-devel@nongnu.org Cc: alex.williamson@redhat.com, clg@redhat.com, eric.auger@redhat.com, mst@redhat.com, peterx@redhat.com, jasowang@redhat.com, jgg@nvidia.com, nicolinc@nvidia.com, joao.m.martins@oracle.com, clement.mathieu--drif@eviden.com, kevin.tian@intel.com, yi.l.liu@intel.com, chao.p.peng@intel.com, Zhenzhong Duan , Yi Sun , Paolo Bonzini , Richard Henderson , Eduardo Habkost , Marcel Apfelbaum Subject: [PATCH v6 14/20] intel_iommu: piotlb invalidation should notify unmap Date: Thu, 12 Dec 2024 16:37:51 +0800 Message-Id: <20241212083757.605022-15-zhenzhong.duan@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241212083757.605022-1-zhenzhong.duan@intel.com> References: <20241212083757.605022-1-zhenzhong.duan@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=198.175.65.20; envelope-from=zhenzhong.duan@intel.com; helo=mgamail.intel.com X-Spam_score_int: -48 X-Spam_score: -4.9 X-Spam_bar: ---- X-Spam_report: (-4.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.472, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1733992977599116600 This is used by some emulated devices which caches address translation result. When piotlb invalidation issued in guest, those caches should be refreshed. There is already a similar implementation in iotlb invalidation. So update vtd_iotlb_page_invalidate_notify() to make it work also for piotlb invalidation. For device that does not implement ATS capability or disable it but still caches the translation result, it is better to implement ATS cap or enable it if there is need to cache the translation result. Signed-off-by: Yi Sun Signed-off-by: Zhenzhong Duan Acked-by: Jason Wang Reviewed-by: Cl=C3=A9ment Mathieu--Drif --- hw/i386/intel_iommu.c | 43 ++++++++++++++++++++++++++++++++++--------- 1 file changed, 34 insertions(+), 9 deletions(-) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 68f1808945..2552d3ce14 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -2450,8 +2450,13 @@ static void vtd_iotlb_domain_invalidate(IntelIOMMUSt= ate *s, uint16_t domain_id) } } =20 +/* + * There is no pasid field in iotlb invalidation descriptor, so PCI_NO_PAS= ID + * is passed as parameter. Piotlb invalidation supports pasid, pasid in its + * descriptor is passed which should not be PCI_NO_PASID. + */ static void vtd_iotlb_page_invalidate_notify(IntelIOMMUState *s, - uint16_t domain_id, hwaddr addr, + uint16_t domain_id, hwaddr ad= dr, uint8_t am, uint32_t pasid) { VTDAddressSpace *vtd_as; @@ -2460,19 +2465,37 @@ static void vtd_iotlb_page_invalidate_notify(IntelI= OMMUState *s, hwaddr size =3D (1 << am) * VTD_PAGE_SIZE; =20 QLIST_FOREACH(vtd_as, &(s->vtd_as_with_notifiers), next) { - if (pasid !=3D PCI_NO_PASID && pasid !=3D vtd_as->pasid) { - continue; - } ret =3D vtd_dev_to_context_entry(s, pci_bus_num(vtd_as->bus), vtd_as->devfn, &ce); if (!ret && domain_id =3D=3D vtd_get_domain_id(s, &ce, vtd_as->pas= id)) { + uint32_t rid2pasid =3D PCI_NO_PASID; + + if (s->root_scalable) { + rid2pasid =3D VTD_CE_GET_RID2PASID(&ce); + } + + /* + * In legacy mode, vtd_as->pasid =3D=3D pasid is always true. + * In scalable mode, for vtd address space backing a PCI + * device without pasid, needs to compare pasid with + * rid2pasid of this device. + */ + if (!(vtd_as->pasid =3D=3D pasid || + (vtd_as->pasid =3D=3D PCI_NO_PASID && pasid =3D=3D rid2p= asid))) { + continue; + } + if (vtd_as_has_map_notifier(vtd_as)) { /* - * As long as we have MAP notifications registered in - * any of our IOMMU notifiers, we need to sync the - * shadow page table. + * When stage-1 translation is off, as long as we have MAP + * notifications registered in any of our IOMMU notifiers, + * we need to sync the shadow page table. Otherwise VFIO + * device attaches to nested page table instead of shadow + * page table, so no need to sync. */ - vtd_sync_shadow_page_table_range(vtd_as, &ce, addr, size); + if (!s->flts || !s->root_scalable) { + vtd_sync_shadow_page_table_range(vtd_as, &ce, addr, si= ze); + } } else { /* * For UNMAP-only notifiers, we don't need to walk the @@ -2960,7 +2983,7 @@ static void vtd_piotlb_pasid_invalidate(IntelIOMMUSta= te *s, continue; } =20 - if (!s->flts) { + if (!s->flts || !vtd_as_has_map_notifier(vtd_as)) { vtd_address_space_sync(vtd_as); } } @@ -2981,6 +3004,8 @@ static void vtd_piotlb_page_invalidate(IntelIOMMUStat= e *s, uint16_t domain_id, g_hash_table_foreach_remove(s->iotlb, vtd_hash_remove_by_page_piotlb, &info); vtd_iommu_unlock(s); + + vtd_iotlb_page_invalidate_notify(s, domain_id, addr, am, pasid); } =20 static bool vtd_process_piotlb_desc(IntelIOMMUState *s, --=20 2.34.1