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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434f4dfdcdfsm121460595e9.39.2024.12.11.08.21.20 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2024 08:21:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1733934081; x=1734538881; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=E0giBM/EpXvNpQdM8VbewBXwD4I1LGLbeL66q1YYWe8=; b=y2h58+qP546ZgI1/ki+Ul0S+bK6Wch1eRTEkmj7ZdpuHCF0OXYPJ2uETy5fuPoUFl1 DvTP5eXbeEY9cK07sq9as62GHeWSJ9WMdXsv2rFDvXr19qOreOt+snf93y4ieRrzgZIs KnyXkYl1phFCmqUDU4upKGmOaX/yzxKTnqiIOIezVuf8nFhDhJNiIg1+nQDHPY3aolX9 61P5E+V+TdoLEIgjdecz+R9RKgGv6ImQwghGp4V82PEpiiqtP0R7gHsabk+bXS0fbG0B TIGmjnVRUb1TbrROaz+tjf4T4m6SuQukoD5mZsrpoB0E3mqclwDeFRY9YIOqzsb4FZFo WADA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1733934081; x=1734538881; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=E0giBM/EpXvNpQdM8VbewBXwD4I1LGLbeL66q1YYWe8=; b=ox8BZKTeh0E8DfkpaAlR+FWXK60PlYD/wXjFoqwzM+0Nu5pMl+NNVjBvHHxHt3MGDb Ml5KSw+G8UhlCcqcwAsEP/B1xS+Qg9QzB5SYt21u0n/y2/tWPGMbyljrIoD9xfAcBDGI JBpgeje1ezC7GlmPAk9VIwspPI/yD3A6X3ISs6GowZuMupj9gKb9rSB1zZ4DknZLC0RR 5tUQDH2td7kHF+OKLz+Rl/Ns4zl6sPMw2oIlQBh2RhHN1YpRPCazk4f8R32GHQCOay32 Npcz4qTA3eOE7hlYhI5CPpTVoJKybigfegFtf3y6umkqD+rw9EAKEeB+9aIjXe0zLman khRQ== X-Gm-Message-State: AOJu0YwUZvO12P84BY2URRX6Q9tNfzB1NTvRuSBTwg/xV74eKKFmv/Xw ihm8KkdJ31u1Zm/lafeStNyj19RbJQHimEADnQXfcab6ozq8Axb2NATJpOdihLDhNmRuh6MtNmu l X-Gm-Gg: ASbGnctoc2sswdOAmvGeHtst8Ai4K9HzRWZFbflvNH8IhDICQh6Wq5TYvF83DobUzwq ch6zaQuFBXScXOEj7fZPRpw3mSzbtXBlo2W2GRCJisSz0e2XyF5ATd48wqKyGM0XSFZ7ZERPnyy rinowlqm6D7006ulrYiWb5Pcj8VMIQp4bCHeBz6QDtQy3BUT8GVxOwGGvv5lqtB73htIP0uhj65 UYljBrxgKOWW3PAcISUagr8JhT696HCSR29rqxgS+t3GmmSnt9g+OmhfHha X-Google-Smtp-Source: AGHT+IGq4/1upfXFgIlB/bxNmYSvLA3vR6ZM6nCu+I9obc5PHJo0UuRNQb9M8kEtmNHPs6DIIgt/vw== X-Received: by 2002:a05:600c:3b09:b0:434:f609:1af7 with SMTP id 5b1f17b1804b1-4361c346a89mr29631275e9.4.1733934081439; Wed, 11 Dec 2024 08:21:21 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 67/72] softfloat: Inline pickNaN Date: Wed, 11 Dec 2024 16:19:59 +0000 Message-Id: <20241211162004.2795499-68-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241211162004.2795499-1-peter.maydell@linaro.org> References: <20241211162004.2795499-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1733934597750116600 From: Richard Henderson Inline pickNaN into its only caller. This makes one assert redundant with the immediately preceding IF. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-id: 20241203203949.483774-9-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- fpu/softfloat-parts.c.inc | 82 +++++++++++++++++++++++++---- fpu/softfloat-specialize.c.inc | 96 ---------------------------------- 2 files changed, 73 insertions(+), 105 deletions(-) diff --git a/fpu/softfloat-parts.c.inc b/fpu/softfloat-parts.c.inc index 5fcdbc87fd7..a1b148e90b9 100644 --- a/fpu/softfloat-parts.c.inc +++ b/fpu/softfloat-parts.c.inc @@ -39,24 +39,88 @@ static void partsN(return_nan)(FloatPartsN *a, float_st= atus *s) static FloatPartsN *partsN(pick_nan)(FloatPartsN *a, FloatPartsN *b, float_status *s) { + int cmp, which; + if (is_snan(a->cls) || is_snan(b->cls)) { float_raise(float_flag_invalid | float_flag_invalid_snan, s); } =20 if (s->default_nan_mode) { parts_default_nan(a, s); - } else { - int cmp =3D frac_cmp(a, b); - if (cmp =3D=3D 0) { - cmp =3D a->sign < b->sign; - } + return a; + } =20 - if (pickNaN(a->cls, b->cls, cmp > 0, s)) { - a =3D b; - } + cmp =3D frac_cmp(a, b); + if (cmp =3D=3D 0) { + cmp =3D a->sign < b->sign; + } + + switch (s->float_2nan_prop_rule) { + case float_2nan_prop_s_ab: if (is_snan(a->cls)) { - parts_silence_nan(a, s); + which =3D 0; + } else if (is_snan(b->cls)) { + which =3D 1; + } else if (is_qnan(a->cls)) { + which =3D 0; + } else { + which =3D 1; } + break; + case float_2nan_prop_s_ba: + if (is_snan(b->cls)) { + which =3D 1; + } else if (is_snan(a->cls)) { + which =3D 0; + } else if (is_qnan(b->cls)) { + which =3D 1; + } else { + which =3D 0; + } + break; + case float_2nan_prop_ab: + which =3D is_nan(a->cls) ? 0 : 1; + break; + case float_2nan_prop_ba: + which =3D is_nan(b->cls) ? 1 : 0; + break; + case float_2nan_prop_x87: + /* + * This implements x87 NaN propagation rules: + * SNaN + QNaN =3D> return the QNaN + * two SNaNs =3D> return the one with the larger significand, sile= nced + * two QNaNs =3D> return the one with the larger significand + * SNaN and a non-NaN =3D> return the SNaN, silenced + * QNaN and a non-NaN =3D> return the QNaN + * + * If we get down to comparing significands and they are the same, + * return the NaN with the positive sign bit (if any). + */ + if (is_snan(a->cls)) { + if (is_snan(b->cls)) { + which =3D cmp > 0 ? 0 : 1; + } else { + which =3D is_qnan(b->cls) ? 1 : 0; + } + } else if (is_qnan(a->cls)) { + if (is_snan(b->cls) || !is_qnan(b->cls)) { + which =3D 0; + } else { + which =3D cmp > 0 ? 0 : 1; + } + } else { + which =3D 1; + } + break; + default: + g_assert_not_reached(); + } + + if (which) { + a =3D b; + } + if (is_snan(a->cls)) { + parts_silence_nan(a, s); } return a; } diff --git a/fpu/softfloat-specialize.c.inc b/fpu/softfloat-specialize.c.inc index f7a320f6ff9..cbbbab52ba3 100644 --- a/fpu/softfloat-specialize.c.inc +++ b/fpu/softfloat-specialize.c.inc @@ -352,102 +352,6 @@ bool float32_is_signaling_nan(float32 a_, float_statu= s *status) } } =20 -/*------------------------------------------------------------------------= ---- -| Select which NaN to propagate for a two-input operation. -| IEEE754 doesn't specify all the details of this, so the -| algorithm is target-specific. -| The routine is passed various bits of information about the -| two NaNs and should return 0 to select NaN a and 1 for NaN b. -| Note that signalling NaNs are always squashed to quiet NaNs -| by the caller, by calling floatXX_silence_nan() before -| returning them. -| -| aIsLargerSignificand is only valid if both a and b are NaNs -| of some kind, and is true if a has the larger significand, -| or if both a and b have the same significand but a is -| positive but b is negative. It is only needed for the x87 -| tie-break rule. -*-------------------------------------------------------------------------= ---*/ - -static int pickNaN(FloatClass a_cls, FloatClass b_cls, - bool aIsLargerSignificand, float_status *status) -{ - /* - * We guarantee not to require the target to tell us how to - * pick a NaN if we're always returning the default NaN. - * But if we're not in default-NaN mode then the target must - * specify via set_float_2nan_prop_rule(). - */ - assert(!status->default_nan_mode); - - switch (status->float_2nan_prop_rule) { - case float_2nan_prop_s_ab: - if (is_snan(a_cls)) { - return 0; - } else if (is_snan(b_cls)) { - return 1; - } else if (is_qnan(a_cls)) { - return 0; - } else { - return 1; - } - break; - case float_2nan_prop_s_ba: - if (is_snan(b_cls)) { - return 1; - } else if (is_snan(a_cls)) { - return 0; - } else if (is_qnan(b_cls)) { - return 1; - } else { - return 0; - } - break; - case float_2nan_prop_ab: - if (is_nan(a_cls)) { - return 0; - } else { - return 1; - } - break; - case float_2nan_prop_ba: - if (is_nan(b_cls)) { - return 1; - } else { - return 0; - } - break; - case float_2nan_prop_x87: - /* - * This implements x87 NaN propagation rules: - * SNaN + QNaN =3D> return the QNaN - * two SNaNs =3D> return the one with the larger significand, sile= nced - * two QNaNs =3D> return the one with the larger significand - * SNaN and a non-NaN =3D> return the SNaN, silenced - * QNaN and a non-NaN =3D> return the QNaN - * - * If we get down to comparing significands and they are the same, - * return the NaN with the positive sign bit (if any). - */ - if (is_snan(a_cls)) { - if (is_snan(b_cls)) { - return aIsLargerSignificand ? 0 : 1; - } - return is_qnan(b_cls) ? 1 : 0; - } else if (is_qnan(a_cls)) { - if (is_snan(b_cls) || !is_qnan(b_cls)) { - return 0; - } else { - return aIsLargerSignificand ? 0 : 1; - } - } else { - return 1; - } - default: - g_assert_not_reached(); - } -} - /*------------------------------------------------------------------------= ---- | Returns 1 if the double-precision floating-point value `a' is a quiet | NaN; otherwise returns 0. --=20 2.34.1