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From: Craig Blackmore <craig.blackmore@embecosm.com>
To: qemu-devel@nongnu.org,
qemu-riscv@nongnu.org
Cc: Craig Blackmore <craig.blackmore@embecosm.com>,
Richard Henderson <richard.henderson@linaro.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Alistair Francis <alistair.francis@wdc.com>, Bin Meng <bmeng.cn@gmail.com>,
Weiwei Li <liwei1518@gmail.com>,
Daniel Henrique Barboza <dbarboza@ventanamicro.com>,
Liu Zhiwei <zhiwei_liu@linux.alibaba.com>,
Helene Chelin <helene.chelin@embecosm.com>, Nathan Egge <negge@google.com>,
Max Chou <max.chou@sifive.com>, Paolo Savini <paolo.savini@embecosm.com>
Subject: [PATCH v7 1/2] target/riscv: rvv: fix typo in vext continuous ldst
function names
Date: Wed, 11 Dec 2024 12:51:12 +0000
Message-ID: <20241211125113.583902-2-craig.blackmore@embecosm.com>
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Replace `continus` with `continuous`.
Signed-off-by: Craig Blackmore <craig.blackmore@embecosm.com>
---
target/riscv/vector_helper.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
index a85dd1d200..0f57e48cc5 100644
--- a/target/riscv/vector_helper.c
+++ b/target/riscv/vector_helper.c
@@ -195,7 +195,7 @@ GEN_VEXT_ST_ELEM(ste_w, uint32_t, H4, stl)
GEN_VEXT_ST_ELEM(ste_d, uint64_t, H8, stq)
=20
static inline QEMU_ALWAYS_INLINE void
-vext_continus_ldst_tlb(CPURISCVState *env, vext_ldst_elem_fn_tlb *ldst_tlb,
+vext_continuous_ldst_tlb(CPURISCVState *env, vext_ldst_elem_fn_tlb *ldst_t=
lb,
void *vd, uint32_t evl, target_ulong addr,
uint32_t reg_start, uintptr_t ra, uint32_t esz,
bool is_load)
@@ -207,7 +207,7 @@ vext_continus_ldst_tlb(CPURISCVState *env, vext_ldst_el=
em_fn_tlb *ldst_tlb,
}
=20
static inline QEMU_ALWAYS_INLINE void
-vext_continus_ldst_host(CPURISCVState *env, vext_ldst_elem_fn_host *ldst_h=
ost,
+vext_continuous_ldst_host(CPURISCVState *env, vext_ldst_elem_fn_host *ldst=
_host,
void *vd, uint32_t evl, uint32_t reg_start, void *=
host,
uint32_t esz, bool is_load)
{
@@ -342,8 +342,8 @@ vext_page_ldst_us(CPURISCVState *env, void *vd, target_=
ulong addr,
=20
if (flags =3D=3D 0) {
if (nf =3D=3D 1) {
- vext_continus_ldst_host(env, ldst_host, vd, evl, env->vstart, =
host,
- esz, is_load);
+ vext_continuous_ldst_host(env, ldst_host, vd, evl, env->vstart,
+ host, esz, is_load);
} else {
for (i =3D env->vstart; i < evl; ++i) {
k =3D 0;
@@ -357,7 +357,7 @@ vext_page_ldst_us(CPURISCVState *env, void *vd, target_=
ulong addr,
env->vstart +=3D elems;
} else {
if (nf =3D=3D 1) {
- vext_continus_ldst_tlb(env, ldst_tlb, vd, evl, addr, env->vsta=
rt,
+ vext_continuous_ldst_tlb(env, ldst_tlb, vd, evl, addr, env->vs=
tart,
ra, esz, is_load);
} else {
/* load bytes from guest memory */
--=20
2.43.0
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From: Craig Blackmore <craig.blackmore@embecosm.com>
To: qemu-devel@nongnu.org,
qemu-riscv@nongnu.org
Cc: Craig Blackmore <craig.blackmore@embecosm.com>,
Richard Henderson <richard.henderson@linaro.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Alistair Francis <alistair.francis@wdc.com>, Bin Meng <bmeng.cn@gmail.com>,
Weiwei Li <liwei1518@gmail.com>,
Daniel Henrique Barboza <dbarboza@ventanamicro.com>,
Liu Zhiwei <zhiwei_liu@linux.alibaba.com>,
Helene Chelin <helene.chelin@embecosm.com>, Nathan Egge <negge@google.com>,
Max Chou <max.chou@sifive.com>, Paolo Savini <paolo.savini@embecosm.com>
Subject: [PATCH v7 2/2] target/riscv: rvv: speed up small unit-stride loads
and stores
Date: Wed, 11 Dec 2024 12:51:13 +0000
Message-ID: <20241211125113.583902-3-craig.blackmore@embecosm.com>
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Calling `vext_continuous_ldst_tlb` for load/stores smaller than 12 bytes
significantly improves performance.
Co-authored-by: Helene CHELIN <helene.chelin@embecosm.com>
Co-authored-by: Paolo Savini <paolo.savini@embecosm.com>
Co-authored-by: Craig Blackmore <craig.blackmore@embecosm.com>
Signed-off-by: Helene CHELIN <helene.chelin@embecosm.com>
Signed-off-by: Paolo Savini <paolo.savini@embecosm.com>
Signed-off-by: Craig Blackmore <craig.blackmore@embecosm.com>
---
target/riscv/vector_helper.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
index 0f57e48cc5..529b4b261e 100644
--- a/target/riscv/vector_helper.c
+++ b/target/riscv/vector_helper.c
@@ -393,6 +393,22 @@ vext_ldst_us(void *vd, target_ulong base, CPURISCVStat=
e *env, uint32_t desc,
return;
}
=20
+#if defined(CONFIG_USER_ONLY)
+ /*
+ * For data sizes < 12 bits we get better performance by simply calling
+ * vext_continuous_ldst_tlb
+ */
+ if (nf =3D=3D 1 && (evl << log2_esz) < 12) {
+ addr =3D base + (env->vstart << log2_esz);
+ vext_continuous_ldst_tlb(env, ldst_tlb, vd, evl, addr, env->vstart=
, ra,
+ esz, is_load);
+
+ env->vstart =3D 0;
+ vext_set_tail_elems_1s(evl, vd, desc, nf, esz, max_elems);
+ return;
+ }
+#endif
+
/* Calculate the page range of first page */
addr =3D base + ((env->vstart * nf) << log2_esz);
page_split =3D -(addr | TARGET_PAGE_MASK);
--=20
2.43.0