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c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1733898681; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=k0MOrVnsfJF9J47Dykom0x4YuGbdUL3pqJiPw9KfMnU=; b=CQWM3BcPPVoXp3TKCl4HJ/K2ItjxoOLcfKLxGlcwGdBiqTXq3n8wTw215nBz3qemXBZ1gd cJ6E7SidiIuzOV3fBBQXSVm7UQEgQpYXCvF415XiVlVrd/14AWRupg78QbXYE1ZhpCdRoA wIWJu5OQXiXEyfyBagEYF9me93EfRqg= X-MC-Unique: EptO84_RMseBDnRpitsoCQ-1 X-Mimecast-MFC-AGG-ID: EptO84_RMseBDnRpitsoCQ From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: Jamin Lin , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Subject: [PULL 04/24] hw:sdhci: Introduce a new "capareg" class member to set the different Capability Registers Date: Wed, 11 Dec 2024 07:30:38 +0100 Message-ID: <20241211063058.1222038-5-clg@redhat.com> In-Reply-To: <20241211063058.1222038-1-clg@redhat.com> References: <20241211063058.1222038-1-clg@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.0 on 10.30.177.40 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=clg@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -25 X-Spam_score: -2.6 X-Spam_bar: -- X-Spam_report: (-2.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.52, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1733898740663116600 From: Jamin Lin Currently, it set the hardcode value of capability registers to all ASPEED = SOCs However, the value of capability registers should be different for all ASPE= ED SOCs. For example: the bit 28 of the Capability Register 1 should be 1 for 64-bits System Bus support for AST2700. Introduce a new "capareg" class member whose data type is uint_64 to set the different Capability Registers to all ASPEED SOCs. The value of Capability Register is "0x0000000001e80080" for AST2400 and AST2500. The value of Capability Register is "0x0000000701f80080" for AST26= 00. Signed-off-by: Jamin Lin Reviewed-by: C=C3=A9dric Le Goater Link: https://lore.kernel.org/r/20241204084453.610660-4-jamin_lin@aspeedtec= h.com Signed-off-by: C=C3=A9dric Le Goater --- include/hw/sd/aspeed_sdhci.h | 12 +++++++-- hw/arm/aspeed_ast2400.c | 3 ++- hw/arm/aspeed_ast2600.c | 7 +++--- hw/sd/aspeed_sdhci.c | 47 +++++++++++++++++++++++++++++++++++- 4 files changed, 61 insertions(+), 8 deletions(-) diff --git a/include/hw/sd/aspeed_sdhci.h b/include/hw/sd/aspeed_sdhci.h index 057bc5f3d139..8083797e25bc 100644 --- a/include/hw/sd/aspeed_sdhci.h +++ b/include/hw/sd/aspeed_sdhci.h @@ -13,9 +13,11 @@ #include "qom/object.h" =20 #define TYPE_ASPEED_SDHCI "aspeed.sdhci" -OBJECT_DECLARE_SIMPLE_TYPE(AspeedSDHCIState, ASPEED_SDHCI) +#define TYPE_ASPEED_2400_SDHCI TYPE_ASPEED_SDHCI "-ast2400" +#define TYPE_ASPEED_2500_SDHCI TYPE_ASPEED_SDHCI "-ast2500" +#define TYPE_ASPEED_2600_SDHCI TYPE_ASPEED_SDHCI "-ast2600" +OBJECT_DECLARE_TYPE(AspeedSDHCIState, AspeedSDHCIClass, ASPEED_SDHCI) =20 -#define ASPEED_SDHCI_CAPABILITIES 0x01E80080 #define ASPEED_SDHCI_NUM_SLOTS 2 #define ASPEED_SDHCI_NUM_REGS (ASPEED_SDHCI_REG_SIZE / sizeof(uint32_t= )) #define ASPEED_SDHCI_REG_SIZE 0x100 @@ -32,4 +34,10 @@ struct AspeedSDHCIState { uint32_t regs[ASPEED_SDHCI_NUM_REGS]; }; =20 +struct AspeedSDHCIClass { + SysBusDeviceClass parent_class; + + uint64_t capareg; +}; + #endif /* ASPEED_SDHCI_H */ diff --git a/hw/arm/aspeed_ast2400.c b/hw/arm/aspeed_ast2400.c index ecc81ecc79ce..3c1b4199452e 100644 --- a/hw/arm/aspeed_ast2400.c +++ b/hw/arm/aspeed_ast2400.c @@ -224,7 +224,8 @@ static void aspeed_ast2400_soc_init(Object *obj) snprintf(typename, sizeof(typename), "aspeed.gpio-%s", socname); object_initialize_child(obj, "gpio", &s->gpio, typename); =20 - object_initialize_child(obj, "sdc", &s->sdhci, TYPE_ASPEED_SDHCI); + snprintf(typename, sizeof(typename), "aspeed.sdhci-%s", socname); + object_initialize_child(obj, "sdc", &s->sdhci, typename); =20 object_property_set_int(OBJECT(&s->sdhci), "num-slots", 2, &error_abor= t); =20 diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c index c40d3d84435f..b5703bd064c1 100644 --- a/hw/arm/aspeed_ast2600.c +++ b/hw/arm/aspeed_ast2600.c @@ -236,8 +236,8 @@ static void aspeed_soc_ast2600_init(Object *obj) snprintf(typename, sizeof(typename), "aspeed.gpio-%s-1_8v", socname); object_initialize_child(obj, "gpio_1_8v", &s->gpio_1_8v, typename); =20 - object_initialize_child(obj, "sd-controller", &s->sdhci, - TYPE_ASPEED_SDHCI); + snprintf(typename, sizeof(typename), "aspeed.sdhci-%s", socname); + object_initialize_child(obj, "sd-controller", &s->sdhci, typename); =20 object_property_set_int(OBJECT(&s->sdhci), "num-slots", 2, &error_abor= t); =20 @@ -247,8 +247,7 @@ static void aspeed_soc_ast2600_init(Object *obj) &s->sdhci.slots[i], TYPE_SYSBUS_SDHCI); } =20 - object_initialize_child(obj, "emmc-controller", &s->emmc, - TYPE_ASPEED_SDHCI); + object_initialize_child(obj, "emmc-controller", &s->emmc, typename); =20 object_property_set_int(OBJECT(&s->emmc), "num-slots", 1, &error_abort= ); =20 diff --git a/hw/sd/aspeed_sdhci.c b/hw/sd/aspeed_sdhci.c index acd65382611c..ae2ec4a91644 100644 --- a/hw/sd/aspeed_sdhci.c +++ b/hw/sd/aspeed_sdhci.c @@ -148,6 +148,7 @@ static void aspeed_sdhci_realize(DeviceState *dev, Erro= r **errp) { SysBusDevice *sbd =3D SYS_BUS_DEVICE(dev); AspeedSDHCIState *sdhci =3D ASPEED_SDHCI(dev); + AspeedSDHCIClass *asc =3D ASPEED_SDHCI_GET_CLASS(sdhci); =20 /* Create input irqs for the slots */ qdev_init_gpio_in_named_with_opaque(DEVICE(sbd), aspeed_sdhci_set_irq, @@ -167,7 +168,7 @@ static void aspeed_sdhci_realize(DeviceState *dev, Erro= r **errp) } =20 if (!object_property_set_uint(sdhci_slot, "capareg", - ASPEED_SDHCI_CAPABILITIES, errp)) { + asc->capareg, errp)) { return; } =20 @@ -218,12 +219,56 @@ static void aspeed_sdhci_class_init(ObjectClass *clas= sp, void *data) device_class_set_props(dc, aspeed_sdhci_properties); } =20 +static void aspeed_2400_sdhci_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + AspeedSDHCIClass *asc =3D ASPEED_SDHCI_CLASS(klass); + + dc->desc =3D "ASPEED 2400 SDHCI Controller"; + asc->capareg =3D 0x0000000001e80080; +} + +static void aspeed_2500_sdhci_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + AspeedSDHCIClass *asc =3D ASPEED_SDHCI_CLASS(klass); + + dc->desc =3D "ASPEED 2500 SDHCI Controller"; + asc->capareg =3D 0x0000000001e80080; +} + +static void aspeed_2600_sdhci_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + AspeedSDHCIClass *asc =3D ASPEED_SDHCI_CLASS(klass); + + dc->desc =3D "ASPEED 2600 SDHCI Controller"; + asc->capareg =3D 0x0000000701f80080; +} + static const TypeInfo aspeed_sdhci_types[] =3D { { .name =3D TYPE_ASPEED_SDHCI, .parent =3D TYPE_SYS_BUS_DEVICE, .instance_size =3D sizeof(AspeedSDHCIState), .class_init =3D aspeed_sdhci_class_init, + .class_size =3D sizeof(AspeedSDHCIClass), + .abstract =3D true, + }, + { + .name =3D TYPE_ASPEED_2400_SDHCI, + .parent =3D TYPE_ASPEED_SDHCI, + .class_init =3D aspeed_2400_sdhci_class_init, + }, + { + .name =3D TYPE_ASPEED_2500_SDHCI, + .parent =3D TYPE_ASPEED_SDHCI, + .class_init =3D aspeed_2500_sdhci_class_init, + }, + { + .name =3D TYPE_ASPEED_2600_SDHCI, + .parent =3D TYPE_ASPEED_SDHCI, + .class_init =3D aspeed_2600_sdhci_class_init, }, }; =20 --=20 2.47.1