From nobody Fri Dec 19 20:25:00 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1733847688; cv=none; d=zohomail.com; s=zohoarc; b=nuxJQmziatANCpnSV8evgQOCs/1b9FB0qEgLvnKY0PvvEBQxRgEdLo1oLlnLl+xvDqOoGhrRD2Tl8SXHrlq+tMsVfreshX0XkweEweidjUzjJAuolXiiu6i7ShVV5Tvpom8bEDvsmjjcpD+uY2fcqP2cOHnVZqh2x2rNfhJr3+Y= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1733847688; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=OlPqq3SkO/OL532CbnGb++BEeuAMvtHyeW45jNWCD1U=; b=moJt1SmRHbVQeXxzC0+GBe8lkAAPMjCXrNpxFqPZgLVQPBvVJdclweG1r76CiH4+ZSc9JcdMBh3fCBe/X3J34Bmlb+xAMTBNLy2TdX5PYkGQ+2xrgx1HlOa8uXpCnCCMIfLjOSus0D5TB3rRA7I5vRMfAUzVhihPASmqSbzqXQc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1733847688526234.56658974634615; Tue, 10 Dec 2024 08:21:28 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tL2xP-0003jx-EA; Tue, 10 Dec 2024 11:19:31 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tL2x4-0002wX-1E for qemu-devel@nongnu.org; Tue, 10 Dec 2024 11:19:15 -0500 Received: from mail-lf1-x12e.google.com ([2a00:1450:4864:20::12e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tL2x0-0006Sc-WC for qemu-devel@nongnu.org; Tue, 10 Dec 2024 11:19:09 -0500 Received: by mail-lf1-x12e.google.com with SMTP id 2adb3069b0e04-5401bd6cdb7so2796412e87.2 for ; Tue, 10 Dec 2024 08:19:06 -0800 (PST) Received: from stoup.. ([91.209.212.80]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-53f93377eefsm1026343e87.67.2024.12.10.08.19.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 Dec 2024 08:19:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1733847545; x=1734452345; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=OlPqq3SkO/OL532CbnGb++BEeuAMvtHyeW45jNWCD1U=; b=QCT55eQI0UFAJyji6xCXvpCz+H+ckjpX1dQVpiV8GYjlw9Ze8p5E9Py96LNSCQAhlX RZ5PHFbCR6LejoSoPEqE0BI8HeuREZdlS2zinUQkd0Wjzh6JM1NwX6O/sjyOnhGoVNU7 FlPtemdmWUCUUtJV9wXRuq8rfyEqpv9GRObiJDFJXSUqGKSpLMpUII+bdxW7LEM8J44k rVtDI3gVeuZibAjfdTCk5JMTKGUqMjC+lG4yY7m40akORhMkXEvendHPsYV3DlF2Fx9V gLfmmfOgDzTNSP9pFN5llnzJNP6aDzT3rvC+yRlB+YtCyN2lGtZHrBhamib5yOVPwMH3 4U1Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1733847545; x=1734452345; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=OlPqq3SkO/OL532CbnGb++BEeuAMvtHyeW45jNWCD1U=; b=cIvW1A4FKEjFoQ/VEoo/0IGdkvUIvN3pGS6qRHPKQJBGoPBOgRRtqAEBXHL9E+7nfZ JoSs/oaP5Po6j1d8KI91HbXnWCJUGTIyGHsrppMNVCsNxcN5BdWCXaHWAakc2suVp9Ba ZGhnKHWo/cNgrYRrobt7W97uI+d/vl5YTn2x0pnEq/jYWuX3LiGMm542FrT0ZX9DlNuj 28EkJQstC6e2m7lB2VXIC5d+FKpP3NQdEqC2Zv+sPU6NrfCAQELRbkdO7dJ6mRR1CviZ Gl4hrJ3Nh8lzAg5iI2ZPRtsp9CX5Wc4K6w1xndpZoR0Ihmym87WQIxRodlNuDq5ulYzL jJ2Q== X-Gm-Message-State: AOJu0Yy4APRY5dL7fwL2aTCRppyRtpob6GgoJnDwrwrhmrEDpJN/7tsx UHldbmzNohKUUO5L0PZWY2fezpqr54MPAcDBJHhhCNCRNS6MflnjwwMWGZoMC4eF9ixCcbGoS6/ fnjCUpS5H X-Gm-Gg: ASbGncu1K3PhPF0HJ3BnnnaWGOzHLeqMDzsoPK1d2nDTBuchCdCRwKHqm+C1NtbzCJo wJU7u4GfUrlxqnym9s0U2sJ5dwTlwDCzLR0BYGg2xspYcuMrjYszdUfpGzYbniNRMko/let7TN4 TVw4oZkhFV0+arXoxR785aacGb7ywJWkUeqCoOzGHmeiA+qy4e/MX1TSoIa+XSrx1rRw3yQs6HC 7qIprA1QzfJMrGRZMEnjAxfA+1cF7aEnUlkXyEtKSDaOWcRC+swpmGc720= X-Google-Smtp-Source: AGHT+IFGc8vS4e3n70FEHXYcDYhmIdFttLQxCGQBSv+bT1HGn6QHuU3eo16qvKIYmVFXbOPmuDsP4A== X-Received: by 2002:a05:6512:2209:b0:53e:36ca:6578 with SMTP id 2adb3069b0e04-53e36ca66e1mr7248318e87.43.1733847545119; Tue, 10 Dec 2024 08:19:05 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, Peter Maydell Subject: [PATCH v2 21/69] target/arm: Introduce fp_access_check_vector_hsd Date: Tue, 10 Dec 2024 10:16:45 -0600 Message-ID: <20241210161733.1830573-22-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241210161733.1830573-1-richard.henderson@linaro.org> References: <20241210161733.1830573-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::12e; envelope-from=richard.henderson@linaro.org; helo=mail-lf1-x12e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1733847688934116600 Content-Type: text/plain; charset="utf-8" Provide a simple way to check for float64, float32, and float16 support vs vector width, as well as the fpu enabled. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/tcg/translate-a64.c | 135 +++++++++++++-------------------- 1 file changed, 54 insertions(+), 81 deletions(-) diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c index 4e47b8a804..4611ae4ade 100644 --- a/target/arm/tcg/translate-a64.c +++ b/target/arm/tcg/translate-a64.c @@ -1260,6 +1260,28 @@ static int fp_access_check_scalar_hsd(DisasContext *= s, MemOp esz) return fp_access_check(s); } =20 +/* Likewise, but vector MO_64 must have two elements. */ +static int fp_access_check_vector_hsd(DisasContext *s, bool is_q, MemOp es= z) +{ + switch (esz) { + case MO_64: + if (!is_q) { + return -1; + } + break; + case MO_32: + break; + case MO_16: + if (!dc_isar_feature(aa64_fp16, s)) { + return -1; + } + break; + default: + return -1; + } + return fp_access_check(s); +} + /* * Check that SVE access is enabled. If it is, return true. * If not, emit code to generate an appropriate exception and return false. @@ -5420,27 +5442,14 @@ static bool do_fp3_vector(DisasContext *s, arg_qrrr= _e *a, int data, gen_helper_gvec_3_ptr * const fns[3]) { MemOp esz =3D a->esz; + int check =3D fp_access_check_vector_hsd(s, a->q, esz); =20 - switch (esz) { - case MO_64: - if (!a->q) { - return false; - } - break; - case MO_32: - break; - case MO_16: - if (!dc_isar_feature(aa64_fp16, s)) { - return false; - } - break; - default: - return false; - } - if (fp_access_check(s)) { - gen_gvec_op3_fpst(s, a->q, a->rd, a->rn, a->rm, - esz =3D=3D MO_16, data, fns[esz - 1]); + if (check <=3D 0) { + return check =3D=3D 0; } + + gen_gvec_op3_fpst(s, a->q, a->rd, a->rn, a->rm, + esz =3D=3D MO_16, data, fns[esz - 1]); return true; } =20 @@ -5768,34 +5777,24 @@ TRANS_FEAT(FCADD_270, aa64_fcma, do_fp3_vector, a, = 1, f_vector_fcadd) =20 static bool trans_FCMLA_v(DisasContext *s, arg_FCMLA_v *a) { - gen_helper_gvec_4_ptr *fn; + static gen_helper_gvec_4_ptr * const fn[] =3D { + [MO_16] =3D gen_helper_gvec_fcmlah, + [MO_32] =3D gen_helper_gvec_fcmlas, + [MO_64] =3D gen_helper_gvec_fcmlad, + }; + int check; =20 if (!dc_isar_feature(aa64_fcma, s)) { return false; } - switch (a->esz) { - case MO_64: - if (!a->q) { - return false; - } - fn =3D gen_helper_gvec_fcmlad; - break; - case MO_32: - fn =3D gen_helper_gvec_fcmlas; - break; - case MO_16: - if (!dc_isar_feature(aa64_fp16, s)) { - return false; - } - fn =3D gen_helper_gvec_fcmlah; - break; - default: - return false; - } - if (fp_access_check(s)) { - gen_gvec_op4_fpst(s, a->q, a->rd, a->rn, a->rm, a->rd, - a->esz =3D=3D MO_16, a->rot, fn); + + check =3D fp_access_check_vector_hsd(s, a->q, a->esz); + if (check <=3D 0) { + return check =3D=3D 0; } + + gen_gvec_op4_fpst(s, a->q, a->rd, a->rn, a->rm, a->rd, + a->esz =3D=3D MO_16, a->rot, fn[a->esz]); return true; } =20 @@ -6337,27 +6336,14 @@ static bool do_fp3_vector_idx(DisasContext *s, arg_= qrrx_e *a, gen_helper_gvec_3_ptr * const fns[3]) { MemOp esz =3D a->esz; + int check =3D fp_access_check_vector_hsd(s, a->q, esz); =20 - switch (esz) { - case MO_64: - if (!a->q) { - return false; - } - break; - case MO_32: - break; - case MO_16: - if (!dc_isar_feature(aa64_fp16, s)) { - return false; - } - break; - default: - g_assert_not_reached(); - } - if (fp_access_check(s)) { - gen_gvec_op3_fpst(s, a->q, a->rd, a->rn, a->rm, - esz =3D=3D MO_16, a->idx, fns[esz - 1]); + if (check <=3D 0) { + return check =3D=3D 0; } + + gen_gvec_op3_fpst(s, a->q, a->rd, a->rn, a->rm, + esz =3D=3D MO_16, a->idx, fns[esz - 1]); return true; } =20 @@ -6383,28 +6369,15 @@ static bool do_fmla_vector_idx(DisasContext *s, arg= _qrrx_e *a, bool neg) gen_helper_gvec_fmla_idx_d, }; MemOp esz =3D a->esz; + int check =3D fp_access_check_vector_hsd(s, a->q, esz); =20 - switch (esz) { - case MO_64: - if (!a->q) { - return false; - } - break; - case MO_32: - break; - case MO_16: - if (!dc_isar_feature(aa64_fp16, s)) { - return false; - } - break; - default: - g_assert_not_reached(); - } - if (fp_access_check(s)) { - gen_gvec_op4_fpst(s, a->q, a->rd, a->rn, a->rm, a->rd, - esz =3D=3D MO_16, (a->idx << 1) | neg, - fns[esz - 1]); + if (check <=3D 0) { + return check =3D=3D 0; } + + gen_gvec_op4_fpst(s, a->q, a->rd, a->rn, a->rm, a->rd, + esz =3D=3D MO_16, (a->idx << 1) | neg, + fns[esz - 1]); return true; } =20 --=20 2.43.0