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From: Hendrik Brueckner <brueckner@linux.ibm.com>
To: qemu-devel@nongnu.org, qemu-s390x@nongnu.org, thuth@redhat.com
Cc: nsg@linux.ibm.com, frankja@linux.ibm.com, mimu@linux.ibm.com,
borntraeger@linux.ibm.com, Hendrik Brueckner <brueckner@linux.ibm.com>
Subject: [RFC PATCH v2 01/15] s390x/cpumodel: add msa10 subfunctions
Date: Fri, 6 Dec 2024 13:27:37 +0100
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MSA10 introduces new AES XTS subfunctions.
Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com>
Reviewed-by: Christian Borntraeger <borntraeger@linux.ibm.com>
---
target/s390x/cpu_features.c | 2 ++
target/s390x/cpu_features_def.h.inc | 6 ++++++
target/s390x/cpu_models.c | 4 ++++
target/s390x/gen-features.c | 20 ++++++++++++++++++++
4 files changed, 32 insertions(+)
diff --git a/target/s390x/cpu_features.c b/target/s390x/cpu_features.c
index cb4e2b8920..a3c239595a 100644
--- a/target/s390x/cpu_features.c
+++ b/target/s390x/cpu_features.c
@@ -252,6 +252,8 @@ static S390FeatGroupDef s390_feature_groups[] =3D {
FEAT_GROUP_INIT("msa8", MSA_EXT_8, "Message-security-assist-extension =
8 facility"),
FEAT_GROUP_INIT("msa9", MSA_EXT_9, "Message-security-assist-extension =
9 facility"),
FEAT_GROUP_INIT("msa9_pckmo", MSA_EXT_9_PCKMO, "Message-security-assis=
t-extension 9 PCKMO subfunctions"),
+ FEAT_GROUP_INIT("msa10", MSA_EXT_10, "Message-security-assist-extensio=
n 10 facility"),
+ FEAT_GROUP_INIT("msa10_pckmo", MSA_EXT_10_PCKMO, "Message-security-ass=
ist-extension 10 PCKMO subfunctions"),
FEAT_GROUP_INIT("mepochptff", MULTIPLE_EPOCH_PTFF, "PTFF enhancements =
introduced with Multiple-epoch facility"),
FEAT_GROUP_INIT("esort", ENH_SORT, "Enhanced-sort facility"),
FEAT_GROUP_INIT("deflate", DEFLATE_CONVERSION, "Deflate-conversion fac=
ility"),
diff --git a/target/s390x/cpu_features_def.h.inc b/target/s390x/cpu_feature=
s_def.h.inc
index c53ac13352..104d186c3f 100644
--- a/target/s390x/cpu_features_def.h.inc
+++ b/target/s390x/cpu_features_def.h.inc
@@ -233,6 +233,10 @@ DEF_FEAT(KM_XTS_AES_128, "km-xts-aes-128", KM, 50, "KM=
XTS-AES-128")
DEF_FEAT(KM_XTS_AES_256, "km-xts-aes-256", KM, 52, "KM XTS-AES-256")
DEF_FEAT(KM_XTS_EAES_128, "km-xts-eaes-128", KM, 58, "KM XTS-Encrypted-AES=
-128")
DEF_FEAT(KM_XTS_EAES_256, "km-xts-eaes-256", KM, 60, "KM XTS-Encrypted-AES=
-256")
+DEF_FEAT(KM_FULL_XTS_AES_128, "km-full-xts-aes-128", KM, 82, "KM Full-XTS-=
AES-128")
+DEF_FEAT(KM_FULL_XTS_AES_256, "km-full-xts-aes-256", KM, 84, "KM Full-XTS-=
AES-256")
+DEF_FEAT(KM_FULL_XTS_EAES_128, "km-full-xts-eaes-128", KM, 90, "KM Full-XT=
S-Encrypted-AES-128")
+DEF_FEAT(KM_FULL_XTS_EAES_256, "km-full-xts-eaes-256", KM, 92, "KM Full-XT=
S-Encrypted-AES-256")
=20
/* Features exposed via the KIMD instruction. */
DEF_FEAT(KIMD_SHA_1, "kimd-sha-1", KIMD, 1, "KIMD SHA-1")
@@ -264,6 +268,8 @@ DEF_FEAT(PCKMO_ETDEA_256, "pckmo-etdea-192", PCKMO, 3, =
"PCKMO Encrypted-TDEA-192
DEF_FEAT(PCKMO_AES_128, "pckmo-aes-128", PCKMO, 18, "PCKMO Encrypted-AES-1=
28-Key")
DEF_FEAT(PCKMO_AES_192, "pckmo-aes-192", PCKMO, 19, "PCKMO Encrypted-AES-1=
92-Key")
DEF_FEAT(PCKMO_AES_256, "pckmo-aes-256", PCKMO, 20, "PCKMO Encrypted-AES-2=
56-Key")
+DEF_FEAT(PCKMO_AES_XTS_128_DK, "pckmo-aes-xts-128-dk", PCKMO, 21, "PCKMO E=
ncrypt-AES-XTS-128-Double-Key")
+DEF_FEAT(PCKMO_AES_XTS_256_DK, "pckmo-aes-xts-256-dk", PCKMO, 22, "PCKMO E=
ncrypt-AES-XTS-256-Double-Key")
DEF_FEAT(PCKMO_ECC_P256, "pckmo-ecc-p256", PCKMO, 32, "PCKMO Encrypt-ECC-P=
256-Key")
DEF_FEAT(PCKMO_ECC_P384, "pckmo-ecc-p384", PCKMO, 33, "PCKMO Encrypt-ECC-P=
384-Key")
DEF_FEAT(PCKMO_ECC_P521, "pckmo-ecc-p521", PCKMO, 34, "PCKMO Encrypt-ECC-P=
521-Key")
diff --git a/target/s390x/cpu_models.c b/target/s390x/cpu_models.c
index a27f4b6f79..3eb8276aee 100644
--- a/target/s390x/cpu_models.c
+++ b/target/s390x/cpu_models.c
@@ -477,6 +477,10 @@ static void check_consistency(const S390CPUModel *mode=
l)
{ S390_FEAT_KLMD_SHA3_512, S390_FEAT_MSA },
{ S390_FEAT_KLMD_SHAKE_128, S390_FEAT_MSA },
{ S390_FEAT_KLMD_SHAKE_256, S390_FEAT_MSA },
+ { S390_FEAT_KM_FULL_XTS_AES_128, S390_FEAT_MSA_EXT_4 },
+ { S390_FEAT_KM_FULL_XTS_AES_256, S390_FEAT_MSA_EXT_4 },
+ { S390_FEAT_KM_FULL_XTS_EAES_128, S390_FEAT_MSA_EXT_4 },
+ { S390_FEAT_KM_FULL_XTS_EAES_256, S390_FEAT_MSA_EXT_4 },
{ S390_FEAT_PRNO_TRNG_QRTCR, S390_FEAT_MSA_EXT_5 },
{ S390_FEAT_PRNO_TRNG, S390_FEAT_MSA_EXT_5 },
{ S390_FEAT_SIE_KSS, S390_FEAT_SIE_F2 },
diff --git a/target/s390x/gen-features.c b/target/s390x/gen-features.c
index 2b2bfc3736..06c3bf64f3 100644
--- a/target/s390x/gen-features.c
+++ b/target/s390x/gen-features.c
@@ -246,6 +246,16 @@
S390_FEAT_PCKMO_ECC_ED25519, \
S390_FEAT_PCKMO_ECC_ED448
=20
+#define S390_FEAT_GROUP_MSA_EXT_10 \
+ S390_FEAT_KM_FULL_XTS_AES_128, \
+ S390_FEAT_KM_FULL_XTS_AES_256, \
+ S390_FEAT_KM_FULL_XTS_EAES_128, \
+ S390_FEAT_KM_FULL_XTS_EAES_256
+
+#define S390_FEAT_GROUP_MSA_EXT_10_PCKMO \
+ S390_FEAT_PCKMO_AES_XTS_128_DK, \
+ S390_FEAT_PCKMO_AES_XTS_256_DK
+
#define S390_FEAT_GROUP_ENH_SORT \
S390_FEAT_ESORT_BASE, \
S390_FEAT_SORTL_SFLR, \
@@ -307,10 +317,18 @@ static uint16_t group_MSA_EXT_9[] =3D {
S390_FEAT_GROUP_MSA_EXT_9,
};
=20
+static uint16_t group_MSA_EXT_10[] =3D {
+ S390_FEAT_GROUP_MSA_EXT_10,
+};
+
static uint16_t group_MSA_EXT_9_PCKMO[] =3D {
S390_FEAT_GROUP_MSA_EXT_9_PCKMO,
};
=20
+static uint16_t group_MSA_EXT_10_PCKMO[] =3D {
+ S390_FEAT_GROUP_MSA_EXT_10_PCKMO,
+};
+
static uint16_t group_ENH_SORT[] =3D {
S390_FEAT_GROUP_ENH_SORT,
};
@@ -858,6 +876,8 @@ static FeatGroupDefSpec FeatGroupDef[] =3D {
FEAT_GROUP_INITIALIZER(MSA_EXT_8),
FEAT_GROUP_INITIALIZER(MSA_EXT_9),
FEAT_GROUP_INITIALIZER(MSA_EXT_9_PCKMO),
+ FEAT_GROUP_INITIALIZER(MSA_EXT_10),
+ FEAT_GROUP_INITIALIZER(MSA_EXT_10_PCKMO),
FEAT_GROUP_INITIALIZER(MULTIPLE_EPOCH_PTFF),
FEAT_GROUP_INITIALIZER(ENH_SORT),
FEAT_GROUP_INITIALIZER(DEFLATE_CONVERSION),
--=20
2.43.5
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From: Hendrik Brueckner <brueckner@linux.ibm.com>
To: qemu-devel@nongnu.org, qemu-s390x@nongnu.org, thuth@redhat.com
Cc: nsg@linux.ibm.com, frankja@linux.ibm.com, mimu@linux.ibm.com,
borntraeger@linux.ibm.com, Hendrik Brueckner <brueckner@linux.ibm.com>
Subject: [RFC PATCH v2 02/15] s390x/cpumodel: add msa11 subfunctions
Date: Fri, 6 Dec 2024 13:27:38 +0100
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MSA11 introduces new HMAC subfunctions.
Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com>
Reviewed-by: Christian Borntraeger <borntraeger@linux.ibm.com>
---
target/s390x/cpu_features.c | 2 ++
target/s390x/cpu_features_def.h.inc | 10 ++++++++++
target/s390x/cpu_models.c | 8 ++++++++
target/s390x/gen-features.c | 24 ++++++++++++++++++++++++
4 files changed, 44 insertions(+)
diff --git a/target/s390x/cpu_features.c b/target/s390x/cpu_features.c
index a3c239595a..36930feccd 100644
--- a/target/s390x/cpu_features.c
+++ b/target/s390x/cpu_features.c
@@ -254,6 +254,8 @@ static S390FeatGroupDef s390_feature_groups[] =3D {
FEAT_GROUP_INIT("msa9_pckmo", MSA_EXT_9_PCKMO, "Message-security-assis=
t-extension 9 PCKMO subfunctions"),
FEAT_GROUP_INIT("msa10", MSA_EXT_10, "Message-security-assist-extensio=
n 10 facility"),
FEAT_GROUP_INIT("msa10_pckmo", MSA_EXT_10_PCKMO, "Message-security-ass=
ist-extension 10 PCKMO subfunctions"),
+ FEAT_GROUP_INIT("msa11", MSA_EXT_11, "Message-security-assist-extensio=
n 11 facility"),
+ FEAT_GROUP_INIT("msa11_pckmo", MSA_EXT_11_PCKMO, "Message-security-ass=
ist-extension 11 PCKMO subfunctions"),
FEAT_GROUP_INIT("mepochptff", MULTIPLE_EPOCH_PTFF, "PTFF enhancements =
introduced with Multiple-epoch facility"),
FEAT_GROUP_INIT("esort", ENH_SORT, "Enhanced-sort facility"),
FEAT_GROUP_INIT("deflate", DEFLATE_CONVERSION, "Deflate-conversion fac=
ility"),
diff --git a/target/s390x/cpu_features_def.h.inc b/target/s390x/cpu_feature=
s_def.h.inc
index 104d186c3f..15ea51fc54 100644
--- a/target/s390x/cpu_features_def.h.inc
+++ b/target/s390x/cpu_features_def.h.inc
@@ -200,6 +200,14 @@ DEF_FEAT(KMAC_AES_256, "kmac-aes-256", KMAC, 20, "KMAC=
AES-256")
DEF_FEAT(KMAC_EAES_128, "kmac-eaes-128", KMAC, 26, "KMAC Encrypted-AES-128=
")
DEF_FEAT(KMAC_EAES_192, "kmac-eaes-192", KMAC, 27, "KMAC Encrypted-AES-192=
")
DEF_FEAT(KMAC_EAES_256, "kmac-eaes-256", KMAC, 28, "KMAC Encrypted-AES-256=
")
+DEF_FEAT(KMAC_HMAC_SHA_224, "kmac-hmac-sha-224", KMAC, 112, "KMAC HMAC-SHA=
-224")
+DEF_FEAT(KMAC_HMAC_SHA_256, "kmac-hmac-sha-246", KMAC, 113, "KMAC HMAC-SHA=
-256")
+DEF_FEAT(KMAC_HMAC_SHA_384, "kmac-hmac-sha-384", KMAC, 114, "KMAC HMAC-SHA=
-384")
+DEF_FEAT(KMAC_HMAC_SHA_512, "kmac-hmac-sha-512", KMAC, 115, "KMAC HMAC-SHA=
-512")
+DEF_FEAT(KMAC_HMAC_ESHA_224, "kmac-hmac-esha-224", KMAC, 120, "KMAC HMAC-E=
ncrypted-SHA-224")
+DEF_FEAT(KMAC_HMAC_ESHA_256, "kmac-hmac-esha-246", KMAC, 121, "KMAC HMAC-E=
ncrypted-SHA-256")
+DEF_FEAT(KMAC_HMAC_ESHA_384, "kmac-hmac-esha-384", KMAC, 122, "KMAC HMAC-E=
ncrypted-SHA-384")
+DEF_FEAT(KMAC_HMAC_ESHA_512, "kmac-hmac-esha-512", KMAC, 123, "KMAC HMAC-E=
ncrypted-SHA-512")
=20
/* Features exposed via the KMC instruction. */
DEF_FEAT(KMC_DEA, "kmc-dea", KMC, 1, "KMC DEA")
@@ -275,6 +283,8 @@ DEF_FEAT(PCKMO_ECC_P384, "pckmo-ecc-p384", PCKMO, 33, "=
PCKMO Encrypt-ECC-P384-Ke
DEF_FEAT(PCKMO_ECC_P521, "pckmo-ecc-p521", PCKMO, 34, "PCKMO Encrypt-ECC-P=
521-Key")
DEF_FEAT(PCKMO_ECC_ED25519, "pckmo-ecc-ed25519", PCKMO, 40 , "PCKMO Encryp=
t-ECC-Ed25519-Key")
DEF_FEAT(PCKMO_ECC_ED448, "pckmo-ecc-ed448", PCKMO, 41 , "PCKMO Encrypt-EC=
C-Ed448-Key")
+DEF_FEAT(PCKMO_HMAC_512, "pckmo-hmac-512", PCKMO, 118, "PCKMO Encrypt-HMAC=
-512-Key")
+DEF_FEAT(PCKMO_HMAC_1024, "pckmo-hmac-1024", PCKMO, 122, "PCKMO Encrypt-HM=
AC-1024-Key")
=20
/* Features exposed via the KMCTR instruction. */
DEF_FEAT(KMCTR_DEA, "kmctr-dea", KMCTR, 1, "KMCTR DEA")
diff --git a/target/s390x/cpu_models.c b/target/s390x/cpu_models.c
index 3eb8276aee..a62a3c3771 100644
--- a/target/s390x/cpu_models.c
+++ b/target/s390x/cpu_models.c
@@ -477,6 +477,14 @@ static void check_consistency(const S390CPUModel *mode=
l)
{ S390_FEAT_KLMD_SHA3_512, S390_FEAT_MSA },
{ S390_FEAT_KLMD_SHAKE_128, S390_FEAT_MSA },
{ S390_FEAT_KLMD_SHAKE_256, S390_FEAT_MSA },
+ { S390_FEAT_KMAC_HMAC_SHA_224, S390_FEAT_MSA_EXT_3 },
+ { S390_FEAT_KMAC_HMAC_SHA_256, S390_FEAT_MSA_EXT_3 },
+ { S390_FEAT_KMAC_HMAC_SHA_384, S390_FEAT_MSA_EXT_3 },
+ { S390_FEAT_KMAC_HMAC_SHA_512, S390_FEAT_MSA_EXT_3 },
+ { S390_FEAT_KMAC_HMAC_ESHA_224, S390_FEAT_MSA_EXT_3 },
+ { S390_FEAT_KMAC_HMAC_ESHA_256, S390_FEAT_MSA_EXT_3 },
+ { S390_FEAT_KMAC_HMAC_ESHA_384, S390_FEAT_MSA_EXT_3 },
+ { S390_FEAT_KMAC_HMAC_ESHA_512, S390_FEAT_MSA_EXT_3 },
{ S390_FEAT_KM_FULL_XTS_AES_128, S390_FEAT_MSA_EXT_4 },
{ S390_FEAT_KM_FULL_XTS_AES_256, S390_FEAT_MSA_EXT_4 },
{ S390_FEAT_KM_FULL_XTS_EAES_128, S390_FEAT_MSA_EXT_4 },
diff --git a/target/s390x/gen-features.c b/target/s390x/gen-features.c
index 06c3bf64f3..d6305f945a 100644
--- a/target/s390x/gen-features.c
+++ b/target/s390x/gen-features.c
@@ -256,6 +256,20 @@
S390_FEAT_PCKMO_AES_XTS_128_DK, \
S390_FEAT_PCKMO_AES_XTS_256_DK
=20
+#define S390_FEAT_GROUP_MSA_EXT_11 \
+ S390_FEAT_KMAC_HMAC_SHA_224, \
+ S390_FEAT_KMAC_HMAC_SHA_256, \
+ S390_FEAT_KMAC_HMAC_SHA_384, \
+ S390_FEAT_KMAC_HMAC_SHA_512, \
+ S390_FEAT_KMAC_HMAC_ESHA_224, \
+ S390_FEAT_KMAC_HMAC_ESHA_256, \
+ S390_FEAT_KMAC_HMAC_ESHA_384, \
+ S390_FEAT_KMAC_HMAC_ESHA_512
+
+#define S390_FEAT_GROUP_MSA_EXT_11_PCKMO \
+ S390_FEAT_PCKMO_HMAC_512, \
+ S390_FEAT_PCKMO_HMAC_1024
+
#define S390_FEAT_GROUP_ENH_SORT \
S390_FEAT_ESORT_BASE, \
S390_FEAT_SORTL_SFLR, \
@@ -321,6 +335,10 @@ static uint16_t group_MSA_EXT_10[] =3D {
S390_FEAT_GROUP_MSA_EXT_10,
};
=20
+static uint16_t group_MSA_EXT_11[] =3D {
+ S390_FEAT_GROUP_MSA_EXT_11,
+};
+
static uint16_t group_MSA_EXT_9_PCKMO[] =3D {
S390_FEAT_GROUP_MSA_EXT_9_PCKMO,
};
@@ -329,6 +347,10 @@ static uint16_t group_MSA_EXT_10_PCKMO[] =3D {
S390_FEAT_GROUP_MSA_EXT_10_PCKMO,
};
=20
+static uint16_t group_MSA_EXT_11_PCKMO[] =3D {
+ S390_FEAT_GROUP_MSA_EXT_11_PCKMO,
+};
+
static uint16_t group_ENH_SORT[] =3D {
S390_FEAT_GROUP_ENH_SORT,
};
@@ -878,6 +900,8 @@ static FeatGroupDefSpec FeatGroupDef[] =3D {
FEAT_GROUP_INITIALIZER(MSA_EXT_9_PCKMO),
FEAT_GROUP_INITIALIZER(MSA_EXT_10),
FEAT_GROUP_INITIALIZER(MSA_EXT_10_PCKMO),
+ FEAT_GROUP_INITIALIZER(MSA_EXT_11),
+ FEAT_GROUP_INITIALIZER(MSA_EXT_11_PCKMO),
FEAT_GROUP_INITIALIZER(MULTIPLE_EPOCH_PTFF),
FEAT_GROUP_INITIALIZER(ENH_SORT),
FEAT_GROUP_INITIALIZER(DEFLATE_CONVERSION),
--=20
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From: Hendrik Brueckner <brueckner@linux.ibm.com>
To: qemu-devel@nongnu.org, qemu-s390x@nongnu.org, thuth@redhat.com
Cc: nsg@linux.ibm.com, frankja@linux.ibm.com, mimu@linux.ibm.com,
borntraeger@linux.ibm.com, Hendrik Brueckner <brueckner@linux.ibm.com>
Subject: [RFC PATCH v2 03/15] s390x/cpumodel: add msa12 changes
Date: Fri, 6 Dec 2024 13:27:39 +0100
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MSA12 changes the KIMD/KLMD instruction format for SHA3/SHAKE.
Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com>
Reviewed-by: Christian Borntraeger <borntraeger@linux.ibm.com>
---
target/s390x/cpu_features.c | 1 +
target/s390x/cpu_features_def.h.inc | 1 +
target/s390x/gen-features.c | 8 ++++++++
3 files changed, 10 insertions(+)
diff --git a/target/s390x/cpu_features.c b/target/s390x/cpu_features.c
index 36930feccd..0e0b37ab95 100644
--- a/target/s390x/cpu_features.c
+++ b/target/s390x/cpu_features.c
@@ -256,6 +256,7 @@ static S390FeatGroupDef s390_feature_groups[] =3D {
FEAT_GROUP_INIT("msa10_pckmo", MSA_EXT_10_PCKMO, "Message-security-ass=
ist-extension 10 PCKMO subfunctions"),
FEAT_GROUP_INIT("msa11", MSA_EXT_11, "Message-security-assist-extensio=
n 11 facility"),
FEAT_GROUP_INIT("msa11_pckmo", MSA_EXT_11_PCKMO, "Message-security-ass=
ist-extension 11 PCKMO subfunctions"),
+ FEAT_GROUP_INIT("msa12", MSA_EXT_12, "Message-security-assist-extensio=
n 12 facility"),
FEAT_GROUP_INIT("mepochptff", MULTIPLE_EPOCH_PTFF, "PTFF enhancements =
introduced with Multiple-epoch facility"),
FEAT_GROUP_INIT("esort", ENH_SORT, "Enhanced-sort facility"),
FEAT_GROUP_INIT("deflate", DEFLATE_CONVERSION, "Deflate-conversion fac=
ility"),
diff --git a/target/s390x/cpu_features_def.h.inc b/target/s390x/cpu_feature=
s_def.h.inc
index 15ea51fc54..2e5dc96984 100644
--- a/target/s390x/cpu_features_def.h.inc
+++ b/target/s390x/cpu_features_def.h.inc
@@ -90,6 +90,7 @@ DEF_FEAT(EDAT_2, "edat2", STFL, 78, "Enhanced-DAT facilit=
y 2")
DEF_FEAT(DFP_PACKED_CONVERSION, "dfppc", STFL, 80, "Decimal-floating-point=
packed-conversion facility")
DEF_FEAT(PPA15, "ppa15", STFL, 81, "PPA15 is installed")
DEF_FEAT(BPB, "bpb", STFL, 82, "Branch prediction blocking")
+DEF_FEAT(MSA_EXT_12, "msa12-base", STFL, 86, "Message-security-assist-exte=
nsion-12 facility (excluding subfunctions)")
DEF_FEAT(VECTOR, "vx", STFL, 129, "Vector facility")
DEF_FEAT(INSTRUCTION_EXEC_PROT, "iep", STFL, 130, "Instruction-execution-p=
rotection facility")
DEF_FEAT(SIDE_EFFECT_ACCESS_ESOP2, "sea_esop2", STFL, 131, "Side-effect-ac=
cess facility and Enhanced-suppression-on-protection facility 2")
diff --git a/target/s390x/gen-features.c b/target/s390x/gen-features.c
index d6305f945a..ab9ad51d5e 100644
--- a/target/s390x/gen-features.c
+++ b/target/s390x/gen-features.c
@@ -270,6 +270,9 @@
S390_FEAT_PCKMO_HMAC_512, \
S390_FEAT_PCKMO_HMAC_1024
=20
+#define S390_FEAT_GROUP_MSA_EXT_12 \
+ S390_FEAT_MSA_EXT_12
+
#define S390_FEAT_GROUP_ENH_SORT \
S390_FEAT_ESORT_BASE, \
S390_FEAT_SORTL_SFLR, \
@@ -339,6 +342,10 @@ static uint16_t group_MSA_EXT_11[] =3D {
S390_FEAT_GROUP_MSA_EXT_11,
};
=20
+static uint16_t group_MSA_EXT_12[] =3D {
+ S390_FEAT_GROUP_MSA_EXT_12,
+};
+
static uint16_t group_MSA_EXT_9_PCKMO[] =3D {
S390_FEAT_GROUP_MSA_EXT_9_PCKMO,
};
@@ -902,6 +909,7 @@ static FeatGroupDefSpec FeatGroupDef[] =3D {
FEAT_GROUP_INITIALIZER(MSA_EXT_10_PCKMO),
FEAT_GROUP_INITIALIZER(MSA_EXT_11),
FEAT_GROUP_INITIALIZER(MSA_EXT_11_PCKMO),
+ FEAT_GROUP_INITIALIZER(MSA_EXT_12),
FEAT_GROUP_INITIALIZER(MULTIPLE_EPOCH_PTFF),
FEAT_GROUP_INITIALIZER(ENH_SORT),
FEAT_GROUP_INITIALIZER(DEFLATE_CONVERSION),
--=20
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From: Hendrik Brueckner <brueckner@linux.ibm.com>
To: qemu-devel@nongnu.org, qemu-s390x@nongnu.org, thuth@redhat.com
Cc: nsg@linux.ibm.com, frankja@linux.ibm.com, mimu@linux.ibm.com,
borntraeger@linux.ibm.com, Hendrik Brueckner <brueckner@linux.ibm.com>
Subject: [RFC PATCH v2 04/15] s390x/cpumodel: add msa13 subfunctions
Date: Fri, 6 Dec 2024 13:27:40 +0100
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MSA13 introduces query authentication information (QAI) subfunctions.
Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com>
Reviewed-by: Janosch Frank <frankja@linux.ibm.com>
---
target/s390x/cpu_features.c | 2 ++
target/s390x/cpu_features_def.h.inc | 12 ++++++++++++
target/s390x/gen-features.c | 26 ++++++++++++++++++++++++++
3 files changed, 40 insertions(+)
diff --git a/target/s390x/cpu_features.c b/target/s390x/cpu_features.c
index 0e0b37ab95..9ba127e386 100644
--- a/target/s390x/cpu_features.c
+++ b/target/s390x/cpu_features.c
@@ -257,6 +257,8 @@ static S390FeatGroupDef s390_feature_groups[] =3D {
FEAT_GROUP_INIT("msa11", MSA_EXT_11, "Message-security-assist-extensio=
n 11 facility"),
FEAT_GROUP_INIT("msa11_pckmo", MSA_EXT_11_PCKMO, "Message-security-ass=
ist-extension 11 PCKMO subfunctions"),
FEAT_GROUP_INIT("msa12", MSA_EXT_12, "Message-security-assist-extensio=
n 12 facility"),
+ FEAT_GROUP_INIT("msa13", MSA_EXT_13, "Message-security-assist-extensio=
n 13 facility"),
+ FEAT_GROUP_INIT("msa13_pckmo", MSA_EXT_13_PCKMO, "Message-security-ass=
ist-extension 13 PCKMO subfunctions"),
FEAT_GROUP_INIT("mepochptff", MULTIPLE_EPOCH_PTFF, "PTFF enhancements =
introduced with Multiple-epoch facility"),
FEAT_GROUP_INIT("esort", ENH_SORT, "Enhanced-sort facility"),
FEAT_GROUP_INIT("deflate", DEFLATE_CONVERSION, "Deflate-conversion fac=
ility"),
diff --git a/target/s390x/cpu_features_def.h.inc b/target/s390x/cpu_feature=
s_def.h.inc
index 2e5dc96984..2132837ffe 100644
--- a/target/s390x/cpu_features_def.h.inc
+++ b/target/s390x/cpu_features_def.h.inc
@@ -209,6 +209,7 @@ DEF_FEAT(KMAC_HMAC_ESHA_224, "kmac-hmac-esha-224", KMAC=
, 120, "KMAC HMAC-Encrypt
DEF_FEAT(KMAC_HMAC_ESHA_256, "kmac-hmac-esha-246", KMAC, 121, "KMAC HMAC-E=
ncrypted-SHA-256")
DEF_FEAT(KMAC_HMAC_ESHA_384, "kmac-hmac-esha-384", KMAC, 122, "KMAC HMAC-E=
ncrypted-SHA-384")
DEF_FEAT(KMAC_HMAC_ESHA_512, "kmac-hmac-esha-512", KMAC, 123, "KMAC HMAC-E=
ncrypted-SHA-512")
+DEF_FEAT(KMAC_QAI, "kmac-qai", KMAC, 127, "KMAC Query-Authentication-Infor=
mation")
=20
/* Features exposed via the KMC instruction. */
DEF_FEAT(KMC_DEA, "kmc-dea", KMC, 1, "KMC DEA")
@@ -246,6 +247,7 @@ DEF_FEAT(KM_FULL_XTS_AES_128, "km-full-xts-aes-128", KM=
, 82, "KM Full-XTS-AES-12
DEF_FEAT(KM_FULL_XTS_AES_256, "km-full-xts-aes-256", KM, 84, "KM Full-XTS-=
AES-256")
DEF_FEAT(KM_FULL_XTS_EAES_128, "km-full-xts-eaes-128", KM, 90, "KM Full-XT=
S-Encrypted-AES-128")
DEF_FEAT(KM_FULL_XTS_EAES_256, "km-full-xts-eaes-256", KM, 92, "KM Full-XT=
S-Encrypted-AES-256")
+DEF_FEAT(KM_QAI, "km-qai", KM, 127, "KM Query-Authentication-Information")
=20
/* Features exposed via the KIMD instruction. */
DEF_FEAT(KIMD_SHA_1, "kimd-sha-1", KIMD, 1, "KIMD SHA-1")
@@ -258,6 +260,7 @@ DEF_FEAT(KIMD_SHA3_512, "kimd-sha3-512", KIMD, 35, "KIM=
D SHA3-512")
DEF_FEAT(KIMD_SHAKE_128, "kimd-shake-128", KIMD, 36, "KIMD SHAKE-128")
DEF_FEAT(KIMD_SHAKE_256, "kimd-shake-256", KIMD, 37, "KIMD SHAKE-256")
DEF_FEAT(KIMD_GHASH, "kimd-ghash", KIMD, 65, "KIMD GHASH")
+DEF_FEAT(KIMD_QAI, "kimd-qai", KIMD, 127, "KIMD Query-Authentication-Infor=
mation")
=20
/* Features exposed via the KLMD instruction. */
DEF_FEAT(KLMD_SHA_1, "klmd-sha-1", KLMD, 1, "KLMD SHA-1")
@@ -269,6 +272,7 @@ DEF_FEAT(KLMD_SHA3_384, "klmd-sha3-384", KLMD, 34, "KLM=
D SHA3-384")
DEF_FEAT(KLMD_SHA3_512, "klmd-sha3-512", KLMD, 35, "KLMD SHA3-512")
DEF_FEAT(KLMD_SHAKE_128, "klmd-shake-128", KLMD, 36, "KLMD SHAKE-128")
DEF_FEAT(KLMD_SHAKE_256, "klmd-shake-256", KLMD, 37, "KLMD SHAKE-256")
+DEF_FEAT(KLMD_QAI, "klmd-qai", KLMD, 127, "KLMD Query-Authentication-Infor=
mation")
=20
/* Features exposed via the PCKMO instruction. */
DEF_FEAT(PCKMO_EDEA, "pckmo-edea", PCKMO, 1, "PCKMO Encrypted-DEA-Key")
@@ -286,6 +290,7 @@ DEF_FEAT(PCKMO_ECC_ED25519, "pckmo-ecc-ed25519", PCKMO,=
40 , "PCKMO Encrypt-ECC-
DEF_FEAT(PCKMO_ECC_ED448, "pckmo-ecc-ed448", PCKMO, 41 , "PCKMO Encrypt-EC=
C-Ed448-Key")
DEF_FEAT(PCKMO_HMAC_512, "pckmo-hmac-512", PCKMO, 118, "PCKMO Encrypt-HMAC=
-512-Key")
DEF_FEAT(PCKMO_HMAC_1024, "pckmo-hmac-1024", PCKMO, 122, "PCKMO Encrypt-HM=
AC-1024-Key")
+DEF_FEAT(PCKMO_QAI, "pckmo-qai", PCKMO, 127, "PCKMO Query-Authentication-I=
nformation")
=20
/* Features exposed via the KMCTR instruction. */
DEF_FEAT(KMCTR_DEA, "kmctr-dea", KMCTR, 1, "KMCTR DEA")
@@ -300,6 +305,7 @@ DEF_FEAT(KMCTR_AES_256, "kmctr-aes-256", KMCTR, 20, "KM=
CTR AES-256")
DEF_FEAT(KMCTR_EAES_128, "kmctr-eaes-128", KMCTR, 26, "KMCTR Encrypted-AES=
-128")
DEF_FEAT(KMCTR_EAES_192, "kmctr-eaes-192", KMCTR, 27, "KMCTR Encrypted-AES=
-192")
DEF_FEAT(KMCTR_EAES_256, "kmctr-eaes-256", KMCTR, 28, "KMCTR Encrypted-AES=
-256")
+DEF_FEAT(KMCTR_QAI, "kmctr-qai", KMCTR, 127, "KMCTR Query-Authentication-I=
nformation")
=20
/* Features exposed via the KMF instruction. */
DEF_FEAT(KMF_DEA, "kmf-dea", KMF, 1, "KMF DEA")
@@ -314,6 +320,7 @@ DEF_FEAT(KMF_AES_256, "kmf-aes-256", KMF, 20, "KMF AES-=
256")
DEF_FEAT(KMF_EAES_128, "kmf-eaes-128", KMF, 26, "KMF Encrypted-AES-128")
DEF_FEAT(KMF_EAES_192, "kmf-eaes-192", KMF, 27, "KMF Encrypted-AES-192")
DEF_FEAT(KMF_EAES_256, "kmf-eaes-256", KMF, 28, "KMF Encrypted-AES-256")
+DEF_FEAT(KMF_QAI, "kmf-qai", KMF, 127, "KMF Query-Authentication-Informati=
on")
=20
/* Features exposed via the KMO instruction. */
DEF_FEAT(KMO_DEA, "kmo-dea", KMO, 1, "KMO DEA")
@@ -328,6 +335,7 @@ DEF_FEAT(KMO_AES_256, "kmo-aes-256", KMO, 20, "KMO AES-=
256")
DEF_FEAT(KMO_EAES_128, "kmo-eaes-128", KMO, 26, "KMO Encrypted-AES-128")
DEF_FEAT(KMO_EAES_192, "kmo-eaes-192", KMO, 27, "KMO Encrypted-AES-192")
DEF_FEAT(KMO_EAES_256, "kmo-eaes-256", KMO, 28, "KMO Encrypted-AES-256")
+DEF_FEAT(KMO_QAI, "kmo-qai", KMO, 127, "KMO Query-Authentication-Informati=
on")
=20
/* Features exposed via the PCC instruction. */
DEF_FEAT(PCC_CMAC_DEA, "pcc-cmac-dea", PCC, 1, "PCC Compute-Last-Block-CMA=
C-Using-DEA")
@@ -353,11 +361,13 @@ DEF_FEAT(PCC_SCALAR_MULT_ED25519, "pcc-scalar-mult-ed=
25519", PCC, 72, "PCC Scala
DEF_FEAT(PCC_SCALAR_MULT_ED448, "pcc-scalar-mult-ed448", PCC, 73, "PCC Sca=
lar-Multiply-Ed448")
DEF_FEAT(PCC_SCALAR_MULT_X25519, "pcc-scalar-mult-x25519", PCC, 80, "PCC S=
calar-Multiply-X25519")
DEF_FEAT(PCC_SCALAR_MULT_X448, "pcc-scalar-mult-x448", PCC, 81, "PCC Scala=
r-Multiply-X448")
+DEF_FEAT(PCC_QAI, "pcc-qai", PCC, 127, "PCC Query-Authentication-Informati=
on")
=20
/* Features exposed via the PPNO/PRNO instruction. */
DEF_FEAT(PPNO_SHA_512_DRNG, "ppno-sha-512-drng", PPNO, 3, "PPNO SHA-512-DR=
NG")
DEF_FEAT(PRNO_TRNG_QRTCR, "prno-trng-qrtcr", PPNO, 112, "PRNO TRNG-Query-R=
aw-to-Conditioned-Ratio")
DEF_FEAT(PRNO_TRNG, "prno-trng", PPNO, 114, "PRNO TRNG")
+DEF_FEAT(PRNO_QAI, "prno-qai", PPNO, 127, "PRNO Query-Authentication-Infor=
mation")
=20
/* Features exposed via the KMA instruction. */
DEF_FEAT(KMA_GCM_AES_128, "kma-gcm-aes-128", KMA, 18, "KMA GCM-AES-128")
@@ -366,6 +376,7 @@ DEF_FEAT(KMA_GCM_AES_256, "kma-gcm-aes-256", KMA, 20, "=
KMA GCM-AES-256")
DEF_FEAT(KMA_GCM_EAES_128, "kma-gcm-eaes-128", KMA, 26, "KMA GCM-Encrypted=
-AES-128")
DEF_FEAT(KMA_GCM_EAES_192, "kma-gcm-eaes-192", KMA, 27, "KMA GCM-Encrypted=
-AES-192")
DEF_FEAT(KMA_GCM_EAES_256, "kma-gcm-eaes-256", KMA, 28, "KMA GCM-Encrypted=
-AES-256")
+DEF_FEAT(KMA_QAI, "kma-qai", KMA, 127, "KMA Query-Authentication-Informati=
on")
=20
/* Features exposed via the KDSA instruction. */
DEF_FEAT(KDSA_ECDSA_VERIFY_P256, "kdsa-ecdsa-verify-p256", KDSA, 1, "KDSA =
ECDSA-Verify-P256")
@@ -383,6 +394,7 @@ DEF_FEAT(KDSA_EDDSA_SIGN_ED25519, "kdsa-eddsa-sign-ed25=
519", KDSA, 40, "KDSA EdD
DEF_FEAT(KDSA_EDDSA_SIGN_ED448, "kdsa-eddsa-sign-ed448", KDSA, 44, "KDSA E=
dDSA-Sign-Ed448")
DEF_FEAT(KDSA_EEDDSA_SIGN_ED25519, "kdsa-eeddsa-sign-ed25519", KDSA, 48, "=
KDSA Encrypted-EdDSA-Sign-Ed25519")
DEF_FEAT(KDSA_EEDDSA_SIGN_ED448, "kdsa-eeddsa-sign-ed448", KDSA, 52, "KDSA=
Encrypted-EdDSA-Sign-Ed448")
+DEF_FEAT(KDSA_QAI, "kdsa-qai", KDSA, 127, "KDSA Query-Authentication-Infor=
mation")
=20
/* Features exposed via the SORTL instruction. */
DEF_FEAT(SORTL_SFLR, "sortl-sflr", SORTL, 1, "SORTL SFLR")
diff --git a/target/s390x/gen-features.c b/target/s390x/gen-features.c
index ab9ad51d5e..3326e7df43 100644
--- a/target/s390x/gen-features.c
+++ b/target/s390x/gen-features.c
@@ -273,6 +273,22 @@
#define S390_FEAT_GROUP_MSA_EXT_12 \
S390_FEAT_MSA_EXT_12
=20
+#define S390_FEAT_GROUP_MSA_EXT_13 \
+ S390_FEAT_KDSA_QAI, \
+ S390_FEAT_KIMD_QAI, \
+ S390_FEAT_KLMD_QAI, \
+ S390_FEAT_KMAC_QAI, \
+ S390_FEAT_KMA_QAI, \
+ S390_FEAT_KMCTR_QAI, \
+ S390_FEAT_KMF_QAI, \
+ S390_FEAT_KMO_QAI, \
+ S390_FEAT_KM_QAI, \
+ S390_FEAT_PCC_QAI, \
+ S390_FEAT_PRNO_QAI
+
+#define S390_FEAT_GROUP_MSA_EXT_13_PCKMO \
+ S390_FEAT_PCKMO_QAI
+
#define S390_FEAT_GROUP_ENH_SORT \
S390_FEAT_ESORT_BASE, \
S390_FEAT_SORTL_SFLR, \
@@ -346,6 +362,10 @@ static uint16_t group_MSA_EXT_12[] =3D {
S390_FEAT_GROUP_MSA_EXT_12,
};
=20
+static uint16_t group_MSA_EXT_13[] =3D {
+ S390_FEAT_GROUP_MSA_EXT_13,
+};
+
static uint16_t group_MSA_EXT_9_PCKMO[] =3D {
S390_FEAT_GROUP_MSA_EXT_9_PCKMO,
};
@@ -358,6 +378,10 @@ static uint16_t group_MSA_EXT_11_PCKMO[] =3D {
S390_FEAT_GROUP_MSA_EXT_11_PCKMO,
};
=20
+static uint16_t group_MSA_EXT_13_PCKMO[] =3D {
+ S390_FEAT_GROUP_MSA_EXT_13_PCKMO,
+};
+
static uint16_t group_ENH_SORT[] =3D {
S390_FEAT_GROUP_ENH_SORT,
};
@@ -910,6 +934,8 @@ static FeatGroupDefSpec FeatGroupDef[] =3D {
FEAT_GROUP_INITIALIZER(MSA_EXT_11),
FEAT_GROUP_INITIALIZER(MSA_EXT_11_PCKMO),
FEAT_GROUP_INITIALIZER(MSA_EXT_12),
+ FEAT_GROUP_INITIALIZER(MSA_EXT_13),
+ FEAT_GROUP_INITIALIZER(MSA_EXT_13_PCKMO),
FEAT_GROUP_INITIALIZER(MULTIPLE_EPOCH_PTFF),
FEAT_GROUP_INITIALIZER(ENH_SORT),
FEAT_GROUP_INITIALIZER(DEFLATE_CONVERSION),
--=20
2.43.5
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From: Hendrik Brueckner <brueckner@linux.ibm.com>
To: qemu-devel@nongnu.org, qemu-s390x@nongnu.org, thuth@redhat.com
Cc: nsg@linux.ibm.com, frankja@linux.ibm.com, mimu@linux.ibm.com,
borntraeger@linux.ibm.com, Hendrik Brueckner <brueckner@linux.ibm.com>
Subject: [RFC PATCH v2 05/15] s390x/cpumodel: Add ptff Query Time-Stamp Event
(QTSE) support
Date: Fri, 6 Dec 2024 13:27:41 +0100
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Content-Type: text/plain; charset="utf-8"
Introduce a new PTFF subfunction to query-stamp events.
Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com>
Reviewed-by: Janosch Frank <frankja@linux.ibm.com>
---
target/s390x/cpu_features.c | 1 +
target/s390x/cpu_features_def.h.inc | 1 +
target/s390x/gen-features.c | 9 +++++++++
3 files changed, 11 insertions(+)
diff --git a/target/s390x/cpu_features.c b/target/s390x/cpu_features.c
index 9ba127e386..385a2ff860 100644
--- a/target/s390x/cpu_features.c
+++ b/target/s390x/cpu_features.c
@@ -241,6 +241,7 @@ static S390FeatGroupDef s390_feature_groups[] =3D {
FEAT_GROUP_INIT("plo", PLO, "Perform-locked-operation facility"),
FEAT_GROUP_INIT("tods", TOD_CLOCK_STEERING, "Tod-clock-steering facili=
ty"),
FEAT_GROUP_INIT("gen13ptff", GEN13_PTFF, "PTFF enhancements introduced=
with z13"),
+ FEAT_GROUP_INIT("gen17ptff", GEN17_PTFF, "PTFF enhancements introduced=
with gen17"),
FEAT_GROUP_INIT("msa", MSA, "Message-security-assist facility"),
FEAT_GROUP_INIT("msa1", MSA_EXT_1, "Message-security-assist-extension =
1 facility"),
FEAT_GROUP_INIT("msa2", MSA_EXT_2, "Message-security-assist-extension =
2 facility"),
diff --git a/target/s390x/cpu_features_def.h.inc b/target/s390x/cpu_feature=
s_def.h.inc
index 2132837ffe..f96cb5a7d8 100644
--- a/target/s390x/cpu_features_def.h.inc
+++ b/target/s390x/cpu_features_def.h.inc
@@ -181,6 +181,7 @@ DEF_FEAT(PTFF_QSI, "ptff-qsi", PTFF, 2, "PTFF Query Ste=
ering Information")
DEF_FEAT(PTFF_QPT, "ptff-qpc", PTFF, 3, "PTFF Query Physical Clock")
DEF_FEAT(PTFF_QUI, "ptff-qui", PTFF, 4, "PTFF Query UTC Information")
DEF_FEAT(PTFF_QTOU, "ptff-qtou", PTFF, 5, "PTFF Query TOD Offset User")
+DEF_FEAT(PTFF_QTSE, "ptff-qtse", PTFF, 6, "PTFF Query Time-Stamp Event")
DEF_FEAT(PTFF_QSIE, "ptff-qsie", PTFF, 10, "PTFF Query Steering Informatio=
n Extended")
DEF_FEAT(PTFF_QTOUE, "ptff-qtoue", PTFF, 13, "PTFF Query TOD Offset User E=
xtended")
DEF_FEAT(PTFF_STO, "ptff-sto", PTFF, 65, "PTFF Set TOD Offset")
diff --git a/target/s390x/gen-features.c b/target/s390x/gen-features.c
index 3326e7df43..302b653214 100644
--- a/target/s390x/gen-features.c
+++ b/target/s390x/gen-features.c
@@ -64,6 +64,9 @@
S390_FEAT_PTFF_STOE, \
S390_FEAT_PTFF_STOUE
=20
+#define S390_FEAT_GROUP_GEN17_PTFF \
+ S390_FEAT_PTFF_QTSE
+
#define S390_FEAT_GROUP_MSA \
S390_FEAT_MSA, \
S390_FEAT_KMAC_DEA, \
@@ -318,6 +321,11 @@ static uint16_t group_GEN13_PTFF[] =3D {
static uint16_t group_MULTIPLE_EPOCH_PTFF[] =3D {
S390_FEAT_GROUP_MULTIPLE_EPOCH_PTFF,
};
+
+static uint16_t group_GEN17_PTFF[] =3D {
+ S390_FEAT_GROUP_GEN17_PTFF,
+};
+
static uint16_t group_MSA[] =3D {
S390_FEAT_GROUP_MSA,
};
@@ -918,6 +926,7 @@ static FeatGroupDefSpec FeatGroupDef[] =3D {
FEAT_GROUP_INITIALIZER(PLO),
FEAT_GROUP_INITIALIZER(TOD_CLOCK_STEERING),
FEAT_GROUP_INITIALIZER(GEN13_PTFF),
+ FEAT_GROUP_INITIALIZER(GEN17_PTFF),
FEAT_GROUP_INITIALIZER(MSA),
FEAT_GROUP_INITIALIZER(MSA_EXT_1),
FEAT_GROUP_INITIALIZER(MSA_EXT_2),
--=20
2.43.5
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From: Hendrik Brueckner <brueckner@linux.ibm.com>
To: qemu-devel@nongnu.org, qemu-s390x@nongnu.org, thuth@redhat.com
Cc: nsg@linux.ibm.com, frankja@linux.ibm.com, mimu@linux.ibm.com,
borntraeger@linux.ibm.com, Hendrik Brueckner <brueckner@linux.ibm.com>
Subject: [RFC PATCH v2 06/15] linux-headers: Update to Linux 6.13-rc1
Date: Fri, 6 Dec 2024 13:27:42 +0100
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This linux headers update includes required changes for
the gen17 CPU model.
Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com>
Suggested-by: Thomas Huth <thuth@redhat.com>
---
include/standard-headers/drm/drm_fourcc.h | 1 +
include/standard-headers/linux/ethtool.h | 5 +
include/standard-headers/linux/pci_regs.h | 38 ++-
.../standard-headers/linux/virtio_crypto.h | 1 +
include/standard-headers/linux/virtio_pci.h | 131 ++++++++++
linux-headers/asm-arm64/kvm.h | 6 +
linux-headers/asm-arm64/unistd_64.h | 4 +
linux-headers/asm-generic/mman-common.h | 3 +
linux-headers/asm-generic/mman.h | 4 +
linux-headers/asm-generic/unistd.h | 11 +-
linux-headers/asm-loongarch/kvm.h | 20 ++
linux-headers/asm-loongarch/unistd_64.h | 4 +
linux-headers/asm-mips/mman.h | 3 +
linux-headers/asm-mips/unistd_n32.h | 4 +
linux-headers/asm-mips/unistd_n64.h | 4 +
linux-headers/asm-mips/unistd_o32.h | 4 +
linux-headers/asm-powerpc/unistd_32.h | 4 +
linux-headers/asm-powerpc/unistd_64.h | 4 +
linux-headers/asm-riscv/kvm.h | 4 +
linux-headers/asm-riscv/unistd_32.h | 4 +
linux-headers/asm-riscv/unistd_64.h | 4 +
linux-headers/asm-s390/kvm.h | 3 +-
linux-headers/asm-s390/unistd_32.h | 4 +
linux-headers/asm-s390/unistd_64.h | 4 +
linux-headers/asm-x86/kvm.h | 1 +
linux-headers/asm-x86/mman.h | 3 -
linux-headers/asm-x86/unistd_32.h | 4 +
linux-headers/asm-x86/unistd_64.h | 4 +
linux-headers/asm-x86/unistd_x32.h | 4 +
linux-headers/linux/iommufd.h | 224 +++++++++++++++++-
linux-headers/linux/kvm.h | 8 +
linux-headers/linux/psci.h | 5 +
linux-headers/linux/vfio.h | 2 +-
33 files changed, 506 insertions(+), 23 deletions(-)
diff --git a/include/standard-headers/drm/drm_fourcc.h b/include/standard-h=
eaders/drm/drm_fourcc.h
index d4a2231306..708647776f 100644
--- a/include/standard-headers/drm/drm_fourcc.h
+++ b/include/standard-headers/drm/drm_fourcc.h
@@ -1515,6 +1515,7 @@ drm_fourcc_canonicalize_nvidia_format_mod(uint64_t mo=
difier)
* 64K_D_2D on GFX12 is identical to 64K_D on GFX11.
*/
#define AMD_FMT_MOD_TILE_GFX9_64K_D 10
+#define AMD_FMT_MOD_TILE_GFX9_4K_D_X 22
#define AMD_FMT_MOD_TILE_GFX9_64K_S_X 25
#define AMD_FMT_MOD_TILE_GFX9_64K_D_X 26
#define AMD_FMT_MOD_TILE_GFX9_64K_R_X 27
diff --git a/include/standard-headers/linux/ethtool.h b/include/standard-he=
aders/linux/ethtool.h
index b05e84825b..67c47912e5 100644
--- a/include/standard-headers/linux/ethtool.h
+++ b/include/standard-headers/linux/ethtool.h
@@ -2526,6 +2526,11 @@ struct ethtool_link_settings {
uint8_t master_slave_state;
uint8_t rate_matching;
uint32_t reserved[7];
+ /* Linux builds with -Wflex-array-member-not-at-end but does
+ * not use the "link_mode_masks" member. Leave it defined for
+ * userspace for now, and when userspace wants to start using
+ * -Wfamnae, we'll need a new solution.
+ */
uint32_t link_mode_masks[];
/* layout of link_mode_masks fields:
* uint32_t map_supported[link_mode_masks_nwords];
diff --git a/include/standard-headers/linux/pci_regs.h b/include/standard-h=
eaders/linux/pci_regs.h
index 12323b3334..1601c7ed5f 100644
--- a/include/standard-headers/linux/pci_regs.h
+++ b/include/standard-headers/linux/pci_regs.h
@@ -340,7 +340,8 @@
#define PCI_MSIX_ENTRY_UPPER_ADDR 0x4 /* Message Upper Address */
#define PCI_MSIX_ENTRY_DATA 0x8 /* Message Data */
#define PCI_MSIX_ENTRY_VECTOR_CTRL 0xc /* Vector Control */
-#define PCI_MSIX_ENTRY_CTRL_MASKBIT 0x00000001
+#define PCI_MSIX_ENTRY_CTRL_MASKBIT 0x00000001 /* Mask Bit */
+#define PCI_MSIX_ENTRY_CTRL_ST 0xffff0000 /* Steering Tag */
=20
/* CompactPCI Hotswap Register */
=20
@@ -659,6 +660,7 @@
#define PCI_EXP_DEVCAP2_ATOMIC_COMP64 0x00000100 /* 64b AtomicOp completi=
on */
#define PCI_EXP_DEVCAP2_ATOMIC_COMP128 0x00000200 /* 128b AtomicOp comple=
tion */
#define PCI_EXP_DEVCAP2_LTR 0x00000800 /* Latency tolerance reporting */
+#define PCI_EXP_DEVCAP2_TPH_COMP_MASK 0x00003000 /* TPH completer support=
*/
#define PCI_EXP_DEVCAP2_OBFF_MASK 0x000c0000 /* OBFF support mechanism */
#define PCI_EXP_DEVCAP2_OBFF_MSG 0x00040000 /* New message signaling */
#define PCI_EXP_DEVCAP2_OBFF_WAKE 0x00080000 /* Re-use WAKE# for OBFF */
@@ -678,6 +680,7 @@
#define PCI_EXP_DEVSTA2 0x2a /* Device Status 2 */
#define PCI_CAP_EXP_RC_ENDPOINT_SIZEOF_V2 0x2c /* end of v2 EPs w/o link */
#define PCI_EXP_LNKCAP2 0x2c /* Link Capabilities 2 */
+#define PCI_EXP_LNKCAP2_SLS 0x000000fe /* Supported Link Speeds Vector */
#define PCI_EXP_LNKCAP2_SLS_2_5GB 0x00000002 /* Supported Speed 2.5GT/s */
#define PCI_EXP_LNKCAP2_SLS_5_0GB 0x00000004 /* Supported Speed 5GT/s */
#define PCI_EXP_LNKCAP2_SLS_8_0GB 0x00000008 /* Supported Speed 8GT/s */
@@ -1023,15 +1026,34 @@
#define PCI_DPA_CAP_SUBSTATE_MASK 0x1F /* # substates - 1 */
#define PCI_DPA_BASE_SIZEOF 16 /* size with 0 substates */
=20
+/* TPH Completer Support */
+#define PCI_EXP_DEVCAP2_TPH_COMP_NONE 0x0 /* None */
+#define PCI_EXP_DEVCAP2_TPH_COMP_TPH_ONLY 0x1 /* TPH only */
+#define PCI_EXP_DEVCAP2_TPH_COMP_EXT_TPH 0x3 /* TPH and Extended TPH */
+
/* TPH Requester */
#define PCI_TPH_CAP 4 /* capability register */
-#define PCI_TPH_CAP_LOC_MASK 0x600 /* location mask */
-#define PCI_TPH_LOC_NONE 0x000 /* no location */
-#define PCI_TPH_LOC_CAP 0x200 /* in capability */
-#define PCI_TPH_LOC_MSIX 0x400 /* in MSI-X */
-#define PCI_TPH_CAP_ST_MASK 0x07FF0000 /* ST table mask */
-#define PCI_TPH_CAP_ST_SHIFT 16 /* ST table shift */
-#define PCI_TPH_BASE_SIZEOF 0xc /* size with no ST table */
+#define PCI_TPH_CAP_ST_NS 0x00000001 /* No ST Mode Supported */
+#define PCI_TPH_CAP_ST_IV 0x00000002 /* Interrupt Vector Mode Supported */
+#define PCI_TPH_CAP_ST_DS 0x00000004 /* Device Specific Mode Supported */
+#define PCI_TPH_CAP_EXT_TPH 0x00000100 /* Ext TPH Requester Supported */
+#define PCI_TPH_CAP_LOC_MASK 0x00000600 /* ST Table Location */
+#define PCI_TPH_LOC_NONE 0x00000000 /* Not present */
+#define PCI_TPH_LOC_CAP 0x00000200 /* In capability */
+#define PCI_TPH_LOC_MSIX 0x00000400 /* In MSI-X */
+#define PCI_TPH_CAP_ST_MASK 0x07FF0000 /* ST Table Size */
+#define PCI_TPH_CAP_ST_SHIFT 16 /* ST Table Size shift */
+#define PCI_TPH_BASE_SIZEOF 0xc /* Size with no ST table */
+
+#define PCI_TPH_CTRL 8 /* control register */
+#define PCI_TPH_CTRL_MODE_SEL_MASK 0x00000007 /* ST Mode Select */
+#define PCI_TPH_ST_NS_MODE 0x0 /* No ST Mode */
+#define PCI_TPH_ST_IV_MODE 0x1 /* Interrupt Vector Mode */
+#define PCI_TPH_ST_DS_MODE 0x2 /* Device Specific Mode */
+#define PCI_TPH_CTRL_REQ_EN_MASK 0x00000300 /* TPH Requester Enable */
+#define PCI_TPH_REQ_DISABLE 0x0 /* No TPH requests allowed */
+#define PCI_TPH_REQ_TPH_ONLY 0x1 /* TPH only requests allowed */
+#define PCI_TPH_REQ_EXT_TPH 0x3 /* Extended TPH requests allowed */
=20
/* Downstream Port Containment */
#define PCI_EXP_DPC_CAP 0x04 /* DPC Capability */
diff --git a/include/standard-headers/linux/virtio_crypto.h b/include/stand=
ard-headers/linux/virtio_crypto.h
index 68066dafb6..4d350ae595 100644
--- a/include/standard-headers/linux/virtio_crypto.h
+++ b/include/standard-headers/linux/virtio_crypto.h
@@ -329,6 +329,7 @@ struct virtio_crypto_op_header {
VIRTIO_CRYPTO_OPCODE(VIRTIO_CRYPTO_SERVICE_AKCIPHER, 0x00)
#define VIRTIO_CRYPTO_AKCIPHER_DECRYPT \
VIRTIO_CRYPTO_OPCODE(VIRTIO_CRYPTO_SERVICE_AKCIPHER, 0x01)
+ /* akcipher sign/verify opcodes are deprecated */
#define VIRTIO_CRYPTO_AKCIPHER_SIGN \
VIRTIO_CRYPTO_OPCODE(VIRTIO_CRYPTO_SERVICE_AKCIPHER, 0x02)
#define VIRTIO_CRYPTO_AKCIPHER_VERIFY \
diff --git a/include/standard-headers/linux/virtio_pci.h b/include/standard=
-headers/linux/virtio_pci.h
index 4010216103..b177ed8972 100644
--- a/include/standard-headers/linux/virtio_pci.h
+++ b/include/standard-headers/linux/virtio_pci.h
@@ -40,6 +40,7 @@
#define _LINUX_VIRTIO_PCI_H
=20
#include "standard-headers/linux/types.h"
+#include "standard-headers/linux/kernel.h"
=20
#ifndef VIRTIO_PCI_NO_LEGACY
=20
@@ -240,6 +241,17 @@ struct virtio_pci_cfg_cap {
#define VIRTIO_ADMIN_CMD_LEGACY_DEV_CFG_READ 0x5
#define VIRTIO_ADMIN_CMD_LEGACY_NOTIFY_INFO 0x6
=20
+/* Device parts access commands. */
+#define VIRTIO_ADMIN_CMD_CAP_ID_LIST_QUERY 0x7
+#define VIRTIO_ADMIN_CMD_DEVICE_CAP_GET 0x8
+#define VIRTIO_ADMIN_CMD_DRIVER_CAP_SET 0x9
+#define VIRTIO_ADMIN_CMD_RESOURCE_OBJ_CREATE 0xa
+#define VIRTIO_ADMIN_CMD_RESOURCE_OBJ_DESTROY 0xd
+#define VIRTIO_ADMIN_CMD_DEV_PARTS_METADATA_GET 0xe
+#define VIRTIO_ADMIN_CMD_DEV_PARTS_GET 0xf
+#define VIRTIO_ADMIN_CMD_DEV_PARTS_SET 0x10
+#define VIRTIO_ADMIN_CMD_DEV_MODE_SET 0x11
+
struct virtio_admin_cmd_hdr {
uint16_t opcode;
/*
@@ -286,4 +298,123 @@ struct virtio_admin_cmd_notify_info_result {
struct virtio_admin_cmd_notify_info_data entries[VIRTIO_ADMIN_CMD_MAX_NOT=
IFY_INFO];
};
=20
+#define VIRTIO_DEV_PARTS_CAP 0x0000
+
+struct virtio_dev_parts_cap {
+ uint8_t get_parts_resource_objects_limit;
+ uint8_t set_parts_resource_objects_limit;
+};
+
+#define MAX_CAP_ID __KERNEL_DIV_ROUND_UP(VIRTIO_DEV_PARTS_CAP + 1, 64)
+
+struct virtio_admin_cmd_query_cap_id_result {
+ uint64_t supported_caps[MAX_CAP_ID];
+};
+
+struct virtio_admin_cmd_cap_get_data {
+ uint16_t id;
+ uint8_t reserved[6];
+};
+
+struct virtio_admin_cmd_cap_set_data {
+ uint16_t id;
+ uint8_t reserved[6];
+ uint8_t cap_specific_data[];
+};
+
+struct virtio_admin_cmd_resource_obj_cmd_hdr {
+ uint16_t type;
+ uint8_t reserved[2];
+ uint32_t id; /* Indicates unique resource object id per resource object t=
ype */
+};
+
+struct virtio_admin_cmd_resource_obj_create_data {
+ struct virtio_admin_cmd_resource_obj_cmd_hdr hdr;
+ uint64_t flags;
+ uint8_t resource_obj_specific_data[];
+};
+
+#define VIRTIO_RESOURCE_OBJ_DEV_PARTS 0
+
+#define VIRTIO_RESOURCE_OBJ_DEV_PARTS_TYPE_GET 0
+#define VIRTIO_RESOURCE_OBJ_DEV_PARTS_TYPE_SET 1
+
+struct virtio_resource_obj_dev_parts {
+ uint8_t type;
+ uint8_t reserved[7];
+};
+
+#define VIRTIO_ADMIN_CMD_DEV_PARTS_METADATA_TYPE_SIZE 0
+#define VIRTIO_ADMIN_CMD_DEV_PARTS_METADATA_TYPE_COUNT 1
+#define VIRTIO_ADMIN_CMD_DEV_PARTS_METADATA_TYPE_LIST 2
+
+struct virtio_admin_cmd_dev_parts_metadata_data {
+ struct virtio_admin_cmd_resource_obj_cmd_hdr hdr;
+ uint8_t type;
+ uint8_t reserved[7];
+};
+
+#define VIRTIO_DEV_PART_F_OPTIONAL 0
+
+struct virtio_dev_part_hdr {
+ uint16_t part_type;
+ uint8_t flags;
+ uint8_t reserved;
+ union {
+ struct {
+ uint32_t offset;
+ uint32_t reserved;
+ } pci_common_cfg;
+ struct {
+ uint16_t index;
+ uint8_t reserved[6];
+ } vq_index;
+ } selector;
+ uint32_t length;
+};
+
+struct virtio_dev_part {
+ struct virtio_dev_part_hdr hdr;
+ uint8_t value[];
+};
+
+struct virtio_admin_cmd_dev_parts_metadata_result {
+ union {
+ struct {
+ uint32_t size;
+ uint32_t reserved;
+ } parts_size;
+ struct {
+ uint32_t count;
+ uint32_t reserved;
+ } hdr_list_count;
+ struct {
+ uint32_t count;
+ uint32_t reserved;
+ struct virtio_dev_part_hdr hdrs[];
+ } hdr_list;
+ };
+};
+
+#define VIRTIO_ADMIN_CMD_DEV_PARTS_GET_TYPE_SELECTED 0
+#define VIRTIO_ADMIN_CMD_DEV_PARTS_GET_TYPE_ALL 1
+
+struct virtio_admin_cmd_dev_parts_get_data {
+ struct virtio_admin_cmd_resource_obj_cmd_hdr hdr;
+ uint8_t type;
+ uint8_t reserved[7];
+ struct virtio_dev_part_hdr hdr_list[];
+};
+
+struct virtio_admin_cmd_dev_parts_set_data {
+ struct virtio_admin_cmd_resource_obj_cmd_hdr hdr;
+ struct virtio_dev_part parts[];
+};
+
+#define VIRTIO_ADMIN_CMD_DEV_MODE_F_STOPPED 0
+
+struct virtio_admin_cmd_dev_mode_set_data {
+ uint8_t flags;
+};
+
#endif
diff --git a/linux-headers/asm-arm64/kvm.h b/linux-headers/asm-arm64/kvm.h
index 2af9931ae9..dccd5d965f 100644
--- a/linux-headers/asm-arm64/kvm.h
+++ b/linux-headers/asm-arm64/kvm.h
@@ -473,6 +473,12 @@ enum {
*/
#define KVM_SYSTEM_EVENT_RESET_FLAG_PSCI_RESET2 (1ULL << 0)
=20
+/*
+ * Shutdown caused by a PSCI v1.3 SYSTEM_OFF2 call.
+ * Valid only when the system event has a type of KVM_SYSTEM_EVENT_SHUTDOW=
N.
+ */
+#define KVM_SYSTEM_EVENT_SHUTDOWN_FLAG_PSCI_OFF2 (1ULL << 0)
+
/* run->fail_entry.hardware_entry_failure_reason codes. */
#define KVM_EXIT_FAIL_ENTRY_CPU_UNSUPPORTED (1ULL << 0)
=20
diff --git a/linux-headers/asm-arm64/unistd_64.h b/linux-headers/asm-arm64/=
unistd_64.h
index 99a1d70459..d4e90fff76 100644
--- a/linux-headers/asm-arm64/unistd_64.h
+++ b/linux-headers/asm-arm64/unistd_64.h
@@ -319,6 +319,10 @@
#define __NR_lsm_set_self_attr 460
#define __NR_lsm_list_modules 461
#define __NR_mseal 462
+#define __NR_setxattrat 463
+#define __NR_getxattrat 464
+#define __NR_listxattrat 465
+#define __NR_removexattrat 466
=20
=20
#endif /* _ASM_UNISTD_64_H */
diff --git a/linux-headers/asm-generic/mman-common.h b/linux-headers/asm-ge=
neric/mman-common.h
index 6ce1f1ceb4..1ea2c4c33b 100644
--- a/linux-headers/asm-generic/mman-common.h
+++ b/linux-headers/asm-generic/mman-common.h
@@ -79,6 +79,9 @@
=20
#define MADV_COLLAPSE 25 /* Synchronous hugepage collapse */
=20
+#define MADV_GUARD_INSTALL 102 /* fatal signal on access to range */
+#define MADV_GUARD_REMOVE 103 /* unguard range */
+
/* compatibility flags */
#define MAP_FILE 0
=20
diff --git a/linux-headers/asm-generic/mman.h b/linux-headers/asm-generic/m=
man.h
index 57e8195d0b..5e3d61ddbd 100644
--- a/linux-headers/asm-generic/mman.h
+++ b/linux-headers/asm-generic/mman.h
@@ -19,4 +19,8 @@
#define MCL_FUTURE 2 /* lock all future mappings */
#define MCL_ONFAULT 4 /* lock all pages that are faulted in */
=20
+#define SHADOW_STACK_SET_TOKEN (1ULL << 0) /* Set up a restore token i=
n the shadow stack */
+#define SHADOW_STACK_SET_MARKER (1ULL << 1) /* Set up a top of stack m=
arker in the shadow stack */
+
+
#endif /* __ASM_GENERIC_MMAN_H */
diff --git a/linux-headers/asm-generic/unistd.h b/linux-headers/asm-generic=
/unistd.h
index 5bf6148cac..88dc393c2b 100644
--- a/linux-headers/asm-generic/unistd.h
+++ b/linux-headers/asm-generic/unistd.h
@@ -841,8 +841,17 @@ __SYSCALL(__NR_lsm_list_modules, sys_lsm_list_modules)
#define __NR_mseal 462
__SYSCALL(__NR_mseal, sys_mseal)
=20
+#define __NR_setxattrat 463
+__SYSCALL(__NR_setxattrat, sys_setxattrat)
+#define __NR_getxattrat 464
+__SYSCALL(__NR_getxattrat, sys_getxattrat)
+#define __NR_listxattrat 465
+__SYSCALL(__NR_listxattrat, sys_listxattrat)
+#define __NR_removexattrat 466
+__SYSCALL(__NR_removexattrat, sys_removexattrat)
+
#undef __NR_syscalls
-#define __NR_syscalls 463
+#define __NR_syscalls 467
=20
/*
* 32 bit systems traditionally used different
diff --git a/linux-headers/asm-loongarch/kvm.h b/linux-headers/asm-loongarc=
h/kvm.h
index 70d89070bf..5f354f5c68 100644
--- a/linux-headers/asm-loongarch/kvm.h
+++ b/linux-headers/asm-loongarch/kvm.h
@@ -8,6 +8,8 @@
=20
#include <linux/types.h>
=20
+#define __KVM_HAVE_IRQ_LINE
+
/*
* KVM LoongArch specific structures and definitions.
*
@@ -132,4 +134,22 @@ struct kvm_iocsr_entry {
#define KVM_IRQCHIP_NUM_PINS 64
#define KVM_MAX_CORES 256
=20
+#define KVM_DEV_LOONGARCH_IPI_GRP_REGS 0x40000001
+
+#define KVM_DEV_LOONGARCH_EXTIOI_GRP_REGS 0x40000002
+
+#define KVM_DEV_LOONGARCH_EXTIOI_GRP_SW_STATUS 0x40000003
+#define KVM_DEV_LOONGARCH_EXTIOI_SW_STATUS_NUM_CPU 0x0
+#define KVM_DEV_LOONGARCH_EXTIOI_SW_STATUS_FEATURE 0x1
+#define KVM_DEV_LOONGARCH_EXTIOI_SW_STATUS_STATE 0x2
+
+#define KVM_DEV_LOONGARCH_EXTIOI_GRP_CTRL 0x40000004
+#define KVM_DEV_LOONGARCH_EXTIOI_CTRL_INIT_NUM_CPU 0x0
+#define KVM_DEV_LOONGARCH_EXTIOI_CTRL_INIT_FEATURE 0x1
+#define KVM_DEV_LOONGARCH_EXTIOI_CTRL_LOAD_FINISHED 0x3
+
+#define KVM_DEV_LOONGARCH_PCH_PIC_GRP_REGS 0x40000005
+#define KVM_DEV_LOONGARCH_PCH_PIC_GRP_CTRL 0x40000006
+#define KVM_DEV_LOONGARCH_PCH_PIC_CTRL_INIT 0
+
#endif /* __UAPI_ASM_LOONGARCH_KVM_H */
diff --git a/linux-headers/asm-loongarch/unistd_64.h b/linux-headers/asm-lo=
ongarch/unistd_64.h
index 887ea50cca..23fb96a8a7 100644
--- a/linux-headers/asm-loongarch/unistd_64.h
+++ b/linux-headers/asm-loongarch/unistd_64.h
@@ -315,6 +315,10 @@
#define __NR_lsm_set_self_attr 460
#define __NR_lsm_list_modules 461
#define __NR_mseal 462
+#define __NR_setxattrat 463
+#define __NR_getxattrat 464
+#define __NR_listxattrat 465
+#define __NR_removexattrat 466
=20
=20
#endif /* _ASM_UNISTD_64_H */
diff --git a/linux-headers/asm-mips/mman.h b/linux-headers/asm-mips/mman.h
index 9c48d9a21a..b700dae28c 100644
--- a/linux-headers/asm-mips/mman.h
+++ b/linux-headers/asm-mips/mman.h
@@ -105,6 +105,9 @@
=20
#define MADV_COLLAPSE 25 /* Synchronous hugepage collapse */
=20
+#define MADV_GUARD_INSTALL 102 /* fatal signal on access to range */
+#define MADV_GUARD_REMOVE 103 /* unguard range */
+
/* compatibility flags */
#define MAP_FILE 0
=20
diff --git a/linux-headers/asm-mips/unistd_n32.h b/linux-headers/asm-mips/u=
nistd_n32.h
index fc93b3be30..9a75719644 100644
--- a/linux-headers/asm-mips/unistd_n32.h
+++ b/linux-headers/asm-mips/unistd_n32.h
@@ -391,5 +391,9 @@
#define __NR_lsm_set_self_attr (__NR_Linux + 460)
#define __NR_lsm_list_modules (__NR_Linux + 461)
#define __NR_mseal (__NR_Linux + 462)
+#define __NR_setxattrat (__NR_Linux + 463)
+#define __NR_getxattrat (__NR_Linux + 464)
+#define __NR_listxattrat (__NR_Linux + 465)
+#define __NR_removexattrat (__NR_Linux + 466)
=20
#endif /* _ASM_UNISTD_N32_H */
diff --git a/linux-headers/asm-mips/unistd_n64.h b/linux-headers/asm-mips/u=
nistd_n64.h
index e72a3eb2c9..7086783b0c 100644
--- a/linux-headers/asm-mips/unistd_n64.h
+++ b/linux-headers/asm-mips/unistd_n64.h
@@ -367,5 +367,9 @@
#define __NR_lsm_set_self_attr (__NR_Linux + 460)
#define __NR_lsm_list_modules (__NR_Linux + 461)
#define __NR_mseal (__NR_Linux + 462)
+#define __NR_setxattrat (__NR_Linux + 463)
+#define __NR_getxattrat (__NR_Linux + 464)
+#define __NR_listxattrat (__NR_Linux + 465)
+#define __NR_removexattrat (__NR_Linux + 466)
=20
#endif /* _ASM_UNISTD_N64_H */
diff --git a/linux-headers/asm-mips/unistd_o32.h b/linux-headers/asm-mips/u=
nistd_o32.h
index b86eb0786c..b3825823e4 100644
--- a/linux-headers/asm-mips/unistd_o32.h
+++ b/linux-headers/asm-mips/unistd_o32.h
@@ -437,5 +437,9 @@
#define __NR_lsm_set_self_attr (__NR_Linux + 460)
#define __NR_lsm_list_modules (__NR_Linux + 461)
#define __NR_mseal (__NR_Linux + 462)
+#define __NR_setxattrat (__NR_Linux + 463)
+#define __NR_getxattrat (__NR_Linux + 464)
+#define __NR_listxattrat (__NR_Linux + 465)
+#define __NR_removexattrat (__NR_Linux + 466)
=20
#endif /* _ASM_UNISTD_O32_H */
diff --git a/linux-headers/asm-powerpc/unistd_32.h b/linux-headers/asm-powe=
rpc/unistd_32.h
index 28627b6546..38ee4dc35d 100644
--- a/linux-headers/asm-powerpc/unistd_32.h
+++ b/linux-headers/asm-powerpc/unistd_32.h
@@ -444,6 +444,10 @@
#define __NR_lsm_set_self_attr 460
#define __NR_lsm_list_modules 461
#define __NR_mseal 462
+#define __NR_setxattrat 463
+#define __NR_getxattrat 464
+#define __NR_listxattrat 465
+#define __NR_removexattrat 466
=20
=20
#endif /* _ASM_UNISTD_32_H */
diff --git a/linux-headers/asm-powerpc/unistd_64.h b/linux-headers/asm-powe=
rpc/unistd_64.h
index 1fc42a8300..5e5f156834 100644
--- a/linux-headers/asm-powerpc/unistd_64.h
+++ b/linux-headers/asm-powerpc/unistd_64.h
@@ -416,6 +416,10 @@
#define __NR_lsm_set_self_attr 460
#define __NR_lsm_list_modules 461
#define __NR_mseal 462
+#define __NR_setxattrat 463
+#define __NR_getxattrat 464
+#define __NR_listxattrat 465
+#define __NR_removexattrat 466
=20
=20
#endif /* _ASM_UNISTD_64_H */
diff --git a/linux-headers/asm-riscv/kvm.h b/linux-headers/asm-riscv/kvm.h
index e97db32964..3482c9a73d 100644
--- a/linux-headers/asm-riscv/kvm.h
+++ b/linux-headers/asm-riscv/kvm.h
@@ -175,6 +175,10 @@ enum KVM_RISCV_ISA_EXT_ID {
KVM_RISCV_ISA_EXT_ZCF,
KVM_RISCV_ISA_EXT_ZCMOP,
KVM_RISCV_ISA_EXT_ZAWRS,
+ KVM_RISCV_ISA_EXT_SMNPM,
+ KVM_RISCV_ISA_EXT_SSNPM,
+ KVM_RISCV_ISA_EXT_SVADE,
+ KVM_RISCV_ISA_EXT_SVADU,
KVM_RISCV_ISA_EXT_MAX,
};
=20
diff --git a/linux-headers/asm-riscv/unistd_32.h b/linux-headers/asm-riscv/=
unistd_32.h
index 9625743dfd..74f6127aed 100644
--- a/linux-headers/asm-riscv/unistd_32.h
+++ b/linux-headers/asm-riscv/unistd_32.h
@@ -310,6 +310,10 @@
#define __NR_lsm_set_self_attr 460
#define __NR_lsm_list_modules 461
#define __NR_mseal 462
+#define __NR_setxattrat 463
+#define __NR_getxattrat 464
+#define __NR_listxattrat 465
+#define __NR_removexattrat 466
=20
=20
#endif /* _ASM_UNISTD_32_H */
diff --git a/linux-headers/asm-riscv/unistd_64.h b/linux-headers/asm-riscv/=
unistd_64.h
index 95bca8ae81..bb6a15a2ec 100644
--- a/linux-headers/asm-riscv/unistd_64.h
+++ b/linux-headers/asm-riscv/unistd_64.h
@@ -320,6 +320,10 @@
#define __NR_lsm_set_self_attr 460
#define __NR_lsm_list_modules 461
#define __NR_mseal 462
+#define __NR_setxattrat 463
+#define __NR_getxattrat 464
+#define __NR_listxattrat 465
+#define __NR_removexattrat 466
=20
=20
#endif /* _ASM_UNISTD_64_H */
diff --git a/linux-headers/asm-s390/kvm.h b/linux-headers/asm-s390/kvm.h
index 684c4e1205..ab5a6bce59 100644
--- a/linux-headers/asm-s390/kvm.h
+++ b/linux-headers/asm-s390/kvm.h
@@ -469,7 +469,8 @@ struct kvm_s390_vm_cpu_subfunc {
__u8 kdsa[16]; /* with MSA9 */
__u8 sortl[32]; /* with STFLE.150 */
__u8 dfltcc[32]; /* with STFLE.151 */
- __u8 reserved[1728];
+ __u8 pfcr[16]; /* with STFLE.201 */
+ __u8 reserved[1712];
};
=20
#define KVM_S390_VM_CPU_PROCESSOR_UV_FEAT_GUEST 6
diff --git a/linux-headers/asm-s390/unistd_32.h b/linux-headers/asm-s390/un=
istd_32.h
index 7706c21b87..620201cb36 100644
--- a/linux-headers/asm-s390/unistd_32.h
+++ b/linux-headers/asm-s390/unistd_32.h
@@ -435,5 +435,9 @@
#define __NR_lsm_set_self_attr 460
#define __NR_lsm_list_modules 461
#define __NR_mseal 462
+#define __NR_setxattrat 463
+#define __NR_getxattrat 464
+#define __NR_listxattrat 465
+#define __NR_removexattrat 466
=20
#endif /* _ASM_S390_UNISTD_32_H */
diff --git a/linux-headers/asm-s390/unistd_64.h b/linux-headers/asm-s390/un=
istd_64.h
index 62082d592d..e7e4a10aaf 100644
--- a/linux-headers/asm-s390/unistd_64.h
+++ b/linux-headers/asm-s390/unistd_64.h
@@ -383,5 +383,9 @@
#define __NR_lsm_set_self_attr 460
#define __NR_lsm_list_modules 461
#define __NR_mseal 462
+#define __NR_setxattrat 463
+#define __NR_getxattrat 464
+#define __NR_listxattrat 465
+#define __NR_removexattrat 466
=20
#endif /* _ASM_S390_UNISTD_64_H */
diff --git a/linux-headers/asm-x86/kvm.h b/linux-headers/asm-x86/kvm.h
index 4711ef2c3d..96589490c4 100644
--- a/linux-headers/asm-x86/kvm.h
+++ b/linux-headers/asm-x86/kvm.h
@@ -438,6 +438,7 @@ struct kvm_sync_regs {
#define KVM_X86_QUIRK_FIX_HYPERCALL_INSN (1 << 5)
#define KVM_X86_QUIRK_MWAIT_NEVER_UD_FAULTS (1 << 6)
#define KVM_X86_QUIRK_SLOT_ZAP_ALL (1 << 7)
+#define KVM_X86_QUIRK_STUFF_FEATURE_MSRS (1 << 8)
=20
#define KVM_STATE_NESTED_FORMAT_VMX 0
#define KVM_STATE_NESTED_FORMAT_SVM 1
diff --git a/linux-headers/asm-x86/mman.h b/linux-headers/asm-x86/mman.h
index 46cdc941f9..ac1e627721 100644
--- a/linux-headers/asm-x86/mman.h
+++ b/linux-headers/asm-x86/mman.h
@@ -5,9 +5,6 @@
#define MAP_32BIT 0x40 /* only give out 32bit addresses */
#define MAP_ABOVE4G 0x80 /* only map above 4GB */
=20
-/* Flags for map_shadow_stack(2) */
-#define SHADOW_STACK_SET_TOKEN (1ULL << 0) /* Set up a restore token in th=
e shadow stack */
-
#include <asm-generic/mman.h>
=20
#endif /* _ASM_X86_MMAN_H */
diff --git a/linux-headers/asm-x86/unistd_32.h b/linux-headers/asm-x86/unis=
td_32.h
index fb7b8b169b..a2eb492a75 100644
--- a/linux-headers/asm-x86/unistd_32.h
+++ b/linux-headers/asm-x86/unistd_32.h
@@ -453,6 +453,10 @@
#define __NR_lsm_set_self_attr 460
#define __NR_lsm_list_modules 461
#define __NR_mseal 462
+#define __NR_setxattrat 463
+#define __NR_getxattrat 464
+#define __NR_listxattrat 465
+#define __NR_removexattrat 466
=20
=20
#endif /* _ASM_UNISTD_32_H */
diff --git a/linux-headers/asm-x86/unistd_64.h b/linux-headers/asm-x86/unis=
td_64.h
index 24c979be54..2f5fc400f5 100644
--- a/linux-headers/asm-x86/unistd_64.h
+++ b/linux-headers/asm-x86/unistd_64.h
@@ -376,6 +376,10 @@
#define __NR_lsm_set_self_attr 460
#define __NR_lsm_list_modules 461
#define __NR_mseal 462
+#define __NR_setxattrat 463
+#define __NR_getxattrat 464
+#define __NR_listxattrat 465
+#define __NR_removexattrat 466
=20
=20
#endif /* _ASM_UNISTD_64_H */
diff --git a/linux-headers/asm-x86/unistd_x32.h b/linux-headers/asm-x86/uni=
std_x32.h
index c23dd21a2d..fecd832e7f 100644
--- a/linux-headers/asm-x86/unistd_x32.h
+++ b/linux-headers/asm-x86/unistd_x32.h
@@ -329,6 +329,10 @@
#define __NR_lsm_set_self_attr (__X32_SYSCALL_BIT + 460)
#define __NR_lsm_list_modules (__X32_SYSCALL_BIT + 461)
#define __NR_mseal (__X32_SYSCALL_BIT + 462)
+#define __NR_setxattrat (__X32_SYSCALL_BIT + 463)
+#define __NR_getxattrat (__X32_SYSCALL_BIT + 464)
+#define __NR_listxattrat (__X32_SYSCALL_BIT + 465)
+#define __NR_removexattrat (__X32_SYSCALL_BIT + 466)
#define __NR_rt_sigaction (__X32_SYSCALL_BIT + 512)
#define __NR_rt_sigreturn (__X32_SYSCALL_BIT + 513)
#define __NR_ioctl (__X32_SYSCALL_BIT + 514)
diff --git a/linux-headers/linux/iommufd.h b/linux-headers/linux/iommufd.h
index 782baf477f..37aae16502 100644
--- a/linux-headers/linux/iommufd.h
+++ b/linux-headers/linux/iommufd.h
@@ -51,6 +51,10 @@ enum {
IOMMUFD_CMD_HWPT_GET_DIRTY_BITMAP =3D 0x8c,
IOMMUFD_CMD_HWPT_INVALIDATE =3D 0x8d,
IOMMUFD_CMD_FAULT_QUEUE_ALLOC =3D 0x8e,
+ IOMMUFD_CMD_IOAS_MAP_FILE =3D 0x8f,
+ IOMMUFD_CMD_VIOMMU_ALLOC =3D 0x90,
+ IOMMUFD_CMD_VDEVICE_ALLOC =3D 0x91,
+ IOMMUFD_CMD_IOAS_CHANGE_PROCESS =3D 0x92,
};
=20
/**
@@ -213,6 +217,30 @@ struct iommu_ioas_map {
};
#define IOMMU_IOAS_MAP _IO(IOMMUFD_TYPE, IOMMUFD_CMD_IOAS_MAP)
=20
+/**
+ * struct iommu_ioas_map_file - ioctl(IOMMU_IOAS_MAP_FILE)
+ * @size: sizeof(struct iommu_ioas_map_file)
+ * @flags: same as for iommu_ioas_map
+ * @ioas_id: same as for iommu_ioas_map
+ * @fd: the memfd to map
+ * @start: byte offset from start of file to map from
+ * @length: same as for iommu_ioas_map
+ * @iova: same as for iommu_ioas_map
+ *
+ * Set an IOVA mapping from a memfd file. All other arguments and semanti=
cs
+ * match those of IOMMU_IOAS_MAP.
+ */
+struct iommu_ioas_map_file {
+ __u32 size;
+ __u32 flags;
+ __u32 ioas_id;
+ __s32 fd;
+ __aligned_u64 start;
+ __aligned_u64 length;
+ __aligned_u64 iova;
+};
+#define IOMMU_IOAS_MAP_FILE _IO(IOMMUFD_TYPE, IOMMUFD_CMD_IOAS_MAP_FILE)
+
/**
* struct iommu_ioas_copy - ioctl(IOMMU_IOAS_COPY)
* @size: sizeof(struct iommu_ioas_copy)
@@ -359,11 +387,19 @@ struct iommu_vfio_ioas {
* enforced on device attachment
* @IOMMU_HWPT_FAULT_ID_VALID: The fault_id field of hwpt allocation data =
is
* valid.
+ * @IOMMU_HWPT_ALLOC_PASID: Requests a domain that can be used with PASID.=
The
+ * domain can be attached to any PASID on the dev=
ice.
+ * Any domain attached to the non-PASID part of t=
he
+ * device must also be flaged, otherwise attachin=
g a
+ * PASID will blocked.
+ * If IOMMU does not support PASID it will return
+ * error (-EOPNOTSUPP).
*/
enum iommufd_hwpt_alloc_flags {
IOMMU_HWPT_ALLOC_NEST_PARENT =3D 1 << 0,
IOMMU_HWPT_ALLOC_DIRTY_TRACKING =3D 1 << 1,
IOMMU_HWPT_FAULT_ID_VALID =3D 1 << 2,
+ IOMMU_HWPT_ALLOC_PASID =3D 1 << 3,
};
=20
/**
@@ -394,14 +430,36 @@ struct iommu_hwpt_vtd_s1 {
__u32 __reserved;
};
=20
+/**
+ * struct iommu_hwpt_arm_smmuv3 - ARM SMMUv3 nested STE
+ * (IOMMU_HWPT_DATA_ARM_SMMUV3)
+ *
+ * @ste: The first two double words of the user space Stream Table Entry f=
or
+ * the translation. Must be little-endian.
+ * Allowed fields: (Refer to "5.2 Stream Table Entry" in SMMUv3 HW S=
pec)
+ * - word-0: V, Cfg, S1Fmt, S1ContextPtr, S1CDMax
+ * - word-1: EATS, S1DSS, S1CIR, S1COR, S1CSH, S1STALLD
+ *
+ * -EIO will be returned if @ste is not legal or contains any non-allowed =
field.
+ * Cfg can be used to select a S1, Bypass or Abort configuration. A Bypass
+ * nested domain will translate the same as the nesting parent. The S1 will
+ * install a Context Descriptor Table pointing at userspace memory transla=
ted
+ * by the nesting parent.
+ */
+struct iommu_hwpt_arm_smmuv3 {
+ __aligned_le64 ste[2];
+};
+
/**
* enum iommu_hwpt_data_type - IOMMU HWPT Data Type
* @IOMMU_HWPT_DATA_NONE: no data
* @IOMMU_HWPT_DATA_VTD_S1: Intel VT-d stage-1 page table
+ * @IOMMU_HWPT_DATA_ARM_SMMUV3: ARM SMMUv3 Context Descriptor Table
*/
enum iommu_hwpt_data_type {
IOMMU_HWPT_DATA_NONE =3D 0,
IOMMU_HWPT_DATA_VTD_S1 =3D 1,
+ IOMMU_HWPT_DATA_ARM_SMMUV3 =3D 2,
};
=20
/**
@@ -409,7 +467,7 @@ enum iommu_hwpt_data_type {
* @size: sizeof(struct iommu_hwpt_alloc)
* @flags: Combination of enum iommufd_hwpt_alloc_flags
* @dev_id: The device to allocate this HWPT for
- * @pt_id: The IOAS or HWPT to connect this HWPT to
+ * @pt_id: The IOAS or HWPT or vIOMMU to connect this HWPT to
* @out_hwpt_id: The ID of the new HWPT
* @__reserved: Must be 0
* @data_type: One of enum iommu_hwpt_data_type
@@ -428,11 +486,13 @@ enum iommu_hwpt_data_type {
* IOMMU_HWPT_DATA_NONE. The HWPT can be allocated as a parent HWPT for a
* nesting configuration by passing IOMMU_HWPT_ALLOC_NEST_PARENT via @flag=
s.
*
- * A user-managed nested HWPT will be created from a given parent HWPT via
- * @pt_id, in which the parent HWPT must be allocated previously via the
- * same ioctl from a given IOAS (@pt_id). In this case, the @data_type
- * must be set to a pre-defined type corresponding to an I/O page table
- * type supported by the underlying IOMMU hardware.
+ * A user-managed nested HWPT will be created from a given vIOMMU (wrappin=
g a
+ * parent HWPT) or a parent HWPT via @pt_id, in which the parent HWPT must=
be
+ * allocated previously via the same ioctl from a given IOAS (@pt_id). In =
this
+ * case, the @data_type must be set to a pre-defined type corresponding to=
an
+ * I/O page table type supported by the underlying IOMMU hardware. The dev=
ice
+ * via @dev_id and the vIOMMU via @pt_id must be associated to the same IO=
MMU
+ * instance.
*
* If the @data_type is set to IOMMU_HWPT_DATA_NONE, @data_len and
* @data_uptr should be zero. Otherwise, both @data_len and @data_uptr
@@ -484,15 +544,50 @@ struct iommu_hw_info_vtd {
__aligned_u64 ecap_reg;
};
=20
+/**
+ * struct iommu_hw_info_arm_smmuv3 - ARM SMMUv3 hardware information
+ * (IOMMU_HW_INFO_TYPE_ARM_SMMUV3)
+ *
+ * @flags: Must be set to 0
+ * @__reserved: Must be 0
+ * @idr: Implemented features for ARM SMMU Non-secure programming interface
+ * @iidr: Information about the implementation and implementer of ARM SMMU,
+ * and architecture version supported
+ * @aidr: ARM SMMU architecture version
+ *
+ * For the details of @idr, @iidr and @aidr, please refer to the chapters
+ * from 6.3.1 to 6.3.6 in the SMMUv3 Spec.
+ *
+ * User space should read the underlying ARM SMMUv3 hardware information f=
or
+ * the list of supported features.
+ *
+ * Note that these values reflect the raw HW capability, without any insig=
ht if
+ * any required kernel driver support is present. Bits may be set indicati=
ng the
+ * HW has functionality that is lacking kernel software support, such as B=
TM. If
+ * a VMM is using this information to construct emulated copies of these
+ * registers it should only forward bits that it knows it can support.
+ *
+ * In future, presence of required kernel support will be indicated in fla=
gs.
+ */
+struct iommu_hw_info_arm_smmuv3 {
+ __u32 flags;
+ __u32 __reserved;
+ __u32 idr[6];
+ __u32 iidr;
+ __u32 aidr;
+};
+
/**
* enum iommu_hw_info_type - IOMMU Hardware Info Types
* @IOMMU_HW_INFO_TYPE_NONE: Used by the drivers that do not report hardwa=
re
* info
* @IOMMU_HW_INFO_TYPE_INTEL_VTD: Intel VT-d iommu info type
+ * @IOMMU_HW_INFO_TYPE_ARM_SMMUV3: ARM SMMUv3 iommu info type
*/
enum iommu_hw_info_type {
IOMMU_HW_INFO_TYPE_NONE =3D 0,
IOMMU_HW_INFO_TYPE_INTEL_VTD =3D 1,
+ IOMMU_HW_INFO_TYPE_ARM_SMMUV3 =3D 2,
};
=20
/**
@@ -627,9 +722,11 @@ struct iommu_hwpt_get_dirty_bitmap {
* enum iommu_hwpt_invalidate_data_type - IOMMU HWPT Cache Invalidation
* Data Type
* @IOMMU_HWPT_INVALIDATE_DATA_VTD_S1: Invalidation data for VTD_S1
+ * @IOMMU_VIOMMU_INVALIDATE_DATA_ARM_SMMUV3: Invalidation data for ARM SMM=
Uv3
*/
enum iommu_hwpt_invalidate_data_type {
IOMMU_HWPT_INVALIDATE_DATA_VTD_S1 =3D 0,
+ IOMMU_VIOMMU_INVALIDATE_DATA_ARM_SMMUV3 =3D 1,
};
=20
/**
@@ -668,10 +765,32 @@ struct iommu_hwpt_vtd_s1_invalidate {
__u32 __reserved;
};
=20
+/**
+ * struct iommu_viommu_arm_smmuv3_invalidate - ARM SMMUv3 cahce invalidati=
on
+ * (IOMMU_VIOMMU_INVALIDATE_DATA_ARM_SMMUV3)
+ * @cmd: 128-bit cache invalidation command that runs in SMMU CMDQ.
+ * Must be little-endian.
+ *
+ * Supported command list only when passing in a vIOMMU via @hwpt_id:
+ * CMDQ_OP_TLBI_NSNH_ALL
+ * CMDQ_OP_TLBI_NH_VA
+ * CMDQ_OP_TLBI_NH_VAA
+ * CMDQ_OP_TLBI_NH_ALL
+ * CMDQ_OP_TLBI_NH_ASID
+ * CMDQ_OP_ATC_INV
+ * CMDQ_OP_CFGI_CD
+ * CMDQ_OP_CFGI_CD_ALL
+ *
+ * -EIO will be returned if the command is not supported.
+ */
+struct iommu_viommu_arm_smmuv3_invalidate {
+ __aligned_le64 cmd[2];
+};
+
/**
* struct iommu_hwpt_invalidate - ioctl(IOMMU_HWPT_INVALIDATE)
* @size: sizeof(struct iommu_hwpt_invalidate)
- * @hwpt_id: ID of a nested HWPT for cache invalidation
+ * @hwpt_id: ID of a nested HWPT or a vIOMMU, for cache invalidation
* @data_uptr: User pointer to an array of driver-specific cache invalidat=
ion
* data.
* @data_type: One of enum iommu_hwpt_invalidate_data_type, defining the d=
ata
@@ -682,8 +801,11 @@ struct iommu_hwpt_vtd_s1_invalidate {
* Output the number of requests successfully handled by kerne=
l.
* @__reserved: Must be 0.
*
- * Invalidate the iommu cache for user-managed page table. Modifications o=
n a
- * user-managed page table should be followed by this operation to sync ca=
che.
+ * Invalidate iommu cache for user-managed page table or vIOMMU. Modificat=
ions
+ * on a user-managed page table should be followed by this operation, if a=
HWPT
+ * is passed in via @hwpt_id. Other caches, such as device cache or descri=
ptor
+ * cache can be flushed if a vIOMMU is passed in via the @hwpt_id field.
+ *
* Each ioctl can support one or more cache invalidation requests in the a=
rray
* that has a total size of @entry_len * @entry_num.
*
@@ -797,4 +919,88 @@ struct iommu_fault_alloc {
__u32 out_fault_fd;
};
#define IOMMU_FAULT_QUEUE_ALLOC _IO(IOMMUFD_TYPE, IOMMUFD_CMD_FAULT_QUEUE_=
ALLOC)
+
+/**
+ * enum iommu_viommu_type - Virtual IOMMU Type
+ * @IOMMU_VIOMMU_TYPE_DEFAULT: Reserved for future use
+ * @IOMMU_VIOMMU_TYPE_ARM_SMMUV3: ARM SMMUv3 driver specific type
+ */
+enum iommu_viommu_type {
+ IOMMU_VIOMMU_TYPE_DEFAULT =3D 0,
+ IOMMU_VIOMMU_TYPE_ARM_SMMUV3 =3D 1,
+};
+
+/**
+ * struct iommu_viommu_alloc - ioctl(IOMMU_VIOMMU_ALLOC)
+ * @size: sizeof(struct iommu_viommu_alloc)
+ * @flags: Must be 0
+ * @type: Type of the virtual IOMMU. Must be defined in enum iommu_viommu_=
type
+ * @dev_id: The device's physical IOMMU will be used to back the virtual I=
OMMU
+ * @hwpt_id: ID of a nesting parent HWPT to associate to
+ * @out_viommu_id: Output virtual IOMMU ID for the allocated object
+ *
+ * Allocate a virtual IOMMU object, representing the underlying physical I=
OMMU's
+ * virtualization support that is a security-isolated slice of the real IO=
MMU HW
+ * that is unique to a specific VM. Operations global to the IOMMU are con=
nected
+ * to the vIOMMU, such as:
+ * - Security namespace for guest owned ID, e.g. guest-controlled cache ta=
gs
+ * - Non-device-affiliated event reporting, e.g. invalidation queue errors
+ * - Access to a sharable nesting parent pagetable across physical IOMMUs
+ * - Virtualization of various platforms IDs, e.g. RIDs and others
+ * - Delivery of paravirtualized invalidation
+ * - Direct assigned invalidation queues
+ * - Direct assigned interrupts
+ */
+struct iommu_viommu_alloc {
+ __u32 size;
+ __u32 flags;
+ __u32 type;
+ __u32 dev_id;
+ __u32 hwpt_id;
+ __u32 out_viommu_id;
+};
+#define IOMMU_VIOMMU_ALLOC _IO(IOMMUFD_TYPE, IOMMUFD_CMD_VIOMMU_ALLOC)
+
+/**
+ * struct iommu_vdevice_alloc - ioctl(IOMMU_VDEVICE_ALLOC)
+ * @size: sizeof(struct iommu_vdevice_alloc)
+ * @viommu_id: vIOMMU ID to associate with the virtual device
+ * @dev_id: The physical device to allocate a virtual instance on the vIOM=
MU
+ * @out_vdevice_id: Object handle for the vDevice. Pass to IOMMU_DESTORY
+ * @virt_id: Virtual device ID per vIOMMU, e.g. vSID of ARM SMMUv3, vDevic=
eID
+ * of AMD IOMMU, and vRID of a nested Intel VT-d to a Context Ta=
ble
+ *
+ * Allocate a virtual device instance (for a physical device) against a vI=
OMMU.
+ * This instance holds the device's information (related to its vIOMMU) in=
a VM.
+ */
+struct iommu_vdevice_alloc {
+ __u32 size;
+ __u32 viommu_id;
+ __u32 dev_id;
+ __u32 out_vdevice_id;
+ __aligned_u64 virt_id;
+};
+#define IOMMU_VDEVICE_ALLOC _IO(IOMMUFD_TYPE, IOMMUFD_CMD_VDEVICE_ALLOC)
+
+/**
+ * struct iommu_ioas_change_process - ioctl(VFIO_IOAS_CHANGE_PROCESS)
+ * @size: sizeof(struct iommu_ioas_change_process)
+ * @__reserved: Must be 0
+ *
+ * This transfers pinned memory counts for every memory map in every IOAS
+ * in the context to the current process. This only supports maps created
+ * with IOMMU_IOAS_MAP_FILE, and returns EINVAL if other maps are present.
+ * If the ioctl returns a failure status, then nothing is changed.
+ *
+ * This API is useful for transferring operation of a device from one proc=
ess
+ * to another, such as during userland live update.
+ */
+struct iommu_ioas_change_process {
+ __u32 size;
+ __u32 __reserved;
+};
+
+#define IOMMU_IOAS_CHANGE_PROCESS \
+ _IO(IOMMUFD_TYPE, IOMMUFD_CMD_IOAS_CHANGE_PROCESS)
+
#endif
diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h
index 49dd1b30ce..3bcd4eabe3 100644
--- a/linux-headers/linux/kvm.h
+++ b/linux-headers/linux/kvm.h
@@ -1150,7 +1150,15 @@ enum kvm_device_type {
#define KVM_DEV_TYPE_ARM_PV_TIME KVM_DEV_TYPE_ARM_PV_TIME
KVM_DEV_TYPE_RISCV_AIA,
#define KVM_DEV_TYPE_RISCV_AIA KVM_DEV_TYPE_RISCV_AIA
+ KVM_DEV_TYPE_LOONGARCH_IPI,
+#define KVM_DEV_TYPE_LOONGARCH_IPI KVM_DEV_TYPE_LOONGARCH_IPI
+ KVM_DEV_TYPE_LOONGARCH_EIOINTC,
+#define KVM_DEV_TYPE_LOONGARCH_EIOINTC KVM_DEV_TYPE_LOONGARCH_EIOINTC
+ KVM_DEV_TYPE_LOONGARCH_PCHPIC,
+#define KVM_DEV_TYPE_LOONGARCH_PCHPIC KVM_DEV_TYPE_LOONGARCH_PCHPIC
+
KVM_DEV_TYPE_MAX,
+
};
=20
struct kvm_vfio_spapr_tce {
diff --git a/linux-headers/linux/psci.h b/linux-headers/linux/psci.h
index 74f3cb5007..a982afd498 100644
--- a/linux-headers/linux/psci.h
+++ b/linux-headers/linux/psci.h
@@ -59,6 +59,7 @@
#define PSCI_1_1_FN_SYSTEM_RESET2 PSCI_0_2_FN(18)
#define PSCI_1_1_FN_MEM_PROTECT PSCI_0_2_FN(19)
#define PSCI_1_1_FN_MEM_PROTECT_CHECK_RANGE PSCI_0_2_FN(20)
+#define PSCI_1_3_FN_SYSTEM_OFF2 PSCI_0_2_FN(21)
=20
#define PSCI_1_0_FN64_CPU_DEFAULT_SUSPEND PSCI_0_2_FN64(12)
#define PSCI_1_0_FN64_NODE_HW_STATE PSCI_0_2_FN64(13)
@@ -68,6 +69,7 @@
=20
#define PSCI_1_1_FN64_SYSTEM_RESET2 PSCI_0_2_FN64(18)
#define PSCI_1_1_FN64_MEM_PROTECT_CHECK_RANGE PSCI_0_2_FN64(20)
+#define PSCI_1_3_FN64_SYSTEM_OFF2 PSCI_0_2_FN64(21)
=20
/* PSCI v0.2 power state encoding for CPU_SUSPEND function */
#define PSCI_0_2_POWER_STATE_ID_MASK 0xffff
@@ -100,6 +102,9 @@
#define PSCI_1_1_RESET_TYPE_SYSTEM_WARM_RESET 0
#define PSCI_1_1_RESET_TYPE_VENDOR_START 0x80000000U
=20
+/* PSCI v1.3 hibernate type for SYSTEM_OFF2 */
+#define PSCI_1_3_OFF_TYPE_HIBERNATE_OFF BIT(0)
+
/* PSCI version decoding (independent of PSCI version) */
#define PSCI_VERSION_MAJOR_SHIFT 16
#define PSCI_VERSION_MINOR_MASK \
diff --git a/linux-headers/linux/vfio.h b/linux-headers/linux/vfio.h
index b4be37b225..1b5e254d6a 100644
--- a/linux-headers/linux/vfio.h
+++ b/linux-headers/linux/vfio.h
@@ -35,7 +35,7 @@
#define VFIO_EEH 5
=20
/* Two-stage IOMMU */
-#define VFIO_TYPE1_NESTING_IOMMU 6 /* Implies v2 */
+#define __VFIO_RESERVED_TYPE1_NESTING_IOMMU 6 /* Implies v2 */
=20
#define VFIO_SPAPR_TCE_v2_IOMMU 7
=20
--=20
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To: qemu-devel@nongnu.org, qemu-s390x@nongnu.org, thuth@redhat.com
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Subject: [RFC PATCH v2 07/15] s390x/cpumodel: add Concurrent-functions
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The Concurrent-functions facility introduces the new instruction
Perform Functions with Concurrent Results (PFCR) with few subfunctions.
Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com>
Reviewed-by: Janosch Frank <frankja@linux.ibm.com>
---
target/s390x/cpu_features.c | 2 ++
target/s390x/cpu_features.h | 1 +
target/s390x/cpu_features_def.h.inc | 8 ++++++++
target/s390x/cpu_models.c | 5 +++++
target/s390x/gen-features.c | 13 +++++++++++++
target/s390x/kvm/kvm.c | 6 ++++++
6 files changed, 35 insertions(+)
diff --git a/target/s390x/cpu_features.c b/target/s390x/cpu_features.c
index 385a2ff860..5f8b02f12c 100644
--- a/target/s390x/cpu_features.c
+++ b/target/s390x/cpu_features.c
@@ -93,6 +93,7 @@ void s390_fill_feat_block(const S390FeatBitmap features, =
S390FeatType type,
case S390_FEAT_TYPE_KDSA:
case S390_FEAT_TYPE_SORTL:
case S390_FEAT_TYPE_DFLTCC:
+ case S390_FEAT_TYPE_PFCR:
set_be_bit(0, data); /* query is always available */
break;
default:
@@ -263,6 +264,7 @@ static S390FeatGroupDef s390_feature_groups[] =3D {
FEAT_GROUP_INIT("mepochptff", MULTIPLE_EPOCH_PTFF, "PTFF enhancements =
introduced with Multiple-epoch facility"),
FEAT_GROUP_INIT("esort", ENH_SORT, "Enhanced-sort facility"),
FEAT_GROUP_INIT("deflate", DEFLATE_CONVERSION, "Deflate-conversion fac=
ility"),
+ FEAT_GROUP_INIT("ccf", CONCURRENT_FUNCTIONS, "Concurrent-functions fac=
ility"),
};
=20
const S390FeatGroupDef *s390_feat_group_def(S390FeatGroup group)
diff --git a/target/s390x/cpu_features.h b/target/s390x/cpu_features.h
index 661a8cd6db..5635839d03 100644
--- a/target/s390x/cpu_features.h
+++ b/target/s390x/cpu_features.h
@@ -44,6 +44,7 @@ typedef enum {
S390_FEAT_TYPE_SORTL,
S390_FEAT_TYPE_DFLTCC,
S390_FEAT_TYPE_UV_FEAT_GUEST,
+ S390_FEAT_TYPE_PFCR,
} S390FeatType;
=20
/* Definition of a CPU feature */
diff --git a/target/s390x/cpu_features_def.h.inc b/target/s390x/cpu_feature=
s_def.h.inc
index f96cb5a7d8..09872ab3d8 100644
--- a/target/s390x/cpu_features_def.h.inc
+++ b/target/s390x/cpu_features_def.h.inc
@@ -116,6 +116,7 @@ DEF_FEAT(BEAR_ENH, "beareh", STFL, 193, "BEAR-enhanceme=
nt facility")
DEF_FEAT(RDP, "rdp", STFL, 194, "Reset-DAT-protection facility")
DEF_FEAT(PAI, "pai", STFL, 196, "Processor-Activity-Instrumentation facili=
ty")
DEF_FEAT(PAIE, "paie", STFL, 197, "Processor-Activity-Instrumentation exte=
nsion-1")
+DEF_FEAT(CCF_BASE, "ccf-base", STFL, 201, "Concurrent-Functions facility")
=20
/* Features exposed via SCLP SCCB Byte 80 - 98 (bit numbers relative to b=
yte-80) */
DEF_FEAT(SIE_GSLS, "gsls", SCLP_CONF_CHAR, 40, "SIE: Guest-storage-limit-s=
uppression facility")
@@ -413,3 +414,10 @@ DEF_FEAT(DEFLATE_F0, "dfltcc-f0", DFLTCC, 192, "DFLTCC=
format 0 parameter-block"
/* Features exposed via the UV-CALL instruction */
DEF_FEAT(UV_FEAT_AP, "appv", UV_FEAT_GUEST, 4, "AP instructions installed =
for secure guests")
DEF_FEAT(UV_FEAT_AP_INTR, "appvi", UV_FEAT_GUEST, 5, "AP instructions inte=
rruption support for secure guests")
+
+/* Features exposed via the PFCR instruction (concurrent-functions facilit=
y). */
+DEF_FEAT(PFCR_QAF, "pfcr-qaf", PFCR, 0, "PFCR Query-Available-Functions")
+DEF_FEAT(PFCR_CSDST, "pfcr-csdst", PFCR, 1, "PFCR Compare-and-Swap-and-Dou=
ble-Store (32)")
+DEF_FEAT(PFCR_CSDSTG, "pfcr-csdstg", PFCR, 2, "PFCR Compare-and-Swap-and-D=
ouble-Store (64)")
+DEF_FEAT(PFCR_CSTST, "pfcr-cstst", PFCR, 3, "PFCR Compare-and-Swap-and-Tri=
ple-Store (32)")
+DEF_FEAT(PFCR_CSTSTG, "pfcr-cststg", PFCR, 4, "PFCR Compare-and-Swap-and-T=
riple-Store (64)")
diff --git a/target/s390x/cpu_models.c b/target/s390x/cpu_models.c
index a62a3c3771..117434b9a8 100644
--- a/target/s390x/cpu_models.c
+++ b/target/s390x/cpu_models.c
@@ -504,6 +504,11 @@ static void check_consistency(const S390CPUModel *mode=
l)
{ S390_FEAT_RDP, S390_FEAT_LOCAL_TLB_CLEARING },
{ S390_FEAT_UV_FEAT_AP, S390_FEAT_AP },
{ S390_FEAT_UV_FEAT_AP_INTR, S390_FEAT_UV_FEAT_AP },
+ { S390_FEAT_PFCR_QAF, S390_FEAT_CCF_BASE },
+ { S390_FEAT_PFCR_CSDST, S390_FEAT_CCF_BASE },
+ { S390_FEAT_PFCR_CSDSTG, S390_FEAT_CCF_BASE },
+ { S390_FEAT_PFCR_CSTST, S390_FEAT_CCF_BASE },
+ { S390_FEAT_PFCR_CSTSTG, S390_FEAT_CCF_BASE },
};
int i;
=20
diff --git a/target/s390x/gen-features.c b/target/s390x/gen-features.c
index 302b653214..6d00ffcda7 100644
--- a/target/s390x/gen-features.c
+++ b/target/s390x/gen-features.c
@@ -308,6 +308,14 @@
S390_FEAT_DEFLATE_XPND, \
S390_FEAT_DEFLATE_F0
=20
+#define S390_FEAT_GROUP_CONCURRENT_FUNCTIONS \
+ S390_FEAT_CCF_BASE, \
+ S390_FEAT_PFCR_QAF, \
+ S390_FEAT_PFCR_CSDST, \
+ S390_FEAT_PFCR_CSDSTG, \
+ S390_FEAT_PFCR_CSTST, \
+ S390_FEAT_PFCR_CSTSTG
+
/* cpu feature groups */
static uint16_t group_PLO[] =3D {
S390_FEAT_GROUP_PLO,
@@ -398,6 +406,10 @@ static uint16_t group_DEFLATE_CONVERSION[] =3D {
S390_FEAT_GROUP_DEFLATE_CONVERSION,
};
=20
+static uint16_t group_CONCURRENT_FUNCTIONS[] =3D {
+ S390_FEAT_GROUP_CONCURRENT_FUNCTIONS,
+};
+
/* Base features (in order of release)
* Only non-hypervisor managed features belong here.
* Base feature sets are static meaning they do not change in future QEMU
@@ -948,6 +960,7 @@ static FeatGroupDefSpec FeatGroupDef[] =3D {
FEAT_GROUP_INITIALIZER(MULTIPLE_EPOCH_PTFF),
FEAT_GROUP_INITIALIZER(ENH_SORT),
FEAT_GROUP_INITIALIZER(DEFLATE_CONVERSION),
+ FEAT_GROUP_INITIALIZER(CONCURRENT_FUNCTIONS),
};
=20
#define QEMU_FEAT_INITIALIZER(_name) \
diff --git a/target/s390x/kvm/kvm.c b/target/s390x/kvm/kvm.c
index 8ffe0159d8..dd0322c43a 100644
--- a/target/s390x/kvm/kvm.c
+++ b/target/s390x/kvm/kvm.c
@@ -2195,6 +2195,9 @@ static int query_cpu_subfunc(S390FeatBitmap features)
if (test_bit(S390_FEAT_DEFLATE_BASE, features)) {
s390_add_from_feat_block(features, S390_FEAT_TYPE_DFLTCC, prop.dfl=
tcc);
}
+ if (test_bit(S390_FEAT_CCF_BASE, features)) {
+ s390_add_from_feat_block(features, S390_FEAT_TYPE_PFCR, prop.pfcr);
+ }
return 0;
}
=20
@@ -2248,6 +2251,9 @@ static int configure_cpu_subfunc(const S390FeatBitmap=
features)
if (test_bit(S390_FEAT_DEFLATE_BASE, features)) {
s390_fill_feat_block(features, S390_FEAT_TYPE_DFLTCC, prop.dfltcc);
}
+ if (test_bit(S390_FEAT_CCF_BASE, features)) {
+ s390_fill_feat_block(features, S390_FEAT_TYPE_PFCR, prop.pfcr);
+ }
return kvm_vm_ioctl(kvm_state, KVM_SET_DEVICE_ATTR, &attr);
}
=20
--=20
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From: Hendrik Brueckner <brueckner@linux.ibm.com>
To: qemu-devel@nongnu.org, qemu-s390x@nongnu.org, thuth@redhat.com
Cc: nsg@linux.ibm.com, frankja@linux.ibm.com, mimu@linux.ibm.com,
borntraeger@linux.ibm.com, Hendrik Brueckner <brueckner@linux.ibm.com>
Subject: [RFC PATCH v2 08/15] s390x/cpumodel: add Vector Enhancements facility
3
Date: Fri, 6 Dec 2024 13:27:44 +0100
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The Vector Enhancements facility 3 introduces new instructions and
extends support for doubleword/quadword elements.
Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com>
Reviewed-by: Janosch Frank <frankja@linux.ibm.com>
---
target/s390x/cpu_features_def.h.inc | 1 +
target/s390x/cpu_models.c | 2 ++
2 files changed, 3 insertions(+)
diff --git a/target/s390x/cpu_features_def.h.inc b/target/s390x/cpu_feature=
s_def.h.inc
index 09872ab3d8..0b7be0e6e9 100644
--- a/target/s390x/cpu_features_def.h.inc
+++ b/target/s390x/cpu_features_def.h.inc
@@ -116,6 +116,7 @@ DEF_FEAT(BEAR_ENH, "beareh", STFL, 193, "BEAR-enhanceme=
nt facility")
DEF_FEAT(RDP, "rdp", STFL, 194, "Reset-DAT-protection facility")
DEF_FEAT(PAI, "pai", STFL, 196, "Processor-Activity-Instrumentation facili=
ty")
DEF_FEAT(PAIE, "paie", STFL, 197, "Processor-Activity-Instrumentation exte=
nsion-1")
+DEF_FEAT(VECTOR_ENH3, "vxeh3", STFL, 198, "Vector Enhancements facility 3")
DEF_FEAT(CCF_BASE, "ccf-base", STFL, 201, "Concurrent-Functions facility")
=20
/* Features exposed via SCLP SCCB Byte 80 - 98 (bit numbers relative to b=
yte-80) */
diff --git a/target/s390x/cpu_models.c b/target/s390x/cpu_models.c
index 117434b9a8..5d548de79c 100644
--- a/target/s390x/cpu_models.c
+++ b/target/s390x/cpu_models.c
@@ -458,6 +458,8 @@ static void check_consistency(const S390CPUModel *model)
{ S390_FEAT_VECTOR_PACKED_DECIMAL_ENH, S390_FEAT_VECTOR_PACKED_DEC=
IMAL },
{ S390_FEAT_VECTOR_PACKED_DECIMAL_ENH2, S390_FEAT_VECTOR_PACKED_DE=
CIMAL_ENH },
{ S390_FEAT_VECTOR_ENH, S390_FEAT_VECTOR },
+ { S390_FEAT_VECTOR_ENH2, S390_FEAT_VECTOR_ENH },
+ { S390_FEAT_VECTOR_ENH3, S390_FEAT_VECTOR_ENH2 },
{ S390_FEAT_INSTRUCTION_EXEC_PROT, S390_FEAT_SIDE_EFFECT_ACCESS_ES=
OP2 },
{ S390_FEAT_SIDE_EFFECT_ACCESS_ESOP2, S390_FEAT_ESOP },
{ S390_FEAT_CMM_NT, S390_FEAT_CMM },
--=20
2.43.5
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From: Hendrik Brueckner <brueckner@linux.ibm.com>
To: qemu-devel@nongnu.org, qemu-s390x@nongnu.org, thuth@redhat.com
Cc: nsg@linux.ibm.com, frankja@linux.ibm.com, mimu@linux.ibm.com,
borntraeger@linux.ibm.com, Hendrik Brueckner <brueckner@linux.ibm.com>
Subject: [RFC PATCH v2 09/15] s390x/cpumodel: add
Miscellaneous-Instruction-Extensions Facility 4
Date: Fri, 6 Dec 2024 13:27:45 +0100
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This facility introduces few new instructions.
Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com>
Reviewed-by: Janosch Frank <frankja@linux.ibm.com>
---
target/s390x/cpu_features_def.h.inc | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/s390x/cpu_features_def.h.inc b/target/s390x/cpu_feature=
s_def.h.inc
index 0b7be0e6e9..8be2e0e46d 100644
--- a/target/s390x/cpu_features_def.h.inc
+++ b/target/s390x/cpu_features_def.h.inc
@@ -90,6 +90,7 @@ DEF_FEAT(EDAT_2, "edat2", STFL, 78, "Enhanced-DAT facilit=
y 2")
DEF_FEAT(DFP_PACKED_CONVERSION, "dfppc", STFL, 80, "Decimal-floating-point=
packed-conversion facility")
DEF_FEAT(PPA15, "ppa15", STFL, 81, "PPA15 is installed")
DEF_FEAT(BPB, "bpb", STFL, 82, "Branch prediction blocking")
+DEF_FEAT(MISC_INSTRUCTION_EXT4, "minste4", STFL, 84, "Miscellaneous-Instru=
ction-Extensions Facility 4")
DEF_FEAT(MSA_EXT_12, "msa12-base", STFL, 86, "Message-security-assist-exte=
nsion-12 facility (excluding subfunctions)")
DEF_FEAT(VECTOR, "vx", STFL, 129, "Vector facility")
DEF_FEAT(INSTRUCTION_EXEC_PROT, "iep", STFL, 130, "Instruction-execution-p=
rotection facility")
--=20
2.43.5
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From: Hendrik Brueckner <brueckner@linux.ibm.com>
To: qemu-devel@nongnu.org, qemu-s390x@nongnu.org, thuth@redhat.com
Cc: nsg@linux.ibm.com, frankja@linux.ibm.com, mimu@linux.ibm.com,
borntraeger@linux.ibm.com, Hendrik Brueckner <brueckner@linux.ibm.com>
Subject: [RFC PATCH v2 10/15] s390x/cpumodel: add
Vector-Packed-Decimal-Enhancement facility 3
Date: Fri, 6 Dec 2024 13:27:46 +0100
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This facility introduces new capabilities for the signed-pack-decimal
format.
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Reviewed-by: Janosch Frank <frankja@linux.ibm.com>
---
target/s390x/cpu_features_def.h.inc | 1 +
target/s390x/cpu_models.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/target/s390x/cpu_features_def.h.inc b/target/s390x/cpu_feature=
s_def.h.inc
index 8be2e0e46d..df154d145f 100644
--- a/target/s390x/cpu_features_def.h.inc
+++ b/target/s390x/cpu_features_def.h.inc
@@ -118,6 +118,7 @@ DEF_FEAT(RDP, "rdp", STFL, 194, "Reset-DAT-protection f=
acility")
DEF_FEAT(PAI, "pai", STFL, 196, "Processor-Activity-Instrumentation facili=
ty")
DEF_FEAT(PAIE, "paie", STFL, 197, "Processor-Activity-Instrumentation exte=
nsion-1")
DEF_FEAT(VECTOR_ENH3, "vxeh3", STFL, 198, "Vector Enhancements facility 3")
+DEF_FEAT(VECTOR_PACKED_DECIMAL_ENH3, "vxpdeh3", STFL, 199, "Vector-Packed-=
Decimal-Enhancement facility 3")
DEF_FEAT(CCF_BASE, "ccf-base", STFL, 201, "Concurrent-Functions facility")
=20
/* Features exposed via SCLP SCCB Byte 80 - 98 (bit numbers relative to b=
yte-80) */
diff --git a/target/s390x/cpu_models.c b/target/s390x/cpu_models.c
index 5d548de79c..6a7ce77d9a 100644
--- a/target/s390x/cpu_models.c
+++ b/target/s390x/cpu_models.c
@@ -457,6 +457,7 @@ static void check_consistency(const S390CPUModel *model)
{ S390_FEAT_VECTOR_PACKED_DECIMAL, S390_FEAT_VECTOR },
{ S390_FEAT_VECTOR_PACKED_DECIMAL_ENH, S390_FEAT_VECTOR_PACKED_DEC=
IMAL },
{ S390_FEAT_VECTOR_PACKED_DECIMAL_ENH2, S390_FEAT_VECTOR_PACKED_DE=
CIMAL_ENH },
+ { S390_FEAT_VECTOR_PACKED_DECIMAL_ENH3, S390_FEAT_VECTOR_PACKED_DE=
CIMAL_ENH2 },
{ S390_FEAT_VECTOR_ENH, S390_FEAT_VECTOR },
{ S390_FEAT_VECTOR_ENH2, S390_FEAT_VECTOR_ENH },
{ S390_FEAT_VECTOR_ENH3, S390_FEAT_VECTOR_ENH2 },
--=20
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From: Hendrik Brueckner <brueckner@linux.ibm.com>
To: qemu-devel@nongnu.org, qemu-s390x@nongnu.org, thuth@redhat.com
Cc: nsg@linux.ibm.com, frankja@linux.ibm.com, mimu@linux.ibm.com,
borntraeger@linux.ibm.com, Hendrik Brueckner <brueckner@linux.ibm.com>
Subject: [RFC PATCH v2 11/15] s390x/cpumodel: add
Ineffective-nonconstrained-transaction facility
Date: Fri, 6 Dec 2024 13:27:47 +0100
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This facility indicates reduced support for noncontrained
transactional-execution.
Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com>
Reviewed-by: Janosch Frank <frankja@linux.ibm.com>
---
target/s390x/cpu_features_def.h.inc | 1 +
target/s390x/cpu_models.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/target/s390x/cpu_features_def.h.inc b/target/s390x/cpu_feature=
s_def.h.inc
index df154d145f..2c1d1cd98a 100644
--- a/target/s390x/cpu_features_def.h.inc
+++ b/target/s390x/cpu_features_def.h.inc
@@ -112,6 +112,7 @@ DEF_FEAT(MSA_EXT_9, "msa9-base", STFL, 155, "Message-se=
curity-assist-extension-9
DEF_FEAT(ETOKEN, "etoken", STFL, 156, "Etoken facility")
DEF_FEAT(UNPACK, "unpack", STFL, 161, "Unpack facility")
DEF_FEAT(NNPA, "nnpa", STFL, 165, "NNPA facility")
+DEF_FEAT(INEFF_NC_TX, "ineff_nc_tx", STFL, 170, "Ineffective-nonconstraine=
d-transaction facility")
DEF_FEAT(VECTOR_PACKED_DECIMAL_ENH2, "vxpdeh2", STFL, 192, "Vector-Packed-=
Decimal-Enhancement facility 2")
DEF_FEAT(BEAR_ENH, "beareh", STFL, 193, "BEAR-enhancement facility")
DEF_FEAT(RDP, "rdp", STFL, 194, "Reset-DAT-protection facility")
diff --git a/target/s390x/cpu_models.c b/target/s390x/cpu_models.c
index 6a7ce77d9a..7fa1712d78 100644
--- a/target/s390x/cpu_models.c
+++ b/target/s390x/cpu_models.c
@@ -512,6 +512,7 @@ static void check_consistency(const S390CPUModel *model)
{ S390_FEAT_PFCR_CSDSTG, S390_FEAT_CCF_BASE },
{ S390_FEAT_PFCR_CSTST, S390_FEAT_CCF_BASE },
{ S390_FEAT_PFCR_CSTSTG, S390_FEAT_CCF_BASE },
+ { S390_FEAT_INEFF_NC_TX, S390_FEAT_TRANSACTIONAL_EXE },
};
int i;
=20
--=20
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From: Hendrik Brueckner <brueckner@linux.ibm.com>
To: qemu-devel@nongnu.org, qemu-s390x@nongnu.org, thuth@redhat.com
Cc: nsg@linux.ibm.com, frankja@linux.ibm.com, mimu@linux.ibm.com,
borntraeger@linux.ibm.com, Hendrik Brueckner <brueckner@linux.ibm.com>
Subject: [RFC PATCH v2 12/15] s390x/cpumodel: Add
Sequential-Instruction-Fetching facility
Date: Fri, 6 Dec 2024 13:27:48 +0100
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The sequential instruction fetching facility provides few guarantees,
for example, to avoid stop machine calls on enabling/disabling kprobes.
Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com>
Reviewed-by: Janosch Frank <frankja@linux.ibm.com>
---
target/s390x/cpu_features_def.h.inc | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/s390x/cpu_features_def.h.inc b/target/s390x/cpu_feature=
s_def.h.inc
index 2c1d1cd98a..09a80844a7 100644
--- a/target/s390x/cpu_features_def.h.inc
+++ b/target/s390x/cpu_features_def.h.inc
@@ -91,6 +91,7 @@ DEF_FEAT(DFP_PACKED_CONVERSION, "dfppc", STFL, 80, "Decim=
al-floating-point packe
DEF_FEAT(PPA15, "ppa15", STFL, 81, "PPA15 is installed")
DEF_FEAT(BPB, "bpb", STFL, 82, "Branch prediction blocking")
DEF_FEAT(MISC_INSTRUCTION_EXT4, "minste4", STFL, 84, "Miscellaneous-Instru=
ction-Extensions Facility 4")
+DEF_FEAT(SIF, "sif", STFL, 85, "Sequential-instruction-fetching facility")
DEF_FEAT(MSA_EXT_12, "msa12-base", STFL, 86, "Message-security-assist-exte=
nsion-12 facility (excluding subfunctions)")
DEF_FEAT(VECTOR, "vx", STFL, 129, "Vector facility")
DEF_FEAT(INSTRUCTION_EXEC_PROT, "iep", STFL, 130, "Instruction-execution-p=
rotection facility")
--=20
2.43.5
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From: Hendrik Brueckner <brueckner@linux.ibm.com>
To: qemu-devel@nongnu.org, qemu-s390x@nongnu.org, thuth@redhat.com
Cc: nsg@linux.ibm.com, frankja@linux.ibm.com, mimu@linux.ibm.com,
borntraeger@linux.ibm.com, Hendrik Brueckner <brueckner@linux.ibm.com>
Subject: [RFC PATCH v2 13/15] s390x/cpumodel: correct PLO feature wording
Date: Fri, 6 Dec 2024 13:27:49 +0100
Message-ID: <20241206122751.189721-14-brueckner@linux.ibm.com>
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The PLO functions 0, 4, 8, 12, 16, and 20 use 32-bit registers
values. The plo-*gr variants use 64-bit instead and, thus, correct
the wording.
Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com>
Reviewed-by: Janosch Frank <frankja@linux.ibm.com>
---
target/s390x/cpu_features_def.h.inc | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/target/s390x/cpu_features_def.h.inc b/target/s390x/cpu_feature=
s_def.h.inc
index 09a80844a7..fe7e1bd19c 100644
--- a/target/s390x/cpu_features_def.h.inc
+++ b/target/s390x/cpu_features_def.h.inc
@@ -158,27 +158,27 @@ DEF_FEAT(AP, "ap", MISC, 0, "AP instructions installe=
d")
/* Features exposed via the PLO instruction. */
DEF_FEAT(PLO_CL, "plo-cl", PLO, 0, "PLO Compare and load (32 bit in genera=
l registers)")
DEF_FEAT(PLO_CLG, "plo-clg", PLO, 1, "PLO Compare and load (64 bit in para=
meter list)")
-DEF_FEAT(PLO_CLGR, "plo-clgr", PLO, 2, "PLO Compare and load (32 bit in ge=
neral registers)")
+DEF_FEAT(PLO_CLGR, "plo-clgr", PLO, 2, "PLO Compare and load (64 bit in ge=
neral registers)")
DEF_FEAT(PLO_CLX, "plo-clx", PLO, 3, "PLO Compare and load (128 bit in par=
ameter list)")
DEF_FEAT(PLO_CS, "plo-cs", PLO, 4, "PLO Compare and swap (32 bit in genera=
l registers)")
DEF_FEAT(PLO_CSG, "plo-csg", PLO, 5, "PLO Compare and swap (64 bit in para=
meter list)")
-DEF_FEAT(PLO_CSGR, "plo-csgr", PLO, 6, "PLO Compare and swap (32 bit in ge=
neral registers)")
+DEF_FEAT(PLO_CSGR, "plo-csgr", PLO, 6, "PLO Compare and swap (64 bit in ge=
neral registers)")
DEF_FEAT(PLO_CSX, "plo-csx", PLO, 7, "PLO Compare and swap (128 bit in par=
ameter list)")
DEF_FEAT(PLO_DCS, "plo-dcs", PLO, 8, "PLO Double compare and swap (32 bit =
in general registers)")
DEF_FEAT(PLO_DCSG, "plo-dcsg", PLO, 9, "PLO Double compare and swap (64 bi=
t in parameter list)")
-DEF_FEAT(PLO_DCSGR, "plo-dcsgr", PLO, 10, "PLO Double compare and swap (32=
bit in general registers)")
+DEF_FEAT(PLO_DCSGR, "plo-dcsgr", PLO, 10, "PLO Double compare and swap (64=
bit in general registers)")
DEF_FEAT(PLO_DCSX, "plo-dcsx", PLO, 11, "PLO Double compare and swap (128 =
bit in parameter list)")
DEF_FEAT(PLO_CSST, "plo-csst", PLO, 12, "PLO Compare and swap and store (3=
2 bit in general registers)")
DEF_FEAT(PLO_CSSTG, "plo-csstg", PLO, 13, "PLO Compare and swap and store =
(64 bit in parameter list)")
-DEF_FEAT(PLO_CSSTGR, "plo-csstgr", PLO, 14, "PLO Compare and swap and stor=
e (32 bit in general registers)")
+DEF_FEAT(PLO_CSSTGR, "plo-csstgr", PLO, 14, "PLO Compare and swap and stor=
e (64 bit in general registers)")
DEF_FEAT(PLO_CSSTX, "plo-csstx", PLO, 15, "PLO Compare and swap and store =
(128 bit in parameter list)")
DEF_FEAT(PLO_CSDST, "plo-csdst", PLO, 16, "PLO Compare and swap and double=
store (32 bit in general registers)")
DEF_FEAT(PLO_CSDSTG, "plo-csdstg", PLO, 17, "PLO Compare and swap and doub=
le store (64 bit in parameter list)")
-DEF_FEAT(PLO_CSDSTGR, "plo-csdstgr", PLO, 18, "PLO Compare and swap and do=
uble store (32 bit in general registers)")
+DEF_FEAT(PLO_CSDSTGR, "plo-csdstgr", PLO, 18, "PLO Compare and swap and do=
uble store (64 bit in general registers)")
DEF_FEAT(PLO_CSDSTX, "plo-csdstx", PLO, 19, "PLO Compare and swap and doub=
le store (128 bit in parameter list)")
DEF_FEAT(PLO_CSTST, "plo-cstst", PLO, 20, "PLO Compare and swap and triple=
store (32 bit in general registers)")
DEF_FEAT(PLO_CSTSTG, "plo-cststg", PLO, 21, "PLO Compare and swap and trip=
le store (64 bit in parameter list)")
-DEF_FEAT(PLO_CSTSTGR, "plo-cststgr", PLO, 22, "PLO Compare and swap and tr=
iple store (32 bit in general registers)")
+DEF_FEAT(PLO_CSTSTGR, "plo-cststgr", PLO, 22, "PLO Compare and swap and tr=
iple store (64 bit in general registers)")
DEF_FEAT(PLO_CSTSTX, "plo-cststx", PLO, 23, "PLO Compare and swap and trip=
le store (128 bit in parameter list)")
=20
/* Features exposed via the PTFF instruction. */
--=20
2.43.5
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From: Hendrik Brueckner <brueckner@linux.ibm.com>
To: qemu-devel@nongnu.org, qemu-s390x@nongnu.org, thuth@redhat.com
Cc: nsg@linux.ibm.com, frankja@linux.ibm.com, mimu@linux.ibm.com,
borntraeger@linux.ibm.com, Hendrik Brueckner <brueckner@linux.ibm.com>
Subject: [RFC PATCH v2 14/15] s390x/cpumodel: Add PLO-extension facility
Date: Fri, 6 Dec 2024 13:27:50 +0100
Message-ID: <20241206122751.189721-15-brueckner@linux.ibm.com>
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The PLO-extension facility introduces numerous locking related
subfunctions.
Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com>
Reviewed-by: Janosch Frank <frankja@linux.ibm.com>
---
target/s390x/cpu_features.c | 1 +
target/s390x/cpu_features_def.h.inc | 39 +++++++++++++++++++++++++
target/s390x/cpu_models.c | 38 ++++++++++++++++++++++++
target/s390x/gen-features.c | 45 +++++++++++++++++++++++++++++
4 files changed, 123 insertions(+)
diff --git a/target/s390x/cpu_features.c b/target/s390x/cpu_features.c
index 5f8b02f12c..4b5be6798e 100644
--- a/target/s390x/cpu_features.c
+++ b/target/s390x/cpu_features.c
@@ -240,6 +240,7 @@ void s390_get_deprecated_features(S390FeatBitmap featur=
es)
/* indexed by feature group number for easy lookup */
static S390FeatGroupDef s390_feature_groups[] =3D {
FEAT_GROUP_INIT("plo", PLO, "Perform-locked-operation facility"),
+ FEAT_GROUP_INIT("plo_ext", PLO_EXT, "PLO-extension facility"),
FEAT_GROUP_INIT("tods", TOD_CLOCK_STEERING, "Tod-clock-steering facili=
ty"),
FEAT_GROUP_INIT("gen13ptff", GEN13_PTFF, "PTFF enhancements introduced=
with z13"),
FEAT_GROUP_INIT("gen17ptff", GEN17_PTFF, "PTFF enhancements introduced=
with gen17"),
diff --git a/target/s390x/cpu_features_def.h.inc b/target/s390x/cpu_feature=
s_def.h.inc
index fe7e1bd19c..e23e603a79 100644
--- a/target/s390x/cpu_features_def.h.inc
+++ b/target/s390x/cpu_features_def.h.inc
@@ -93,6 +93,7 @@ DEF_FEAT(BPB, "bpb", STFL, 82, "Branch prediction blockin=
g")
DEF_FEAT(MISC_INSTRUCTION_EXT4, "minste4", STFL, 84, "Miscellaneous-Instru=
ction-Extensions Facility 4")
DEF_FEAT(SIF, "sif", STFL, 85, "Sequential-instruction-fetching facility")
DEF_FEAT(MSA_EXT_12, "msa12-base", STFL, 86, "Message-security-assist-exte=
nsion-12 facility (excluding subfunctions)")
+DEF_FEAT(PLO_EXT, "plo-ext", STFL, 87, "PLO-extension facility")
DEF_FEAT(VECTOR, "vx", STFL, 129, "Vector facility")
DEF_FEAT(INSTRUCTION_EXEC_PROT, "iep", STFL, 130, "Instruction-execution-p=
rotection facility")
DEF_FEAT(SIDE_EFFECT_ACCESS_ESOP2, "sea_esop2", STFL, 131, "Side-effect-ac=
cess facility and Enhanced-suppression-on-protection facility 2")
@@ -180,6 +181,44 @@ DEF_FEAT(PLO_CSTST, "plo-cstst", PLO, 20, "PLO Compare=
and swap and triple store
DEF_FEAT(PLO_CSTSTG, "plo-cststg", PLO, 21, "PLO Compare and swap and trip=
le store (64 bit in parameter list)")
DEF_FEAT(PLO_CSTSTGR, "plo-cststgr", PLO, 22, "PLO Compare and swap and tr=
iple store (64 bit in general registers)")
DEF_FEAT(PLO_CSTSTX, "plo-cststx", PLO, 23, "PLO Compare and swap and trip=
le store (128 bit in parameter list)")
+DEF_FEAT(PLO_CLO, "plo-clo", PLO, 24, "PLO Compare and load (256 bit in pa=
rameter list)")
+DEF_FEAT(PLO_CSO, "plo-cso", PLO, 25, "PLO Compare and swap (256 bit in pa=
rameter list)")
+DEF_FEAT(PLO_DCSO, "plo-dcso", PLO, 26, "PLO Double compare and swap (256 =
bit in parameter list)")
+DEF_FEAT(PLO_CSSTO, "plo-cssto", PLO, 27, "PLO Compare and swap and store =
(256 bit in parameter list)")
+DEF_FEAT(PLO_CSDSTO, "plo-csdsto", PLO, 28, "PLO Compare and swap and doub=
le store (256 bit in parameter list)")
+DEF_FEAT(PLO_CSTSTO, "plo-cststo", PLO, 29, "PLO Compare and swap and trib=
le store (256 bit in parameter list)")
+DEF_FEAT(PLO_TCS, "plo-tcs", PLO, 30, "Triple compare and swap (32 bit in =
parameter list)")
+DEF_FEAT(PLO_TCSG, "plo-tcsg", PLO, 31, "Triple compare and swap (64 bit i=
n parameter list)")
+DEF_FEAT(PLO_TCSX, "plo-tcsx", PLO, 32, "Triple compare and swap (128 bit =
in parameter list)")
+DEF_FEAT(PLO_TCSO, "plo-tcso", PLO, 33, "Triple compare and swap (256 bit =
in parameter list)")
+DEF_FEAT(PLO_QCS, "plo-qcs", PLO, 34, "Quadruple compare and swap (32 bit =
in parameter list)")
+DEF_FEAT(PLO_QCSG, "plo-qcsg", PLO, 35, "Quadruple compare and swap (64 bi=
t in parameter list)")
+DEF_FEAT(PLO_QCSX, "plo-qcsx", PLO, 36, "Quadruple compare and swap (128 b=
it in parameter list)")
+DEF_FEAT(PLO_QCSO, "plo-qcso", PLO, 37, "Quadruple compare and swap (256 b=
it in parameter list)")
+DEF_FEAT(PLO_LO, "plo-lo", PLO, 38, "Load (256 bit in parameter list)")
+DEF_FEAT(PLO_DLX, "plo-dlx", PLO, 39, "Double load (128 bit in parameter l=
ist)")
+DEF_FEAT(PLO_DLO, "plo-dlo", PLO, 40, "Double load (256 bit in parameter l=
ist)")
+DEF_FEAT(PLO_TL, "plo-tl", PLO, 41, "Triple load (32 bit in parameter list=
)")
+DEF_FEAT(PLO_TLG, "plo-tlg", PLO, 42, "Triple load (64 bit in parameter li=
st)")
+DEF_FEAT(PLO_TLX, "plo-tlx", PLO, 43, "Triple load (128 bit in parameter l=
ist)")
+DEF_FEAT(PLO_TLO, "plo-tlo", PLO, 44, "Triple load (256 bit in parameter l=
ist)")
+DEF_FEAT(PLO_QL, "plo-ql", PLO, 45, "Quadruple load (32 bit in parameter l=
ist)")
+DEF_FEAT(PLO_QLG, "plo-qlg", PLO, 46, "Quadruple load (64 bit in parameter=
list)")
+DEF_FEAT(PLO_QLX, "plo-qlx", PLO, 47, "Quadruple load (128 bit in paramete=
r list)")
+DEF_FEAT(PLO_QLO, "plo-qlo", PLO, 48, "Quadruple load (256 bit in paramete=
r list)")
+DEF_FEAT(PLO_STO, "plo-sto", PLO, 49, "Store (256 bit in parameter list)")
+DEF_FEAT(PLO_DST, "plo-dst", PLO, 50, "Double store (32 bit in parameter l=
ist)")
+DEF_FEAT(PLO_DSTG, "plo-dstg", PLO, 51, "Double store (64 bit in parameter=
list)")
+DEF_FEAT(PLO_DSTX, "plo-dstx", PLO, 52, "Double store (128 bit in paramete=
r list)")
+DEF_FEAT(PLO_DSTO, "plo-dsto", PLO, 53, "Double store (256 bit in paramete=
r list)")
+DEF_FEAT(PLO_TST, "plo-tst", PLO, 54, "Triple store (32 bit in parameter l=
ist)")
+DEF_FEAT(PLO_TSTG, "plo-tstg", PLO, 55, "Triple store (64 bit in parameter=
list)")
+DEF_FEAT(PLO_TSTX, "plo-tstx", PLO, 56, "Triple store (128 bit in paramete=
r list)")
+DEF_FEAT(PLO_TSTO, "plo-tsto", PLO, 57, "Triple store (256 bit in paramete=
r list)")
+DEF_FEAT(PLO_QST, "plo-qst", PLO, 58, "Quadruple store (32 bit in paramete=
r list)")
+DEF_FEAT(PLO_QSTG, "plo-qstg", PLO, 59, "Quadruple store (64 bit in parame=
ter list)")
+DEF_FEAT(PLO_QSTX, "plo-qstx", PLO, 60, "Quadruple store (128 bit in param=
eter list)")
+DEF_FEAT(PLO_QSTO, "plo-qsto", PLO, 61, "Quadruple store (256 bit in param=
eter list)")
=20
/* Features exposed via the PTFF instruction. */
DEF_FEAT(PTFF_QTO, "ptff-qto", PTFF, 1, "PTFF Query TOD Offset")
diff --git a/target/s390x/cpu_models.c b/target/s390x/cpu_models.c
index 7fa1712d78..c169c080d1 100644
--- a/target/s390x/cpu_models.c
+++ b/target/s390x/cpu_models.c
@@ -513,6 +513,44 @@ static void check_consistency(const S390CPUModel *mode=
l)
{ S390_FEAT_PFCR_CSTST, S390_FEAT_CCF_BASE },
{ S390_FEAT_PFCR_CSTSTG, S390_FEAT_CCF_BASE },
{ S390_FEAT_INEFF_NC_TX, S390_FEAT_TRANSACTIONAL_EXE },
+ { S390_FEAT_PLO_CLO, S390_FEAT_PLO_EXT },
+ { S390_FEAT_PLO_CSO, S390_FEAT_PLO_EXT },
+ { S390_FEAT_PLO_DCSO, S390_FEAT_PLO_EXT },
+ { S390_FEAT_PLO_CSSTO, S390_FEAT_PLO_EXT },
+ { S390_FEAT_PLO_CSDSTO, S390_FEAT_PLO_EXT },
+ { S390_FEAT_PLO_CSTSTO, S390_FEAT_PLO_EXT },
+ { S390_FEAT_PLO_TCS, S390_FEAT_PLO_EXT },
+ { S390_FEAT_PLO_TCSG, S390_FEAT_PLO_EXT },
+ { S390_FEAT_PLO_TCSX, S390_FEAT_PLO_EXT },
+ { S390_FEAT_PLO_TCSO, S390_FEAT_PLO_EXT },
+ { S390_FEAT_PLO_QCS, S390_FEAT_PLO_EXT },
+ { S390_FEAT_PLO_QCSG, S390_FEAT_PLO_EXT },
+ { S390_FEAT_PLO_QCSX, S390_FEAT_PLO_EXT },
+ { S390_FEAT_PLO_QCSO, S390_FEAT_PLO_EXT },
+ { S390_FEAT_PLO_LO, S390_FEAT_PLO_EXT },
+ { S390_FEAT_PLO_DLX, S390_FEAT_PLO_EXT },
+ { S390_FEAT_PLO_DLO, S390_FEAT_PLO_EXT },
+ { S390_FEAT_PLO_TL, S390_FEAT_PLO_EXT },
+ { S390_FEAT_PLO_TLG, S390_FEAT_PLO_EXT },
+ { S390_FEAT_PLO_TLX, S390_FEAT_PLO_EXT },
+ { S390_FEAT_PLO_TLO, S390_FEAT_PLO_EXT },
+ { S390_FEAT_PLO_QL, S390_FEAT_PLO_EXT },
+ { S390_FEAT_PLO_QLG, S390_FEAT_PLO_EXT },
+ { S390_FEAT_PLO_QLX, S390_FEAT_PLO_EXT },
+ { S390_FEAT_PLO_QLO, S390_FEAT_PLO_EXT },
+ { S390_FEAT_PLO_STO, S390_FEAT_PLO_EXT },
+ { S390_FEAT_PLO_DST, S390_FEAT_PLO_EXT },
+ { S390_FEAT_PLO_DSTG, S390_FEAT_PLO_EXT },
+ { S390_FEAT_PLO_DSTX, S390_FEAT_PLO_EXT },
+ { S390_FEAT_PLO_DSTO, S390_FEAT_PLO_EXT },
+ { S390_FEAT_PLO_TST, S390_FEAT_PLO_EXT },
+ { S390_FEAT_PLO_TSTG, S390_FEAT_PLO_EXT },
+ { S390_FEAT_PLO_TSTX, S390_FEAT_PLO_EXT },
+ { S390_FEAT_PLO_TSTO, S390_FEAT_PLO_EXT },
+ { S390_FEAT_PLO_QST, S390_FEAT_PLO_EXT },
+ { S390_FEAT_PLO_QSTG, S390_FEAT_PLO_EXT },
+ { S390_FEAT_PLO_QSTX, S390_FEAT_PLO_EXT },
+ { S390_FEAT_PLO_QSTO, S390_FEAT_PLO_EXT },
};
int i;
=20
diff --git a/target/s390x/gen-features.c b/target/s390x/gen-features.c
index 6d00ffcda7..680d45d303 100644
--- a/target/s390x/gen-features.c
+++ b/target/s390x/gen-features.c
@@ -46,6 +46,47 @@
S390_FEAT_PLO_CSTSTGR, \
S390_FEAT_PLO_CSTSTX
=20
+#define S390_FEAT_GROUP_PLO_EXT \
+ S390_FEAT_PLO_EXT, \
+ S390_FEAT_PLO_CLO, \
+ S390_FEAT_PLO_CSO, \
+ S390_FEAT_PLO_DCSO, \
+ S390_FEAT_PLO_CSSTO, \
+ S390_FEAT_PLO_CSDSTO, \
+ S390_FEAT_PLO_CSTSTO, \
+ S390_FEAT_PLO_TCS, \
+ S390_FEAT_PLO_TCSG, \
+ S390_FEAT_PLO_TCSX, \
+ S390_FEAT_PLO_TCSO, \
+ S390_FEAT_PLO_QCS, \
+ S390_FEAT_PLO_QCSG, \
+ S390_FEAT_PLO_QCSX, \
+ S390_FEAT_PLO_QCSO, \
+ S390_FEAT_PLO_LO, \
+ S390_FEAT_PLO_DLX, \
+ S390_FEAT_PLO_DLO, \
+ S390_FEAT_PLO_TL, \
+ S390_FEAT_PLO_TLG, \
+ S390_FEAT_PLO_TLX, \
+ S390_FEAT_PLO_TLO, \
+ S390_FEAT_PLO_QL, \
+ S390_FEAT_PLO_QLG, \
+ S390_FEAT_PLO_QLX, \
+ S390_FEAT_PLO_QLO, \
+ S390_FEAT_PLO_STO, \
+ S390_FEAT_PLO_DST, \
+ S390_FEAT_PLO_DSTG, \
+ S390_FEAT_PLO_DSTX, \
+ S390_FEAT_PLO_DSTO, \
+ S390_FEAT_PLO_TST, \
+ S390_FEAT_PLO_TSTG, \
+ S390_FEAT_PLO_TSTX, \
+ S390_FEAT_PLO_TSTO, \
+ S390_FEAT_PLO_QST, \
+ S390_FEAT_PLO_QSTG, \
+ S390_FEAT_PLO_QSTX, \
+ S390_FEAT_PLO_QSTO
+
#define S390_FEAT_GROUP_TOD_CLOCK_STEERING \
S390_FEAT_TOD_CLOCK_STEERING, \
S390_FEAT_PTFF_QTO, \
@@ -320,6 +361,9 @@
static uint16_t group_PLO[] =3D {
S390_FEAT_GROUP_PLO,
};
+static uint16_t group_PLO_EXT[] =3D {
+ S390_FEAT_GROUP_PLO_EXT,
+};
static uint16_t group_TOD_CLOCK_STEERING[] =3D {
S390_FEAT_GROUP_TOD_CLOCK_STEERING,
};
@@ -936,6 +980,7 @@ typedef struct {
*******************************/
static FeatGroupDefSpec FeatGroupDef[] =3D {
FEAT_GROUP_INITIALIZER(PLO),
+ FEAT_GROUP_INITIALIZER(PLO_EXT),
FEAT_GROUP_INITIALIZER(TOD_CLOCK_STEERING),
FEAT_GROUP_INITIALIZER(GEN13_PTFF),
FEAT_GROUP_INITIALIZER(GEN17_PTFF),
--=20
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From: Hendrik Brueckner <brueckner@linux.ibm.com>
To: qemu-devel@nongnu.org, qemu-s390x@nongnu.org, thuth@redhat.com
Cc: nsg@linux.ibm.com, frankja@linux.ibm.com, mimu@linux.ibm.com,
borntraeger@linux.ibm.com, Hendrik Brueckner <brueckner@linux.ibm.com>
Subject: [RFC PATCH v2 15/15] s390x/cpumodel: gen17 model
Date: Fri, 6 Dec 2024 13:27:51 +0100
Message-ID: <20241206122751.189721-16-brueckner@linux.ibm.com>
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This commit introduces the definition of the gen17a/gen17b CPU model.
Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com>
---
target/s390x/cpu_models.c | 2 ++
target/s390x/gen-features.c | 33 +++++++++++++++++++++++++++++++++
2 files changed, 35 insertions(+)
diff --git a/target/s390x/cpu_models.c b/target/s390x/cpu_models.c
index c169c080d1..beb50b5300 100644
--- a/target/s390x/cpu_models.c
+++ b/target/s390x/cpu_models.c
@@ -94,6 +94,8 @@ static S390CPUDef s390_cpu_defs[] =3D {
CPUDEF_INIT(0x8562, 15, 1, 47, 0x08000000U, "gen15b", "IBM z15 T02 GA1=
"),
CPUDEF_INIT(0x3931, 16, 1, 47, 0x08000000U, "gen16a", "IBM 3931 GA1"),
CPUDEF_INIT(0x3932, 16, 1, 47, 0x08000000U, "gen16b", "IBM 3932 GA1"),
+ CPUDEF_INIT(0x9175, 17, 1, 47, 0x08000000U, "gen17a", "IBM 9175 GA1"),
+ CPUDEF_INIT(0x9176, 17, 1, 47, 0x08000000U, "gen17b", "IBM 9176 GA1"),
};
=20
#define QEMU_MAX_CPU_TYPE 0x8561
diff --git a/target/s390x/gen-features.c b/target/s390x/gen-features.c
index 680d45d303..41840677ce 100644
--- a/target/s390x/gen-features.c
+++ b/target/s390x/gen-features.c
@@ -561,6 +561,13 @@ static uint16_t base_GEN15_GA1[] =3D {
=20
#define base_GEN16_GA1 EmptyFeat
=20
+static uint16_t base_GEN17_GA1[] =3D {
+ S390_FEAT_MISC_INSTRUCTION_EXT4,
+ S390_FEAT_SIF,
+ S390_FEAT_GROUP_MSA_EXT_12,
+ S390_FEAT_GROUP_PLO_EXT,
+};
+
/* Full features (in order of release)
* Automatically includes corresponding base features.
* Full features are all features this hardware supports even if kvm/QEMU =
do not
@@ -715,6 +722,20 @@ static uint16_t full_GEN16_GA1[] =3D {
S390_FEAT_UV_FEAT_AP_INTR,
};
=20
+static uint16_t full_GEN17_GA1[] =3D {
+ S390_FEAT_VECTOR_ENH3,
+ S390_FEAT_VECTOR_PACKED_DECIMAL_ENH3,
+ S390_FEAT_INEFF_NC_TX,
+ S390_FEAT_GROUP_GEN17_PTFF,
+ S390_FEAT_GROUP_MSA_EXT_10,
+ S390_FEAT_GROUP_MSA_EXT_10_PCKMO,
+ S390_FEAT_GROUP_MSA_EXT_11,
+ S390_FEAT_GROUP_MSA_EXT_11_PCKMO,
+ S390_FEAT_GROUP_MSA_EXT_13,
+ S390_FEAT_GROUP_MSA_EXT_13_PCKMO,
+ S390_FEAT_GROUP_CONCURRENT_FUNCTIONS,
+};
+
=20
/* Default features (in order of release)
* Automatically includes corresponding base features.
@@ -810,6 +831,17 @@ static uint16_t default_GEN16_GA1[] =3D {
S390_FEAT_PAIE,
};
=20
+static uint16_t default_GEN17_GA1[] =3D {
+ S390_FEAT_VECTOR_ENH3,
+ S390_FEAT_VECTOR_PACKED_DECIMAL_ENH3,
+ S390_FEAT_GROUP_MSA_EXT_10,
+ S390_FEAT_GROUP_MSA_EXT_10_PCKMO,
+ S390_FEAT_GROUP_MSA_EXT_11,
+ S390_FEAT_GROUP_MSA_EXT_11_PCKMO,
+ S390_FEAT_GROUP_MSA_EXT_13,
+ S390_FEAT_GROUP_MSA_EXT_13_PCKMO,
+};
+
/* QEMU (CPU model) features */
=20
static uint16_t qemu_V2_11[] =3D {
@@ -958,6 +990,7 @@ static CpuFeatDefSpec CpuFeatDef[] =3D {
CPU_FEAT_INITIALIZER(GEN14_GA2),
CPU_FEAT_INITIALIZER(GEN15_GA1),
CPU_FEAT_INITIALIZER(GEN16_GA1),
+ CPU_FEAT_INITIALIZER(GEN17_GA1),
};
=20
#define FEAT_GROUP_INITIALIZER(_name) \
--=20
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