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Even though= the parent device never changes, this method re-determines whether the parent d= evice is a PCI device or not using the rather expensive object_dynamic_cast() function. Avoid this overhead by pushing the interrupt handling to the pare= nt device, essentially turning AHCIState into an "IP block". Note that this change also frees AHCIState from the PCI dependency which wa= sn't reflected in Kconfig. Reported-by: Peter Xu Inspired-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Bernhard Beschow -- Supersedes: 20241121100152.65476-1-philmd@linaro.org --- hw/ide/ahci-internal.h | 1 - include/hw/ide/ahci.h | 2 -- hw/ide/ahci.c | 39 ++++----------------------------------- hw/ide/ich.c | 17 ++++++++++++++++- 4 files changed, 20 insertions(+), 39 deletions(-) diff --git a/hw/ide/ahci-internal.h b/hw/ide/ahci-internal.h index 7e63ea2310..a318f36811 100644 --- a/hw/ide/ahci-internal.h +++ b/hw/ide/ahci-internal.h @@ -25,7 +25,6 @@ #define HW_IDE_AHCI_INTERNAL_H =20 #include "hw/ide/ahci.h" -#include "hw/pci/pci_device.h" #include "ide-internal.h" =20 #define AHCI_MEM_BAR_SIZE 0x1000 diff --git a/include/hw/ide/ahci.h b/include/hw/ide/ahci.h index ba31e75ff9..ac0292c634 100644 --- a/include/hw/ide/ahci.h +++ b/include/hw/ide/ahci.h @@ -37,8 +37,6 @@ typedef struct AHCIControlRegs { } AHCIControlRegs; =20 typedef struct AHCIState { - DeviceState *container; - AHCIDevice *dev; AHCIControlRegs control_regs; MemoryRegion mem; diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c index 0eb24304ee..5836aa924b 100644 --- a/hw/ide/ahci.c +++ b/hw/ide/ahci.c @@ -23,8 +23,6 @@ =20 #include "qemu/osdep.h" #include "hw/irq.h" -#include "hw/pci/msi.h" -#include "hw/pci/pci.h" #include "hw/qdev-properties.h" #include "migration/vmstate.h" =20 @@ -34,8 +32,6 @@ #include "qemu/module.h" #include "sysemu/block-backend.h" #include "sysemu/dma.h" -#include "hw/ide/pci.h" -#include "hw/ide/ahci-pci.h" #include "hw/ide/ahci-sysbus.h" #include "ahci-internal.h" #include "ide-internal.h" @@ -179,34 +175,6 @@ static uint32_t ahci_port_read(AHCIState *s, int port,= int offset) return val; } =20 -static void ahci_irq_raise(AHCIState *s) -{ - DeviceState *dev_state =3D s->container; - PCIDevice *pci_dev =3D (PCIDevice *) object_dynamic_cast(OBJECT(dev_st= ate), - TYPE_PCI_DEVICE= ); - - trace_ahci_irq_raise(s); - - if (pci_dev && msi_enabled(pci_dev)) { - msi_notify(pci_dev, 0); - } else { - qemu_irq_raise(s->irq); - } -} - -static void ahci_irq_lower(AHCIState *s) -{ - DeviceState *dev_state =3D s->container; - PCIDevice *pci_dev =3D (PCIDevice *) object_dynamic_cast(OBJECT(dev_st= ate), - TYPE_PCI_DEVICE= ); - - trace_ahci_irq_lower(s); - - if (!pci_dev || !msi_enabled(pci_dev)) { - qemu_irq_lower(s->irq); - } -} - static void ahci_check_irq(AHCIState *s) { int i; @@ -222,9 +190,11 @@ static void ahci_check_irq(AHCIState *s) trace_ahci_check_irq(s, old_irq, s->control_regs.irqstatus); if (s->control_regs.irqstatus && (s->control_regs.ghc & HOST_CTL_IRQ_EN)) { - ahci_irq_raise(s); + trace_ahci_irq_raise(s); + qemu_irq_raise(s->irq); } else { - ahci_irq_lower(s); + trace_ahci_irq_lower(s); + qemu_irq_lower(s->irq); } } =20 @@ -1608,7 +1578,6 @@ static const IDEDMAOps ahci_dma_ops =3D { =20 void ahci_init(AHCIState *s, DeviceState *qdev) { - s->container =3D qdev; /* XXX BAR size should be 1k, but that breaks, so bump it to 4k for no= w */ memory_region_init_io(&s->mem, OBJECT(qdev), &ahci_mem_ops, s, "ahci", AHCI_MEM_BAR_SIZE); diff --git a/hw/ide/ich.c b/hw/ide/ich.c index b311450c12..066554f6cc 100644 --- a/hw/ide/ich.c +++ b/hw/ide/ich.c @@ -91,6 +91,21 @@ static const VMStateDescription vmstate_ich9_ahci =3D { }, }; =20 +static void pci_ich9_ahci_update_irq(void *opaque, int irq_num, int level) +{ + PCIDevice *pci_dev =3D opaque; + + assert(irq_num =3D=3D 0); + + if (msi_enabled(pci_dev)) { + if (level) { + msi_notify(pci_dev, 0); + } + } else { + pci_set_irq(pci_dev, level); + } +} + static void pci_ich9_reset(DeviceState *dev) { AHCIPCIState *d =3D ICH9_AHCI(dev); @@ -125,7 +140,7 @@ static void pci_ich9_ahci_realize(PCIDevice *dev, Error= **errp) /* XXX Software should program this register */ dev->config[0x90] =3D 1 << 6; /* Address Map Register - AHCI mode */ =20 - d->ahci.irq =3D pci_allocate_irq(dev); + d->ahci.irq =3D qemu_allocate_irq(pci_ich9_ahci_update_irq, d, 0); =20 pci_register_bar(dev, ICH9_IDP_BAR, PCI_BASE_ADDRESS_SPACE_IO, &d->ahci.idp); --=20 2.47.1 From nobody Sat Feb 7 02:03:08 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Signed-off-by: Bernhard Beschow --- hw/ide/ahci-sysbus.c | 91 ++++++++++++++++++++++++++++++++++++++++++++ hw/ide/ahci.c | 67 -------------------------------- hw/arm/Kconfig | 10 ++--- hw/ide/Kconfig | 4 ++ hw/ide/meson.build | 1 + 5 files changed, 101 insertions(+), 72 deletions(-) create mode 100644 hw/ide/ahci-sysbus.c diff --git a/hw/ide/ahci-sysbus.c b/hw/ide/ahci-sysbus.c new file mode 100644 index 0000000000..d43db0923f --- /dev/null +++ b/hw/ide/ahci-sysbus.c @@ -0,0 +1,91 @@ +/* + * QEMU AHCI Emulation (MMIO-mapped devices) + * + * Copyright (c) 2010 qiaochong@loongson.cn + * Copyright (c) 2010 Roland Elek + * Copyright (c) 2010 Sebastian Herbszt + * Copyright (c) 2010 Alexander Graf + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + * + */ + +#include "qemu/osdep.h" +#include "exec/address-spaces.h" +#include "hw/qdev-properties.h" +#include "migration/vmstate.h" + +#include "hw/ide/ahci-sysbus.h" +#include "ahci-internal.h" + +static const VMStateDescription vmstate_sysbus_ahci =3D { + .name =3D "sysbus-ahci", + .fields =3D (const VMStateField[]) { + VMSTATE_AHCI(ahci, SysbusAHCIState), + VMSTATE_END_OF_LIST() + }, +}; + +static void sysbus_ahci_reset(DeviceState *dev) +{ + SysbusAHCIState *s =3D SYSBUS_AHCI(dev); + + ahci_reset(&s->ahci); +} + +static void sysbus_ahci_init(Object *obj) +{ + SysbusAHCIState *s =3D SYSBUS_AHCI(obj); + SysBusDevice *sbd =3D SYS_BUS_DEVICE(obj); + + ahci_init(&s->ahci, DEVICE(obj)); + + sysbus_init_mmio(sbd, &s->ahci.mem); + sysbus_init_irq(sbd, &s->ahci.irq); +} + +static void sysbus_ahci_realize(DeviceState *dev, Error **errp) +{ + SysbusAHCIState *s =3D SYSBUS_AHCI(dev); + + ahci_realize(&s->ahci, dev, &address_space_memory); +} + +static Property sysbus_ahci_properties[] =3D { + DEFINE_PROP_UINT32("num-ports", SysbusAHCIState, ahci.ports, 1), + DEFINE_PROP_END_OF_LIST(), +}; + +static void sysbus_ahci_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + + dc->realize =3D sysbus_ahci_realize; + dc->vmsd =3D &vmstate_sysbus_ahci; + device_class_set_props(dc, sysbus_ahci_properties); + device_class_set_legacy_reset(dc, sysbus_ahci_reset); + set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); +} + +static const TypeInfo sysbus_ahci_types[] =3D { + { + .name =3D TYPE_SYSBUS_AHCI, + .parent =3D TYPE_SYS_BUS_DEVICE, + .instance_size =3D sizeof(SysbusAHCIState), + .instance_init =3D sysbus_ahci_init, + .class_init =3D sysbus_ahci_class_init, + }, +}; + +DEFINE_TYPES(sysbus_ahci_types) diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c index 5836aa924b..c02357735e 100644 --- a/hw/ide/ahci.c +++ b/hw/ide/ahci.c @@ -23,16 +23,13 @@ =20 #include "qemu/osdep.h" #include "hw/irq.h" -#include "hw/qdev-properties.h" #include "migration/vmstate.h" =20 #include "qemu/error-report.h" #include "qemu/log.h" #include "qemu/main-loop.h" -#include "qemu/module.h" #include "sysemu/block-backend.h" #include "sysemu/dma.h" -#include "hw/ide/ahci-sysbus.h" #include "ahci-internal.h" #include "ide-internal.h" =20 @@ -1803,70 +1800,6 @@ const VMStateDescription vmstate_ahci =3D { }, }; =20 -static const VMStateDescription vmstate_sysbus_ahci =3D { - .name =3D "sysbus-ahci", - .fields =3D (const VMStateField[]) { - VMSTATE_AHCI(ahci, SysbusAHCIState), - VMSTATE_END_OF_LIST() - }, -}; - -static void sysbus_ahci_reset(DeviceState *dev) -{ - SysbusAHCIState *s =3D SYSBUS_AHCI(dev); - - ahci_reset(&s->ahci); -} - -static void sysbus_ahci_init(Object *obj) -{ - SysbusAHCIState *s =3D SYSBUS_AHCI(obj); - SysBusDevice *sbd =3D SYS_BUS_DEVICE(obj); - - ahci_init(&s->ahci, DEVICE(obj)); - - sysbus_init_mmio(sbd, &s->ahci.mem); - sysbus_init_irq(sbd, &s->ahci.irq); -} - -static void sysbus_ahci_realize(DeviceState *dev, Error **errp) -{ - SysbusAHCIState *s =3D SYSBUS_AHCI(dev); - - ahci_realize(&s->ahci, dev, &address_space_memory); -} - -static Property sysbus_ahci_properties[] =3D { - DEFINE_PROP_UINT32("num-ports", SysbusAHCIState, ahci.ports, 1), - DEFINE_PROP_END_OF_LIST(), -}; - -static void sysbus_ahci_class_init(ObjectClass *klass, void *data) -{ - DeviceClass *dc =3D DEVICE_CLASS(klass); - - dc->realize =3D sysbus_ahci_realize; - dc->vmsd =3D &vmstate_sysbus_ahci; - device_class_set_props(dc, sysbus_ahci_properties); - device_class_set_legacy_reset(dc, sysbus_ahci_reset); - set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); -} - -static const TypeInfo sysbus_ahci_info =3D { - .name =3D TYPE_SYSBUS_AHCI, - .parent =3D TYPE_SYS_BUS_DEVICE, - .instance_size =3D sizeof(SysbusAHCIState), - .instance_init =3D sysbus_ahci_init, - .class_init =3D sysbus_ahci_class_init, -}; - -static void sysbus_ahci_register_types(void) -{ - type_register_static(&sysbus_ahci_info); -} - -type_init(sysbus_ahci_register_types) - void ahci_ide_create_devs(AHCIState *ahci, DriveInfo **hd) { int i; diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index 1b25e73578..e779b5af95 100644 --- a/hw/arm/Kconfig +++ b/hw/arm/Kconfig @@ -71,7 +71,7 @@ config HIGHBANK depends on TCG && ARM select A9MPCORE select A15MPCORE - select AHCI + select AHCI_SYSBUS select ARM_TIMER # sp804 select ARM_V7M select PL011 if !HAVE_RUST # UART @@ -192,7 +192,7 @@ config SBSA_REF depends on TCG && AARCH64 imply PCI_DEVICES select DEVICE_TREE - select AHCI + select AHCI_SYSBUS select ARM_SMMUV3 select GPIO_KEY select PCI_EXPRESS @@ -319,7 +319,7 @@ config ARM_V7M =20 config ALLWINNER_A10 bool - select AHCI + select AHCI_SYSBUS select ALLWINNER_A10_PIT select ALLWINNER_A10_PIC select ALLWINNER_A10_CCM @@ -352,7 +352,7 @@ config ALLWINNER_H3 config ALLWINNER_R40 bool default y if TCG && ARM - select AHCI + select AHCI_SYSBUS select ALLWINNER_SRAMC select ALLWINNER_A10_PIT select ALLWINNER_WDT @@ -422,7 +422,7 @@ config XLNX_ZYNQMP_ARM bool default y if PIXMAN depends on TCG && AARCH64 - select AHCI + select AHCI_SYSBUS select ARM_GIC select CADENCE select CPU_CLUSTER diff --git a/hw/ide/Kconfig b/hw/ide/Kconfig index 2e22b677da..b55507b836 100644 --- a/hw/ide/Kconfig +++ b/hw/ide/Kconfig @@ -54,6 +54,10 @@ config AHCI_ICH9 depends on PCI select AHCI =20 +config AHCI_SYSBUS + bool + select AHCI + config IDE_SII3112 bool select IDE_PCI diff --git a/hw/ide/meson.build b/hw/ide/meson.build index 90ea861423..ddd7066040 100644 --- a/hw/ide/meson.build +++ b/hw/ide/meson.build @@ -1,5 +1,6 @@ system_ss.add(when: 'CONFIG_AHCI', if_true: files('ahci.c')) system_ss.add(when: 'CONFIG_AHCI_ICH9', if_true: files('ich.c')) +system_ss.add(when: 'CONFIG_AHCI_SYSBUS', if_true: files('ahci-sysbus.c')) system_ss.add(when: 'CONFIG_ALLWINNER_A10', if_true: files('ahci-allwinner= .c')) system_ss.add(when: 'CONFIG_IDE_BUS', if_true: files('ide-bus.c')) system_ss.add(when: 'CONFIG_IDE_CF', if_true: files('cf.c')) --=20 2.47.1