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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-385ccd68958sm1292959f8f.67.2024.11.28.02.43.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Nov 2024 02:43:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1732790613; x=1733395413; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=xHFYmwmnqcmAvgEMbarhecchly8CdIQ7oYTdDVFhVcI=; b=YbXEve57aOvZ5W0ozEJ/bACYhxz5jmq0Mmj31yAJH1ZrdC5dy3zRt34/YfN+u3RxQl 8gcZRDCr/I/1VFdGpyrDcS+Hzla2o5VhVZEFrDDksoShP7PdTj3SedFlyKiuyzw7nY96 Rq/19HnG8CNHpE+qH4X14+CrGILwacRLhGPa0lAW9aM3QMHMmoxw5ajKKGStiMEzWAEN QXrEtivva1wOIGAgg6+dZFWxu+P+jG3wXxGamW8N4cnYxWTnaoXJb0cP7kO9aPIsgOQf 8SP69dAWXoOIj4/EteK5Bt6SFuDQch2I2fzxT4uZBJ7hyBF7Muqx+ypT7ly0SCRl7GSt UcHQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1732790613; x=1733395413; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=xHFYmwmnqcmAvgEMbarhecchly8CdIQ7oYTdDVFhVcI=; b=FJgM/GfXHJm1TxGj+TLbhR6pMOSZBVhONVmMOVzjtsi9uso1kPhNQaWIDsVhrBOh94 8KHKHWR8xWpe1kXjIQR5WRR5XOn0x3h2eRgIUrGTh5EGLqCRJgBUWoKokDKRurw2U3c3 h7lDO+bWehDyCH0zxSiRTPu+qnGcorhyJYQnoSwYOdEQ5P2KxQuXkRYwR7hggVdmEJSr PwnUspT9WCGCItYXSWKUQJJPxye2lWAyofS6vMh7Xtt58UgMsZ5f6vxfnM9IV24KnK37 o0J5k7jMexr6P0GnORBmtHKrFpRBYwuG55xrd9FNaPHqxhK2r0jaaGY4HAIgMwS6VK1u HWyw== X-Gm-Message-State: AOJu0YzRZn+Oor3xGbkJCs9TJV3yw2pM+kw19TBEOQErJoUkfe1Oq/iV TYlzipTYT1OcTEA6UYSzhYiIyvWsrBg5J/19FnduNDteRq6WyEaIrY+BAOXsju+rkElQM/pJrTD i X-Gm-Gg: ASbGnctB7uJVcGiNC2YA2h5/fudt87MzjFXsKAk+bYZP9DVt3D/Jcn1N9ahWzwfAgQZ fb09/O73sg5ZduAAkkG+gk1UXuntltCH45p1B09+/P1lHDyuxxs2YWdUkw2nLIpV57q2Dxvy9IO JgMQDn8U0sXwmvvnmB/jRVjhEW6pn32WuaFi+ZH56LoZuowxZbILKqRUoVsF4LFK4LsUuaHQGwD VIBgesulKlrujbntc1xv0kKipd3vLv/avakgbib8EI+r3Qt990PSWk= X-Google-Smtp-Source: AGHT+IHD8Eop3Sl1nLVu2mVi+S7Bbn0D0QOlNKeDuqEmug+IgUvyzvvZweODFgWcNmvnV9fee/YCpg== X-Received: by 2002:a05:6000:1449:b0:37d:4376:6e1d with SMTP id ffacd0b85a97d-385c6ed97f5mr6117943f8f.41.1732790609207; Thu, 28 Nov 2024 02:43:29 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, =?UTF-8?q?Alex=20Benn=C3=A9e?= , Richard Henderson , Paolo Bonzini , Eduardo Habkost , Song Gao , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Jiaxun Yang , Aleksandar Rikalo , Nicholas Piggin , Daniel Henrique Barboza , David Hildenbrand , Ilya Leoshkevich , Thomas Huth , Mark Cave-Ayland , Artyom Tarasenko , Max Filippov Subject: [PATCH for-10.0 18/25] target/ppc: Set Float3NaNPropRule explicitly Date: Thu, 28 Nov 2024 10:43:03 +0000 Message-Id: <20241128104310.3452934-19-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241128104310.3452934-1-peter.maydell@linaro.org> References: <20241128104310.3452934-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x331.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1732791073248019100 Content-Type: text/plain; charset="utf-8" Set the Float3NaNPropRule explicitly for PPC, and remove the ifdef from pickNaNMulAdd(). Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- target/ppc/cpu_init.c | 8 ++++++++ fpu/softfloat-specialize.c.inc | 6 ------ 2 files changed, 8 insertions(+), 6 deletions(-) diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index f18908a643a..eb9d7b13701 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -7270,6 +7270,14 @@ static void ppc_cpu_reset_hold(Object *obj, ResetTyp= e type) */ set_float_2nan_prop_rule(float_2nan_prop_ab, &env->fp_status); set_float_2nan_prop_rule(float_2nan_prop_ab, &env->vec_status); + /* + * NaN propagation for fused multiply-add: + * if fRA is a NaN return it; otherwise if fRB is a NaN return it; + * otherwise return fRC. Note that muladd on PPC is (fRA * fRC) + frB + * whereas QEMU labels the operands as (a * b) + c. + */ + set_float_3nan_prop_rule(float_3nan_prop_acb, &env->fp_status); + set_float_3nan_prop_rule(float_3nan_prop_acb, &env->vec_status); /* * For PPC, the (inf,zero,qnan) case sets InvalidOp, but we prefer * to return an input NaN if we have one (ie c) rather than generating diff --git a/fpu/softfloat-specialize.c.inc b/fpu/softfloat-specialize.c.inc index 32edb493776..d89ef62b38a 100644 --- a/fpu/softfloat-specialize.c.inc +++ b/fpu/softfloat-specialize.c.inc @@ -508,12 +508,6 @@ static int pickNaNMulAdd(FloatClass a_cls, FloatClass = b_cls, FloatClass c_cls, } else { rule =3D float_3nan_prop_s_cab; } -#elif defined(TARGET_PPC) - /* - * If fRA is a NaN return it; otherwise if fRB is a NaN return it; - * otherwise return fRC. Note that muladd on PPC is (fRA * fRC) + = frB - */ - rule =3D float_3nan_prop_acb; #elif defined(TARGET_S390X) rule =3D float_3nan_prop_s_abc; #elif defined(TARGET_SPARC) --=20 2.34.1