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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-385ccd68958sm1292959f8f.67.2024.11.28.02.43.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Nov 2024 02:43:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1732790601; x=1733395401; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=oGeQkgWiOnpuuXWXZlTMDkuSTfoKIXOn3w/Ju141f2Q=; b=lZToagLg5Od8ckp1LAzBnxpaEWFSdxY+wwfHHJEQS+SCx9G8G5xkEPjdgc1GYB3Nr9 Inv3wkT31m/pzuJH0CUCNNl584pKj9m1yl5Lan6ywzWydrpcoJc1pZajgfv5g9J7ZQAg LwkZosi4S814Gy2sIS6m2EJhUFLwNhZt8eSt2acxef/N2OaYePneA9Ki3xKDD/0e0DcX jK12FtzFQdjRtFqVNh5lKL3/IBkkgc4MPDQMrP0eCQ4u0+25aWz+OIjPD2BorZOnFDgu x2rcwpVWgB+YNz53BubNPN1opU1lnt7Urf6AMTY1gz97jN25q3y9hRkKTOM8doW3YcY1 V+nQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1732790601; x=1733395401; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=oGeQkgWiOnpuuXWXZlTMDkuSTfoKIXOn3w/Ju141f2Q=; b=SRTXXPppDo+1a8OIzOYmm5kDBX2b2wUQTDahcqofMOEhV5qmIuaTaPG8C7ldyYj35+ muFXOpHUqbfjJn4D915wQyq8jHJiezWo8kzB38zZtdYKtQHPvhv6X9JJX9BAyBQSmxRz UwhpIwJlkTioJeMP3j74T5zvHjS1fL31dumm8aLNdPkOr6VMn2FXOsvFFta9alHgvnD1 JPsyU6zUXxMlMKQ3LAbN4WMOvdEFrXBNco68vyV196Va1U5RmMkMzfXbMgHHDkcTqWeU 8/Q+hdEf6pmYtlz2aiFKPK9A+vP10wDLKlsrTgbTvZwkEsK9umVMIQfrHYnxFlcFGmtm fSKg== X-Gm-Message-State: AOJu0YxWuJf78inNe6ESPcVHUj6CwYhXm2BsUlhQlZzFuiUN/6D1k7HJ wEkJJXL41U7y6Cicbw4XTur3ZFsV3bU+FrPZpP12LVtj6GgNDBHaQWqHEwDiTlUAC7FQtiP4seY 2 X-Gm-Gg: ASbGnctOR0Rxf+mjWpVXiPGWpqW9e/fxGaE8h6+mO8lQC8eaTymPhsCBNIWb/aDLgpu PWGwt5uO5uq26V9yw7grJ0jpzhXmP6v0xVntqH5E1rPVupVWPCUtCs+wRE+azWhWXlOR5YhdYi8 HeQCCeVdXOi+1iW3iixOU9rZYpq8UUcu1EiLCZSp2WsLcDn177l93yXd07ubEESoUsJxOETl+pt +vY4H2zWEDouPGiDM3QkUl9mlti/ZSOuQVBp9c0s+RI498uleE3QHk= X-Google-Smtp-Source: AGHT+IGjPCC8FhcTdAsDhnejmdWY3ApnB/Rlz4vhTiLGyw/FgA4UJIVI5PC65VDBKzcbWkvKFR0hsA== X-Received: by 2002:adf:e199:0:b0:382:134d:65e0 with SMTP id ffacd0b85a97d-385c6edc41dmr5806320f8f.56.1732790601162; Thu, 28 Nov 2024 02:43:21 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, =?UTF-8?q?Alex=20Benn=C3=A9e?= , Richard Henderson , Paolo Bonzini , Eduardo Habkost , Song Gao , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Jiaxun Yang , Aleksandar Rikalo , Nicholas Piggin , Daniel Henrique Barboza , David Hildenbrand , Ilya Leoshkevich , Thomas Huth , Mark Cave-Ayland , Artyom Tarasenko , Max Filippov Subject: [PATCH for-10.0 09/25] target/sparc: Set FloatInfZeroNaNRule explicitly Date: Thu, 28 Nov 2024 10:42:54 +0000 Message-Id: <20241128104310.3452934-10-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241128104310.3452934-1-peter.maydell@linaro.org> References: <20241128104310.3452934-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x335.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1732791053151019100 Content-Type: text/plain; charset="utf-8" Set the FloatInfZeroNaNRule explicitly for the SPARC target, so we can remove the ifdef from pickNaNMulAdd(). Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- target/sparc/cpu.c | 2 ++ fpu/softfloat-specialize.c.inc | 3 +-- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index dd7af86de73..61f2d3fbf23 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -814,6 +814,8 @@ static void sparc_cpu_realizefn(DeviceState *dev, Error= **errp) * the CPU state struct so it won't get zeroed on reset. */ set_float_2nan_prop_rule(float_2nan_prop_s_ba, &env->fp_status); + /* For inf * 0 + NaN, return the input NaN */ + set_float_infzeronan_rule(float_infzeronan_dnan_never, &env->fp_status= ); =20 cpu_exec_realizefn(cs, &local_err); if (local_err !=3D NULL) { diff --git a/fpu/softfloat-specialize.c.inc b/fpu/softfloat-specialize.c.inc index db9a466e05b..7e57e85348b 100644 --- a/fpu/softfloat-specialize.c.inc +++ b/fpu/softfloat-specialize.c.inc @@ -489,8 +489,7 @@ static int pickNaNMulAdd(FloatClass a_cls, FloatClass b= _cls, FloatClass c_cls, /* * Temporarily fall back to ifdef ladder */ -#if defined(TARGET_SPARC) || \ - defined(TARGET_XTENSA) || defined(TARGET_HPPA) || \ +#if defined(TARGET_XTENSA) || defined(TARGET_HPPA) || \ defined(TARGET_I386) || defined(TARGET_LOONGARCH) /* * For LoongArch systems that conform to IEEE754-2008, the (inf,ze= ro,nan) --=20 2.34.1