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[216.180.64.156]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2eb0d048b73sm9187834a91.35.2024.11.26.11.02.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Nov 2024 11:02:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1732647736; x=1733252536; darn=nongnu.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=fciZBZFx7H12wEpRAgDGyrQsACWT0gMu0Jx7arFxq70=; b=L2YexA6eawAHQEzNrGmd6T1a4Qdwij5APsaM3FRimLXMDkqfPjRqkHlabiqKS4ND+s 8+WPIukq3xCf1vyzpFy1EO+EyRpa8cbVKZ9iEnbVm0EB9UBzUhPINVCc14BVTzJWBmKt FvV5l7xTjMcxJyqF3rviTAdfXJ1QNdWqE8v/nD9pELFoQVKpQvlatVis+tvGtlhOor2l irhnvMV+zmRc5CPCfseoshxH6ZJ2Z2umu47JtXWOwW6B65YjSd1WjGWdfTDnAfbOTihK Qjvz+QVJD06o6B8TPCMmXa3PKBvtsg/LBxnNIHiFKjjpVU0Ez6IITgEvX3QKAHDCh+YD Y5dg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1732647736; x=1733252536; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=fciZBZFx7H12wEpRAgDGyrQsACWT0gMu0Jx7arFxq70=; b=JHxx7pINfKteuRz61wjKpK0lzRamjSlh5LwY1RfpgK/GRQlwsPxSWATxiPXo5QAvMF LA1spWx2vcOADLYqZJVkD+GQAowTr3hhevmpSd3cZ4qMojP+50BFhvxRV9rqkWieeXl8 sJ5Bq+fJC7xDYP+WbW6uYdt2kzwjzyrOGVAB2TN9vcAs4F1lnM38ZDG5quu+mIfkepRs 8ZGIkRiH76eklAyStWcOAZh11qjrczUnMv0XPXO4/mnA6uNd9i2dsAIlosKjeMy1W/Ac +MciykPeWiE4dUWNu7bvknIYU2ssuLHdvoINeOCJuv1MF03dy+FqDkiFxyhaNhph/fai ErdA== X-Gm-Message-State: AOJu0Yzv8DJ1ysRIWnQwfqGGnaWG9L5AR6WpU2jFZsWHWKUubc2xuZWy 6kxueTuJoauaddFk3WU0mLruhJcWDgWx/y7RzCM4DAjdN5xmhxv0NcWHu9W8699BGz5M6HunfPO CPHg= X-Gm-Gg: ASbGncsRhmKUT1rx62t+shiSfJhOt7uNlywfjWD1+FUFpxDyy3xj7mlD0juNBjz+/bi lmbQfOGcLLGrNdF04RXXw4ug+zfuQcf17YnirUxC2VhNmIJJGTciLDs2FoODCjqnNvu++Y6gkdZ G6Hea/yKV91XRc+/KxuckNxJ1jhCa8fLCjqBFKagIWeQa+NPLiawhhDjsujlI+bmgcYb6htBQbJ glVLzb6t8fhjo9HVxg0V1D0euuSGT6hRl8Q/ppb4WxXLzYPnyNBfOoOXxECPL0l2FC/dZpGuJC8 U3AKJh2fJImTqA== X-Google-Smtp-Source: AGHT+IHIU6ItMIPtThpFR4gs0xXwui8NAnkbLaFnaaPqhvFyc7fPqkXJuhvTkh40IeWpwjhHTqmMIQ== X-Received: by 2002:a17:90b:4a:b0:2ea:c2d3:a075 with SMTP id 98e67ed59e1d1-2ee08ecd9f0mr531990a91.17.1732647736466; Tue, 26 Nov 2024 11:02:16 -0800 (PST) From: Pierrick Bouvier To: qemu-devel@nongnu.org Cc: Richard Henderson , Paolo Bonzini , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Mahmoud Mandour , Pierrick Bouvier , Alexandre Iooss Subject: [PATCH] plugins: optimize cpu_index code generation Date: Tue, 26 Nov 2024 11:02:03 -0800 Message-Id: <20241126190203.3094635-1-pierrick.bouvier@linaro.org> X-Mailer: git-send-email 2.39.5 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102d; envelope-from=pierrick.bouvier@linaro.org; helo=mail-pj1-x102d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1732647752399019100 Content-Type: text/plain; charset="utf-8" When running with a single vcpu, we can return a constant instead of a load when accessing cpu_index. A side effect is that all tcg operations using it are optimized, most notably scoreboard access. When running a simple loop in user-mode, the speedup is around 20%. Signed-off-by: Pierrick Bouvier --- accel/tcg/plugin-gen.c | 7 +++++++ plugins/core.c | 13 +++++++++++++ 2 files changed, 20 insertions(+) diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c index 0f47bfbb489..2eabeecbdcf 100644 --- a/accel/tcg/plugin-gen.c +++ b/accel/tcg/plugin-gen.c @@ -102,6 +102,13 @@ static void gen_disable_mem_helper(void) =20 static TCGv_i32 gen_cpu_index(void) { + /* + * Optimize when we run with a single vcpu. All values using cpu_index, + * including scoreboard index, will be optimized out. + */ + if (qemu_plugin_num_vcpus() =3D=3D 1) { + return tcg_constant_i32(0); + } TCGv_i32 cpu_index =3D tcg_temp_ebb_new_i32(); tcg_gen_ld_i32(cpu_index, tcg_env, -offsetof(ArchCPU, env) + offsetof(CPUState, cpu_index)= ); diff --git a/plugins/core.c b/plugins/core.c index bb105e8e688..8e32ca5ee08 100644 --- a/plugins/core.c +++ b/plugins/core.c @@ -266,6 +266,19 @@ static void qemu_plugin_vcpu_init__async(CPUState *cpu= , run_on_cpu_data unused) =20 assert(cpu->cpu_index !=3D UNASSIGNED_CPU_INDEX); qemu_rec_mutex_lock(&plugin.lock); + + /* + * We want to flush tb when a second cpu appear. + * When generating plugin code, we optimize cpu_index for num_vcpus = =3D=3D 1. + */ + if (plugin.num_vcpus =3D=3D 1) { + qemu_rec_mutex_unlock(&plugin.lock); + start_exclusive(); + qemu_rec_mutex_lock(&plugin.lock); + tb_flush(cpu); + end_exclusive(); + } + plugin.num_vcpus =3D MAX(plugin.num_vcpus, cpu->cpu_index + 1); plugin_cpu_update__locked(&cpu->cpu_index, NULL, NULL); success =3D g_hash_table_insert(plugin.cpu_ht, &cpu->cpu_index, --=20 2.39.5