From nobody Mon Feb 9 16:07:36 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 173220939886262.92974152196007; Thu, 21 Nov 2024 09:16:38 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tEAms-0000ik-8T; Thu, 21 Nov 2024 12:16:14 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tEAmp-0000ho-Kp; Thu, 21 Nov 2024 12:16:11 -0500 Received: from isrv.corpit.ru ([86.62.121.231]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tEAmn-00049l-4f; Thu, 21 Nov 2024 12:16:11 -0500 Received: from tsrv.corpit.ru (tsrv.tls.msk.ru [192.168.177.2]) by isrv.corpit.ru (Postfix) with ESMTP id D3FF8A98F9; Thu, 21 Nov 2024 20:15:57 +0300 (MSK) Received: from tls.msk.ru (mjt.wg.tls.msk.ru [192.168.177.130]) by tsrv.corpit.ru (Postfix) with SMTP id C0116176BAC; Thu, 21 Nov 2024 20:16:05 +0300 (MSK) Received: (nullmailer pid 3273292 invoked by uid 1000); Thu, 21 Nov 2024 17:16:05 -0000 From: Michael Tokarev To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: Peter Maydell , Michael Tokarev Subject: [PATCH] target/arm/tcg/cpu32.c: swap ATCM and BTCM register names Date: Thu, 21 Nov 2024 20:16:02 +0300 Message-Id: <20241121171602.3273252-1-mjt@tls.msk.ru> X-Mailer: git-send-email 2.39.5 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=86.62.121.231; envelope-from=mjt@tls.msk.ru; helo=isrv.corpit.ru X-Spam_score_int: -68 X-Spam_score: -6.9 X-Spam_bar: ------ X-Spam_report: (-6.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_HI=-5, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1732209411986116600 Content-Type: text/plain; charset="utf-8" According to Cortex-R5 r1p2 manual, register with opcode2=3D0 is BTCM and with opcode2=3D1 is ATCM, - exactly the opposite from how qemu labels them. Just swap the labels to avoid confusion, - both registers are implemented as always-zero. Signed-off-by: Michael Tokarev Reviewed-by: Richard Henderson --- target/arm/tcg/cpu32.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/arm/tcg/cpu32.c b/target/arm/tcg/cpu32.c index 20c2737f17..2a77701f8d 100644 --- a/target/arm/tcg/cpu32.c +++ b/target/arm/tcg/cpu32.c @@ -574,9 +574,9 @@ static void cortex_a15_initfn(Object *obj) =20 static const ARMCPRegInfo cortexr5_cp_reginfo[] =3D { /* Dummy the TCM region regs for the moment */ - { .name =3D "ATCM", .cp =3D 15, .opc1 =3D 0, .crn =3D 9, .crm =3D 1, .= opc2 =3D 0, + { .name =3D "BTCM", .cp =3D 15, .opc1 =3D 0, .crn =3D 9, .crm =3D 1, .= opc2 =3D 0, .access =3D PL1_RW, .type =3D ARM_CP_CONST }, - { .name =3D "BTCM", .cp =3D 15, .opc1 =3D 0, .crn =3D 9, .crm =3D 1, .= opc2 =3D 1, + { .name =3D "ATCM", .cp =3D 15, .opc1 =3D 0, .crn =3D 9, .crm =3D 1, .= opc2 =3D 1, .access =3D PL1_RW, .type =3D ARM_CP_CONST }, { .name =3D "DCACHE_INVAL", .cp =3D 15, .opc1 =3D 0, .crn =3D 15, .crm= =3D 5, .opc2 =3D 0, .access =3D PL1_W, .type =3D ARM_CP_NOP }, --=20 2.39.5