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charset="utf-8" From: Ilya Leoshkevich Order the helper arguments to match the Principles of Operation. Implement the "Results: MULTIPLY AND ADD" table in pickNaNMulAdd(). Reported-by: Peter Maydell Signed-off-by: Ilya Leoshkevich Reviewed-by: Peter Maydell Message-ID: <20241023000147.34035-2-iii@linux.ibm.com> Signed-off-by: Thomas Huth --- target/s390x/tcg/fpu_helper.c | 8 ++++---- target/s390x/tcg/vec_fpu_helper.c | 12 ++++++------ fpu/softfloat-specialize.c.inc | 19 +++++++++++++++++++ 3 files changed, 29 insertions(+), 10 deletions(-) diff --git a/target/s390x/tcg/fpu_helper.c b/target/s390x/tcg/fpu_helper.c index d8bd5748fa..5041c13962 100644 --- a/target/s390x/tcg/fpu_helper.c +++ b/target/s390x/tcg/fpu_helper.c @@ -780,7 +780,7 @@ uint32_t HELPER(kxb)(CPUS390XState *env, Int128 a, Int1= 28 b) uint64_t HELPER(maeb)(CPUS390XState *env, uint64_t f1, uint64_t f2, uint64_t f3) { - float32 ret =3D float32_muladd(f2, f3, f1, 0, &env->fpu_status); + float32 ret =3D float32_muladd(f3, f2, f1, 0, &env->fpu_status); handle_exceptions(env, false, GETPC()); return ret; } @@ -789,7 +789,7 @@ uint64_t HELPER(maeb)(CPUS390XState *env, uint64_t f1, uint64_t HELPER(madb)(CPUS390XState *env, uint64_t f1, uint64_t f2, uint64_t f3) { - float64 ret =3D float64_muladd(f2, f3, f1, 0, &env->fpu_status); + float64 ret =3D float64_muladd(f3, f2, f1, 0, &env->fpu_status); handle_exceptions(env, false, GETPC()); return ret; } @@ -798,7 +798,7 @@ uint64_t HELPER(madb)(CPUS390XState *env, uint64_t f1, uint64_t HELPER(mseb)(CPUS390XState *env, uint64_t f1, uint64_t f2, uint64_t f3) { - float32 ret =3D float32_muladd(f2, f3, f1, float_muladd_negate_c, + float32 ret =3D float32_muladd(f3, f2, f1, float_muladd_negate_c, &env->fpu_status); handle_exceptions(env, false, GETPC()); return ret; @@ -808,7 +808,7 @@ uint64_t HELPER(mseb)(CPUS390XState *env, uint64_t f1, uint64_t HELPER(msdb)(CPUS390XState *env, uint64_t f1, uint64_t f2, uint64_t f3) { - float64 ret =3D float64_muladd(f2, f3, f1, float_muladd_negate_c, + float64 ret =3D float64_muladd(f3, f2, f1, float_muladd_negate_c, &env->fpu_status); handle_exceptions(env, false, GETPC()); return ret; diff --git a/target/s390x/tcg/vec_fpu_helper.c b/target/s390x/tcg/vec_fpu_h= elper.c index 75cf605b9f..1bbaa82fe8 100644 --- a/target/s390x/tcg/vec_fpu_helper.c +++ b/target/s390x/tcg/vec_fpu_helper.c @@ -621,8 +621,8 @@ static void vfma32(S390Vector *v1, const S390Vector *v2= , const S390Vector *v3, int i; =20 for (i =3D 0; i < 4; i++) { - const float32 a =3D s390_vec_read_float32(v2, i); - const float32 b =3D s390_vec_read_float32(v3, i); + const float32 a =3D s390_vec_read_float32(v3, i); + const float32 b =3D s390_vec_read_float32(v2, i); const float32 c =3D s390_vec_read_float32(v4, i); float32 ret =3D float32_muladd(a, b, c, flags, &env->fpu_status); =20 @@ -645,8 +645,8 @@ static void vfma64(S390Vector *v1, const S390Vector *v2= , const S390Vector *v3, int i; =20 for (i =3D 0; i < 2; i++) { - const float64 a =3D s390_vec_read_float64(v2, i); - const float64 b =3D s390_vec_read_float64(v3, i); + const float64 a =3D s390_vec_read_float64(v3, i); + const float64 b =3D s390_vec_read_float64(v2, i); const float64 c =3D s390_vec_read_float64(v4, i); const float64 ret =3D float64_muladd(a, b, c, flags, &env->fpu_sta= tus); =20 @@ -664,8 +664,8 @@ static void vfma128(S390Vector *v1, const S390Vector *v= 2, const S390Vector *v3, const S390Vector *v4, CPUS390XState *env, bool s, int = flags, uintptr_t retaddr) { - const float128 a =3D s390_vec_read_float128(v2); - const float128 b =3D s390_vec_read_float128(v3); + const float128 a =3D s390_vec_read_float128(v3); + const float128 b =3D s390_vec_read_float128(v2); const float128 c =3D s390_vec_read_float128(v4); uint8_t vxc, vec_exc =3D 0; float128 ret; diff --git a/fpu/softfloat-specialize.c.inc b/fpu/softfloat-specialize.c.inc index b5a3208050..9bca03c4ae 100644 --- a/fpu/softfloat-specialize.c.inc +++ b/fpu/softfloat-specialize.c.inc @@ -597,6 +597,25 @@ static int pickNaNMulAdd(FloatClass a_cls, FloatClass = b_cls, FloatClass c_cls, float_raise(float_flag_invalid | float_flag_invalid_imz, status); } return 3; /* default NaN */ +#elif defined(TARGET_S390X) + if (infzero) { + float_raise(float_flag_invalid | float_flag_invalid_imz, status); + return 3; + } + + if (is_snan(a_cls)) { + return 0; + } else if (is_snan(b_cls)) { + return 1; + } else if (is_snan(c_cls)) { + return 2; + } else if (is_qnan(a_cls)) { + return 0; + } else if (is_qnan(b_cls)) { + return 1; + } else { + return 2; + } #elif defined(TARGET_SPARC) /* For (inf,0,nan) return c. */ if (infzero) { --=20 2.47.0