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([71.212.136.242]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2ea024ec723sm1484438a91.46.2024.11.14.08.01.57 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Nov 2024 08:01:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1731600118; x=1732204918; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=q0lcs2GzNK+WCVKsOkPx1Msyr0hhchWTgy7GKRRvyJs=; b=NwD7EbbbqdKYfkiyfIiwWXoQ+5zMdhGPGEPCtp4lhIZF5/xmydmqs8Q87c3cpEZtXJ eo6S5syHhFUiEAb3tss67e5uXjUg16xgSde+7jEkzlmt2aD4VY81nrmuyqZsqc2RlhVl lqPe8UZsQFrKLpNjdrhKX8R0uwWFAWXANSGv/gQtqr1IwOAhfwMIT08wMR+SWP0aqpXP JDbsnQJbHdzpPowaEo4BmANm8Hl+2x60UoHtn+m9AUq28IFXc24pptM2wzQ04WvgYIZ4 pDE7TodOJp3v6+BbJhl1nMXzlpV7zdSeElJ2RqF/tTJhADU17pD4fhp7gU58NE8Kjhrg LdFA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1731600118; x=1732204918; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=q0lcs2GzNK+WCVKsOkPx1Msyr0hhchWTgy7GKRRvyJs=; b=AJTRoK5MTib93qqIvpIiKcSieKC68ZHwBl5pHhBaw0cSDJwXMutv8mBS2fJxq1VPvY RtFBasbFyUz4vFbYoce24dsOud8/jYIC05sko1xO0TkG9QCcTofKjavI0XFpQVsiLZo+ JnYm0yLCR26npSG+FFzH7qWgzaFbxaHJZEfjMD/df1LHF3wLLv15DI3r1McuKSPIkAGg e57WeAQLd8IrhOO8iuP/a7VOg9JOmO1HoOWDlGkZ1gOlokbeqVa8+MHsnH47VvKlYmaM zsokKBK7gwz95g1k/dkICnlcn5oVNba0RjIp/uuKO7MTmyS92z6f8CM4EATaJSv0h5EW sn2g== X-Gm-Message-State: AOJu0Yxfc+AdYXnLZ5TkwCRyaMtQd4BCHpq8nmtSyurwix8zjhVPEEAg qJlnxYw/k3zb18FgthNr2SZkKVudXo1wEw+mPPmHbFKUAcVTo/C41ptIouay2GGeus1BzBJwb6n x X-Google-Smtp-Source: AGHT+IEtaxTu1otCcYY3xiXIG6nin4XuHZBue8sCsc6LMnjI3k75L1/JQ20UEVpUx5raZdSV9tgvVg== X-Received: by 2002:a17:90b:4a01:b0:2e9:2e69:ee10 with SMTP id 98e67ed59e1d1-2e9b173d95cmr32274780a91.19.1731600117798; Thu, 14 Nov 2024 08:01:57 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 29/54] accel/tcg: Partially unify MMULookupPageData and TLBLookupOutput Date: Thu, 14 Nov 2024 08:01:05 -0800 Message-ID: <20241114160131.48616-30-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241114160131.48616-1-richard.henderson@linaro.org> References: <20241114160131.48616-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102c; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1731600673422116600 Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier --- accel/tcg/cputlb.c | 151 ++++++++++++++++++++++----------------------- 1 file changed, 74 insertions(+), 77 deletions(-) diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index a33bebf55a..8f459be5a8 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -1684,10 +1684,7 @@ bool tlb_plugin_lookup(CPUState *cpu, vaddr addr, in= t mmu_idx, */ =20 typedef struct MMULookupPageData { - CPUTLBEntryFull *full; - void *haddr; vaddr addr; - int flags; int size; TLBLookupOutput o; } MMULookupPageData; @@ -1724,10 +1721,6 @@ static void mmu_lookup1(CPUState *cpu, MMULookupPage= Data *data, MemOp memop, }; =20 tlb_lookup_nofail(cpu, &data->o, &i); - - data->full =3D &data->o.full; - data->flags =3D data->o.flags; - data->haddr =3D data->o.haddr; } =20 /** @@ -1743,24 +1736,22 @@ static void mmu_lookup1(CPUState *cpu, MMULookupPag= eData *data, MemOp memop, static void mmu_watch_or_dirty(CPUState *cpu, MMULookupPageData *data, MMUAccessType access_type, uintptr_t ra) { - CPUTLBEntryFull *full =3D data->full; - vaddr addr =3D data->addr; - int flags =3D data->flags; - int size =3D data->size; + int flags =3D data->o.flags; =20 /* On watchpoint hit, this will longjmp out. */ if (flags & TLB_WATCHPOINT) { int wp =3D access_type =3D=3D MMU_DATA_STORE ? BP_MEM_WRITE : BP_M= EM_READ; - cpu_check_watchpoint(cpu, addr, size, full->attrs, wp, ra); + cpu_check_watchpoint(cpu, data->addr, data->size, + data->o.full.attrs, wp, ra); flags &=3D ~TLB_WATCHPOINT; } =20 /* Note that notdirty is only set for writes. */ if (flags & TLB_NOTDIRTY) { - notdirty_write(cpu, addr, size, full, ra); + notdirty_write(cpu, data->addr, data->size, &data->o.full, ra); flags &=3D ~TLB_NOTDIRTY; } - data->flags =3D flags; + data->o.flags =3D flags; } =20 /** @@ -1795,7 +1786,7 @@ static bool mmu_lookup(CPUState *cpu, vaddr addr, Mem= OpIdx oi, if (likely(!crosspage)) { mmu_lookup1(cpu, &l->page[0], l->memop, l->mmu_idx, type, ra); =20 - flags =3D l->page[0].flags; + flags =3D l->page[0].o.flags; if (unlikely(flags & (TLB_WATCHPOINT | TLB_NOTDIRTY))) { mmu_watch_or_dirty(cpu, &l->page[0], type, ra); } @@ -1812,7 +1803,7 @@ static bool mmu_lookup(CPUState *cpu, vaddr addr, Mem= OpIdx oi, mmu_lookup1(cpu, &l->page[0], l->memop, l->mmu_idx, type, ra); mmu_lookup1(cpu, &l->page[1], 0, l->mmu_idx, type, ra); =20 - flags =3D l->page[0].flags | l->page[1].flags; + flags =3D l->page[0].o.flags | l->page[1].o.flags; if (unlikely(flags & (TLB_WATCHPOINT | TLB_NOTDIRTY))) { mmu_watch_or_dirty(cpu, &l->page[0], type, ra); mmu_watch_or_dirty(cpu, &l->page[1], type, ra); @@ -2029,7 +2020,7 @@ static Int128 do_ld16_mmio_beN(CPUState *cpu, CPUTLBE= ntryFull *full, */ static uint64_t do_ld_bytes_beN(MMULookupPageData *p, uint64_t ret_be) { - uint8_t *haddr =3D p->haddr; + uint8_t *haddr =3D p->o.haddr; int i, size =3D p->size; =20 for (i =3D 0; i < size; i++) { @@ -2047,7 +2038,7 @@ static uint64_t do_ld_bytes_beN(MMULookupPageData *p,= uint64_t ret_be) */ static uint64_t do_ld_parts_beN(MMULookupPageData *p, uint64_t ret_be) { - void *haddr =3D p->haddr; + void *haddr =3D p->o.haddr; int size =3D p->size; =20 do { @@ -2097,7 +2088,7 @@ static uint64_t do_ld_parts_beN(MMULookupPageData *p,= uint64_t ret_be) static uint64_t do_ld_whole_be4(MMULookupPageData *p, uint64_t ret_be) { int o =3D p->addr & 3; - uint32_t x =3D load_atomic4(p->haddr - o); + uint32_t x =3D load_atomic4(p->o.haddr - o); =20 x =3D cpu_to_be32(x); x <<=3D o * 8; @@ -2117,7 +2108,7 @@ static uint64_t do_ld_whole_be8(CPUState *cpu, uintpt= r_t ra, MMULookupPageData *p, uint64_t ret_be) { int o =3D p->addr & 7; - uint64_t x =3D load_atomic8_or_exit(cpu, ra, p->haddr - o); + uint64_t x =3D load_atomic8_or_exit(cpu, ra, p->o.haddr - o); =20 x =3D cpu_to_be64(x); x <<=3D o * 8; @@ -2137,7 +2128,7 @@ static Int128 do_ld_whole_be16(CPUState *cpu, uintptr= _t ra, MMULookupPageData *p, uint64_t ret_be) { int o =3D p->addr & 15; - Int128 x, y =3D load_atomic16_or_exit(cpu, ra, p->haddr - o); + Int128 x, y =3D load_atomic16_or_exit(cpu, ra, p->o.haddr - o); int size =3D p->size; =20 if (!HOST_BIG_ENDIAN) { @@ -2160,8 +2151,8 @@ static uint64_t do_ld_beN(CPUState *cpu, MMULookupPag= eData *p, MemOp atom; unsigned tmp, half_size; =20 - if (unlikely(p->flags & TLB_MMIO)) { - return do_ld_mmio_beN(cpu, p->full, ret_be, p->addr, p->size, + if (unlikely(p->o.flags & TLB_MMIO)) { + return do_ld_mmio_beN(cpu, &p->o.full, ret_be, p->addr, p->size, mmu_idx, type, ra); } =20 @@ -2210,8 +2201,9 @@ static Int128 do_ld16_beN(CPUState *cpu, MMULookupPag= eData *p, uint64_t b; MemOp atom; =20 - if (unlikely(p->flags & TLB_MMIO)) { - return do_ld16_mmio_beN(cpu, p->full, a, p->addr, size, mmu_idx, r= a); + if (unlikely(p->o.flags & TLB_MMIO)) { + return do_ld16_mmio_beN(cpu, &p->o.full, a, p->addr, + size, mmu_idx, ra); } =20 /* @@ -2223,7 +2215,7 @@ static Int128 do_ld16_beN(CPUState *cpu, MMULookupPag= eData *p, case MO_ATOM_SUBALIGN: p->size =3D size - 8; a =3D do_ld_parts_beN(p, a); - p->haddr +=3D size - 8; + p->o.haddr +=3D size - 8; p->size =3D 8; b =3D do_ld_parts_beN(p, 0); break; @@ -2242,7 +2234,7 @@ static Int128 do_ld16_beN(CPUState *cpu, MMULookupPag= eData *p, case MO_ATOM_NONE: p->size =3D size - 8; a =3D do_ld_bytes_beN(p, a); - b =3D ldq_be_p(p->haddr + size - 8); + b =3D ldq_be_p(p->o.haddr + size - 8); break; =20 default: @@ -2255,10 +2247,11 @@ static Int128 do_ld16_beN(CPUState *cpu, MMULookupP= ageData *p, static uint8_t do_ld_1(CPUState *cpu, MMULookupPageData *p, int mmu_idx, MMUAccessType type, uintptr_t ra) { - if (unlikely(p->flags & TLB_MMIO)) { - return do_ld_mmio_beN(cpu, p->full, 0, p->addr, 1, mmu_idx, type, = ra); + if (unlikely(p->o.flags & TLB_MMIO)) { + return do_ld_mmio_beN(cpu, &p->o.full, 0, p->addr, 1, + mmu_idx, type, ra); } else { - return *(uint8_t *)p->haddr; + return *(uint8_t *)p->o.haddr; } } =20 @@ -2267,14 +2260,15 @@ static uint16_t do_ld_2(CPUState *cpu, MMULookupPag= eData *p, int mmu_idx, { uint16_t ret; =20 - if (unlikely(p->flags & TLB_MMIO)) { - ret =3D do_ld_mmio_beN(cpu, p->full, 0, p->addr, 2, mmu_idx, type,= ra); + if (unlikely(p->o.flags & TLB_MMIO)) { + ret =3D do_ld_mmio_beN(cpu, &p->o.full, 0, p->addr, 2, + mmu_idx, type, ra); if ((memop & MO_BSWAP) =3D=3D MO_LE) { ret =3D bswap16(ret); } } else { /* Perform the load host endian, then swap if necessary. */ - ret =3D load_atom_2(cpu, ra, p->haddr, memop); + ret =3D load_atom_2(cpu, ra, p->o.haddr, memop); if (memop & MO_BSWAP) { ret =3D bswap16(ret); } @@ -2287,14 +2281,15 @@ static uint32_t do_ld_4(CPUState *cpu, MMULookupPag= eData *p, int mmu_idx, { uint32_t ret; =20 - if (unlikely(p->flags & TLB_MMIO)) { - ret =3D do_ld_mmio_beN(cpu, p->full, 0, p->addr, 4, mmu_idx, type,= ra); + if (unlikely(p->o.flags & TLB_MMIO)) { + ret =3D do_ld_mmio_beN(cpu, &p->o.full, 0, p->addr, 4, + mmu_idx, type, ra); if ((memop & MO_BSWAP) =3D=3D MO_LE) { ret =3D bswap32(ret); } } else { /* Perform the load host endian. */ - ret =3D load_atom_4(cpu, ra, p->haddr, memop); + ret =3D load_atom_4(cpu, ra, p->o.haddr, memop); if (memop & MO_BSWAP) { ret =3D bswap32(ret); } @@ -2307,14 +2302,15 @@ static uint64_t do_ld_8(CPUState *cpu, MMULookupPag= eData *p, int mmu_idx, { uint64_t ret; =20 - if (unlikely(p->flags & TLB_MMIO)) { - ret =3D do_ld_mmio_beN(cpu, p->full, 0, p->addr, 8, mmu_idx, type,= ra); + if (unlikely(p->o.flags & TLB_MMIO)) { + ret =3D do_ld_mmio_beN(cpu, &p->o.full, 0, p->addr, 8, + mmu_idx, type, ra); if ((memop & MO_BSWAP) =3D=3D MO_LE) { ret =3D bswap64(ret); } } else { /* Perform the load host endian. */ - ret =3D load_atom_8(cpu, ra, p->haddr, memop); + ret =3D load_atom_8(cpu, ra, p->o.haddr, memop); if (memop & MO_BSWAP) { ret =3D bswap64(ret); } @@ -2414,15 +2410,15 @@ static Int128 do_ld16_mmu(CPUState *cpu, vaddr addr, cpu_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD); crosspage =3D mmu_lookup(cpu, addr, oi, ra, MMU_DATA_LOAD, &l); if (likely(!crosspage)) { - if (unlikely(l.page[0].flags & TLB_MMIO)) { - ret =3D do_ld16_mmio_beN(cpu, l.page[0].full, 0, addr, 16, + if (unlikely(l.page[0].o.flags & TLB_MMIO)) { + ret =3D do_ld16_mmio_beN(cpu, &l.page[0].o.full, 0, addr, 16, l.mmu_idx, ra); if ((l.memop & MO_BSWAP) =3D=3D MO_LE) { ret =3D bswap128(ret); } } else { /* Perform the load host endian. */ - ret =3D load_atom_16(cpu, ra, l.page[0].haddr, l.memop); + ret =3D load_atom_16(cpu, ra, l.page[0].o.haddr, l.memop); if (l.memop & MO_BSWAP) { ret =3D bswap128(ret); } @@ -2568,10 +2564,10 @@ static uint64_t do_st_leN(CPUState *cpu, MMULookupP= ageData *p, MemOp atom; unsigned tmp, half_size; =20 - if (unlikely(p->flags & TLB_MMIO)) { - return do_st_mmio_leN(cpu, p->full, val_le, p->addr, + if (unlikely(p->o.flags & TLB_MMIO)) { + return do_st_mmio_leN(cpu, &p->o.full, val_le, p->addr, p->size, mmu_idx, ra); - } else if (unlikely(p->flags & TLB_DISCARD_WRITE)) { + } else if (unlikely(p->o.flags & TLB_DISCARD_WRITE)) { return val_le >> (p->size * 8); } =20 @@ -2582,7 +2578,7 @@ static uint64_t do_st_leN(CPUState *cpu, MMULookupPag= eData *p, atom =3D mop & MO_ATOM_MASK; switch (atom) { case MO_ATOM_SUBALIGN: - return store_parts_leN(p->haddr, p->size, val_le); + return store_parts_leN(p->o.haddr, p->size, val_le); =20 case MO_ATOM_IFALIGN_PAIR: case MO_ATOM_WITHIN16_PAIR: @@ -2593,9 +2589,9 @@ static uint64_t do_st_leN(CPUState *cpu, MMULookupPag= eData *p, ? p->size =3D=3D half_size : p->size >=3D half_size) { if (!HAVE_al8_fast && p->size <=3D 4) { - return store_whole_le4(p->haddr, p->size, val_le); + return store_whole_le4(p->o.haddr, p->size, val_le); } else if (HAVE_al8) { - return store_whole_le8(p->haddr, p->size, val_le); + return store_whole_le8(p->o.haddr, p->size, val_le); } else { cpu_loop_exit_atomic(cpu, ra); } @@ -2605,7 +2601,7 @@ static uint64_t do_st_leN(CPUState *cpu, MMULookupPag= eData *p, case MO_ATOM_IFALIGN: case MO_ATOM_WITHIN16: case MO_ATOM_NONE: - return store_bytes_leN(p->haddr, p->size, val_le); + return store_bytes_leN(p->o.haddr, p->size, val_le); =20 default: g_assert_not_reached(); @@ -2622,10 +2618,10 @@ static uint64_t do_st16_leN(CPUState *cpu, MMULooku= pPageData *p, int size =3D p->size; MemOp atom; =20 - if (unlikely(p->flags & TLB_MMIO)) { - return do_st16_mmio_leN(cpu, p->full, val_le, p->addr, + if (unlikely(p->o.flags & TLB_MMIO)) { + return do_st16_mmio_leN(cpu, &p->o.full, val_le, p->addr, size, mmu_idx, ra); - } else if (unlikely(p->flags & TLB_DISCARD_WRITE)) { + } else if (unlikely(p->o.flags & TLB_DISCARD_WRITE)) { return int128_gethi(val_le) >> ((size - 8) * 8); } =20 @@ -2636,8 +2632,8 @@ static uint64_t do_st16_leN(CPUState *cpu, MMULookupP= ageData *p, atom =3D mop & MO_ATOM_MASK; switch (atom) { case MO_ATOM_SUBALIGN: - store_parts_leN(p->haddr, 8, int128_getlo(val_le)); - return store_parts_leN(p->haddr + 8, p->size - 8, + store_parts_leN(p->o.haddr, 8, int128_getlo(val_le)); + return store_parts_leN(p->o.haddr + 8, p->size - 8, int128_gethi(val_le)); =20 case MO_ATOM_WITHIN16_PAIR: @@ -2645,7 +2641,7 @@ static uint64_t do_st16_leN(CPUState *cpu, MMULookupP= ageData *p, if (!HAVE_CMPXCHG128) { cpu_loop_exit_atomic(cpu, ra); } - return store_whole_le16(p->haddr, p->size, val_le); + return store_whole_le16(p->o.haddr, p->size, val_le); =20 case MO_ATOM_IFALIGN_PAIR: /* @@ -2655,8 +2651,8 @@ static uint64_t do_st16_leN(CPUState *cpu, MMULookupP= ageData *p, case MO_ATOM_IFALIGN: case MO_ATOM_WITHIN16: case MO_ATOM_NONE: - stq_le_p(p->haddr, int128_getlo(val_le)); - return store_bytes_leN(p->haddr + 8, p->size - 8, + stq_le_p(p->o.haddr, int128_getlo(val_le)); + return store_bytes_leN(p->o.haddr + 8, p->size - 8, int128_gethi(val_le)); =20 default: @@ -2667,69 +2663,69 @@ static uint64_t do_st16_leN(CPUState *cpu, MMULooku= pPageData *p, static void do_st_1(CPUState *cpu, MMULookupPageData *p, uint8_t val, int mmu_idx, uintptr_t ra) { - if (unlikely(p->flags & TLB_MMIO)) { - do_st_mmio_leN(cpu, p->full, val, p->addr, 1, mmu_idx, ra); - } else if (unlikely(p->flags & TLB_DISCARD_WRITE)) { + if (unlikely(p->o.flags & TLB_MMIO)) { + do_st_mmio_leN(cpu, &p->o.full, val, p->addr, 1, mmu_idx, ra); + } else if (unlikely(p->o.flags & TLB_DISCARD_WRITE)) { /* nothing */ } else { - *(uint8_t *)p->haddr =3D val; + *(uint8_t *)p->o.haddr =3D val; } } =20 static void do_st_2(CPUState *cpu, MMULookupPageData *p, uint16_t val, int mmu_idx, MemOp memop, uintptr_t ra) { - if (unlikely(p->flags & TLB_MMIO)) { + if (unlikely(p->o.flags & TLB_MMIO)) { if ((memop & MO_BSWAP) !=3D MO_LE) { val =3D bswap16(val); } - do_st_mmio_leN(cpu, p->full, val, p->addr, 2, mmu_idx, ra); - } else if (unlikely(p->flags & TLB_DISCARD_WRITE)) { + do_st_mmio_leN(cpu, &p->o.full, val, p->addr, 2, mmu_idx, ra); + } else if (unlikely(p->o.flags & TLB_DISCARD_WRITE)) { /* nothing */ } else { /* Swap to host endian if necessary, then store. */ if (memop & MO_BSWAP) { val =3D bswap16(val); } - store_atom_2(cpu, ra, p->haddr, memop, val); + store_atom_2(cpu, ra, p->o.haddr, memop, val); } } =20 static void do_st_4(CPUState *cpu, MMULookupPageData *p, uint32_t val, int mmu_idx, MemOp memop, uintptr_t ra) { - if (unlikely(p->flags & TLB_MMIO)) { + if (unlikely(p->o.flags & TLB_MMIO)) { if ((memop & MO_BSWAP) !=3D MO_LE) { val =3D bswap32(val); } - do_st_mmio_leN(cpu, p->full, val, p->addr, 4, mmu_idx, ra); - } else if (unlikely(p->flags & TLB_DISCARD_WRITE)) { + do_st_mmio_leN(cpu, &p->o.full, val, p->addr, 4, mmu_idx, ra); + } else if (unlikely(p->o.flags & TLB_DISCARD_WRITE)) { /* nothing */ } else { /* Swap to host endian if necessary, then store. */ if (memop & MO_BSWAP) { val =3D bswap32(val); } - store_atom_4(cpu, ra, p->haddr, memop, val); + store_atom_4(cpu, ra, p->o.haddr, memop, val); } } =20 static void do_st_8(CPUState *cpu, MMULookupPageData *p, uint64_t val, int mmu_idx, MemOp memop, uintptr_t ra) { - if (unlikely(p->flags & TLB_MMIO)) { + if (unlikely(p->o.flags & TLB_MMIO)) { if ((memop & MO_BSWAP) !=3D MO_LE) { val =3D bswap64(val); } - do_st_mmio_leN(cpu, p->full, val, p->addr, 8, mmu_idx, ra); - } else if (unlikely(p->flags & TLB_DISCARD_WRITE)) { + do_st_mmio_leN(cpu, &p->o.full, val, p->addr, 8, mmu_idx, ra); + } else if (unlikely(p->o.flags & TLB_DISCARD_WRITE)) { /* nothing */ } else { /* Swap to host endian if necessary, then store. */ if (memop & MO_BSWAP) { val =3D bswap64(val); } - store_atom_8(cpu, ra, p->haddr, memop, val); + store_atom_8(cpu, ra, p->o.haddr, memop, val); } } =20 @@ -2822,19 +2818,20 @@ static void do_st16_mmu(CPUState *cpu, vaddr addr, = Int128 val, cpu_req_mo(TCG_MO_LD_ST | TCG_MO_ST_ST); crosspage =3D mmu_lookup(cpu, addr, oi, ra, MMU_DATA_STORE, &l); if (likely(!crosspage)) { - if (unlikely(l.page[0].flags & TLB_MMIO)) { + if (unlikely(l.page[0].o.flags & TLB_MMIO)) { if ((l.memop & MO_BSWAP) !=3D MO_LE) { val =3D bswap128(val); } - do_st16_mmio_leN(cpu, l.page[0].full, val, addr, 16, l.mmu_idx= , ra); - } else if (unlikely(l.page[0].flags & TLB_DISCARD_WRITE)) { + do_st16_mmio_leN(cpu, &l.page[0].o.full, val, addr, + 16, l.mmu_idx, ra); + } else if (unlikely(l.page[0].o.flags & TLB_DISCARD_WRITE)) { /* nothing */ } else { /* Swap to host endian if necessary, then store. */ if (l.memop & MO_BSWAP) { val =3D bswap128(val); } - store_atom_16(cpu, ra, l.page[0].haddr, l.memop, val); + store_atom_16(cpu, ra, l.page[0].o.haddr, l.memop, val); } return; } --=20 2.43.0