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([71.212.136.242]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2ea024ec723sm1484438a91.46.2024.11.14.08.01.51 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Nov 2024 08:01:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1731600113; x=1732204913; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=X2yiS+ruW+gkzVWGmQM9TvYN4B8BJM2W1/RTtxTmteg=; b=SvUGTtTSIHBdbYvIX9y2bH/dIRfNWgZnAMq4nB5nQlWXF6D0cGHJLI1r5/6gUVqt8f SCheJco3l8P17/ipSMDikz+/0qFI0RuEKHfYrPjGOly1JS/PdBNBWk7s286tqhXMw1wi OwmpkjSTFB95LVykP0z6jbSE4aJp2D40LkeT4rSL+WGyFZhrZWgMEliYhRI2GT7GLfcd 3QTcyIhSTVZg22EeI5o68xsBfs159dqFIuQHoBYg+AeK5x7RWhoIcM+zcKkFhrGEFLWo psqVXQc/m1VzUoskGDbd2hHI71lOsnMhtWpFaWAIVCivh4P8ztFlWPy3bpHYUz0Ka3Gj BVzQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1731600113; x=1732204913; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=X2yiS+ruW+gkzVWGmQM9TvYN4B8BJM2W1/RTtxTmteg=; b=UBHEtzG4kYyq8jtXm4Lc9Uir/Qn8bXvxWYBqBLE8ck4U1nsCm3aXI/ztFkW45E1zlW so8jCciGg/yEJ3cbW9Nhh5vKhMTVtPexG4LKmO1WSU8Gz6bX6xRJfsd78i/UxX6OEFwm DMpIBYrr+PRDCGU++yxEwWbwi1DRahSaiFW5GfTJZGJKj5JBB31NIDH/jM5fq6l47Mmy EHp7eOhNm4lJ1rFk30IPakL4qVajQjbW+CehOD50Msm5PvWkuPl4Zg9FfAJcAF01uHzI iwUhdIh5MUe9plT7gRk3hYXBULhQ/L91GqWuWWil6c2V8DdTOJ23NcRw9nH1mL05smKj h3FA== X-Gm-Message-State: AOJu0YwTk9I1LYzgTQ8JvBH8zWo8X3sJsMAj2ct6lJjWI7bFQZcVQArx /l11p4sB3ciTpI1PfSky1CEYfomNIS8OBuZCVqV1f4DYS2qxiwHlHJ27Wcd7wGytV5BRmFo9nOB 5 X-Google-Smtp-Source: AGHT+IHuqzTniQ8yFTsrocheUor779ihuJrnuyUderscn0uCVN5kbFNNswxyGQ4yCSVvR+90QfRkvw== X-Received: by 2002:a17:90b:3b8b:b0:2e2:85b8:14e with SMTP id 98e67ed59e1d1-2e9fe6b8273mr5628147a91.15.1731600111789; Thu, 14 Nov 2024 08:01:51 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 23/54] accel/tcg: Check original prot bits for read in atomic_mmu_lookup Date: Thu, 14 Nov 2024 08:00:59 -0800 Message-ID: <20241114160131.48616-24-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241114160131.48616-1-richard.henderson@linaro.org> References: <20241114160131.48616-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1030; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1030.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1731600184618116600 Content-Type: text/plain; charset="utf-8" In the mist before CPUTLBEntryFull existed, we had to be clever to detect write-only pages. Now we can directly test the saved prot bits, which is clearer. Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier --- accel/tcg/cputlb.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index c975dd2322..ae3a99eb47 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -1854,14 +1854,13 @@ static void *atomic_mmu_lookup(CPUState *cpu, vaddr= addr, MemOpIdx oi, flags &=3D ~TLB_INVALID_MASK; } } + full =3D &cpu->neg.tlb.d[mmu_idx].fulltlb[index]; =20 /* * Let the guest notice RMW on a write-only page. * We have just verified that the page is writable. - * Subpage lookups may have left TLB_INVALID_MASK set, - * but addr_read will only be -1 if PAGE_READ was unset. */ - if (unlikely(tlbe->addr_read =3D=3D -1)) { + if (unlikely(!(full->prot & PAGE_READ))) { tlb_fill_align(cpu, addr, MMU_DATA_LOAD, mmu_idx, 0, size, false, retaddr); /* @@ -1899,7 +1898,6 @@ static void *atomic_mmu_lookup(CPUState *cpu, vaddr a= ddr, MemOpIdx oi, } =20 hostaddr =3D (void *)((uintptr_t)addr + tlbe->addend); - full =3D &cpu->neg.tlb.d[mmu_idx].fulltlb[index]; =20 if (unlikely(flags & TLB_NOTDIRTY)) { notdirty_write(cpu, addr, size, full, retaddr); --=20 2.43.0