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([71.212.136.242]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2ea024ec723sm1484438a91.46.2024.11.14.08.01.50 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Nov 2024 08:01:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1731600111; x=1732204911; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=ZzUqo5EQVmmILWK3/HrkYlBd4Dl5eFiN4ejkIAqPzrI=; b=arhER/1wqg1QpTgXVPn0NDZBKZSxaiE1pt8lAv5E7XFewOz2gWk0P6b7bEQAdFDxiM yCBjAEnGRjMSHd58arzyUHefPL0LZuFMRNOITl7t5OpYkJPk81ckp2+ChlXbEqC7+4D0 Gkjh3oGFwOYk/jIIJM8tmOLKatsn0/eOzlz0HJgNieuQjzJJKZcLfzVurpXmCtPi+jPj MCpw6xTw75ivUW7ezfF81R1nUwsjnIeBMvI3P4nMfdfOjC+/7EjnTB4n4m29C/ia/JId YaNvXJRCiscZzy5Y8FbeDvgQvN2U9cr3nRvn8o2ZHH/N1bp2Yv3FlP3omIvmvINaAumJ Eelg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1731600111; x=1732204911; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ZzUqo5EQVmmILWK3/HrkYlBd4Dl5eFiN4ejkIAqPzrI=; b=a8UCiL/vjeFnHvDRidBZSB9ApfhtRq/Q82v2FeoL4lbWrFj8VsDxGH2JZKQvAeB6YF 94UWwfJDUlxivMVcOioc9DKbA+68yNmtiXi03POiv+7mIkGRbEFGJtA6z6+JmnuXGkcu 6s8Wj6gnZTYIbW8psX+57dxMKsChg0Iub0IsUiJ0iBYaRlXXV9fVw0/YSZetFJDzCLWD 1pIHqzNVV97XrIjP/vcC7LC4ePOoJWKZL3waHtk3W47FCj07MkqS9rzklaVSUWFnZPKJ /38s27DIZNIDUTk1pfaVS3NIg+gzmCzKLJ5qB78ONQBnb5X/x8G5AGBJMK7LZbtMDqLW 2Q6Q== X-Gm-Message-State: AOJu0Yzow/j0oLzGsY0bAConhPJw4X9UQdU4Q95MDhbDJ64kqXhzO8lx D5TmM8+a8Q3y3oA+G8Zs7ahwTaTV/1cCk8q5D6hW+b5h8l8gjGJpfNDDEoPGu5DcvSr7FUt2WWO O X-Google-Smtp-Source: AGHT+IEC8cVZjuJs8fTcgyRwOAB4vOr7dnWsxczMYwi3IO/oI4UAakxoV9jKUiEFGz7BQpnwwUHAUw== X-Received: by 2002:a17:90b:1a92:b0:2d8:82a2:b093 with SMTP id 98e67ed59e1d1-2e9b1720e9dmr31250421a91.13.1731600111017; Thu, 14 Nov 2024 08:01:51 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 22/54] accel/tcg: Call cpu_ld*_code_mmu from cpu_ld*_code Date: Thu, 14 Nov 2024 08:00:58 -0800 Message-ID: <20241114160131.48616-23-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241114160131.48616-1-richard.henderson@linaro.org> References: <20241114160131.48616-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1029; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1029.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1731600723211116600 Content-Type: text/plain; charset="utf-8" Ensure a common entry point for all code lookups. Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier --- accel/tcg/cputlb.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index a4c69bcbf1..c975dd2322 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -2924,28 +2924,28 @@ uint32_t cpu_ldub_code(CPUArchState *env, abi_ptr a= ddr) { CPUState *cs =3D env_cpu(env); MemOpIdx oi =3D make_memop_idx(MO_UB, cpu_mmu_index(cs, true)); - return do_ld1_mmu(cs, addr, oi, 0, MMU_INST_FETCH); + return cpu_ldb_code_mmu(env, addr, oi, 0); } =20 uint32_t cpu_lduw_code(CPUArchState *env, abi_ptr addr) { CPUState *cs =3D env_cpu(env); MemOpIdx oi =3D make_memop_idx(MO_TEUW, cpu_mmu_index(cs, true)); - return do_ld2_mmu(cs, addr, oi, 0, MMU_INST_FETCH); + return cpu_ldw_code_mmu(env, addr, oi, 0); } =20 uint32_t cpu_ldl_code(CPUArchState *env, abi_ptr addr) { CPUState *cs =3D env_cpu(env); MemOpIdx oi =3D make_memop_idx(MO_TEUL, cpu_mmu_index(cs, true)); - return do_ld4_mmu(cs, addr, oi, 0, MMU_INST_FETCH); + return cpu_ldl_code_mmu(env, addr, oi, 0); } =20 uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr addr) { CPUState *cs =3D env_cpu(env); MemOpIdx oi =3D make_memop_idx(MO_TEUQ, cpu_mmu_index(cs, true)); - return do_ld8_mmu(cs, addr, oi, 0, MMU_INST_FETCH); + return cpu_ldq_code_mmu(env, addr, oi, 0); } =20 uint8_t cpu_ldb_code_mmu(CPUArchState *env, abi_ptr addr, --=20 2.43.0