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[176.184.43.163]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-381edc1104asm14091743f8f.88.2024.11.11.14.45.04 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 11 Nov 2024 14:45:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1731365106; x=1731969906; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Zn8f/p6DL92t0jLH33Kyf5vwc7bUOJ3AokPYLSOVB2Q=; b=jO25ZuAnB26XwL4wB6HdwAI1qYtsYbG6PqNlP2qIN6KxCrbzUdWV8y09UcoBn37djJ 7E4ZXaCab61ju2I7iOObHMHGXa/Wc2O1mih+zV5Qzx24igm2vXPYaoCBlhRz8c1KAt6R qqDz97ukQn5MZ78J3FZTEoSwaULps6LNPWs6AXLIwHHyYCsHwqWBaVgaoZ0YwgZTnm8k 03JYindaVWt/SlLpuf02ijVeGl19e9RDKOI16BGn+uyYKDamQJRiGhTA330b6rCGZ0aj xV186yQe/LgWCEwtcKOYCJSWfZWj/W71moqElwr1l6uYFvLctDdueDGG5CDXu4f+QiD3 Hm4g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1731365106; x=1731969906; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Zn8f/p6DL92t0jLH33Kyf5vwc7bUOJ3AokPYLSOVB2Q=; b=b2Uuyrc9t8oHWwYK5RLOJWjj6bC74IRrVPgYUF8nEpBkG2O164SMGPszqpTusIDCCZ WmRQr6tp/62Lq6mVGROk2wYSOqpcdW7stxeyp+KdWMOEbjZVmSX6QDx7TsoI5lOQmZkh uyII81KCpNtNIKNiiSzfv9Mo7/iLyDwNUDaFjoi4gs9XHrRA+j4eyB3OyVbWoN2xbFmD OLQj48TXaEEaYQfH320qBJIGGNOM8FX5hXmNGcmr9YBfD1lt00e6aAmJ3oPqx3+wFcnz 0x9UiPSnt+L9Ac1B0ClJsru2wzeD+IVeBoiwbfFWugL9DThzUR+fjIm6aakopo15XLvD cg5Q== X-Gm-Message-State: AOJu0Yww8AJkUARW4n3dQs9R9X+u+NtWMG/jjlF7JoFmio/8ebOqCnIk Jn0Vbz29X+DSvg5KUL+0ZIgEGYvqwxq1SgZwrTErFncMUQ8PbT2S6Hz4uDFIsSRwRM0WjRjmBxc n X-Google-Smtp-Source: AGHT+IGnufGpLnu08DnDRVPEGWej0Z30bJDJugPkzqjLjYqYAPVbW6vJke45qQD1ovd9e0OvPxD+8A== X-Received: by 2002:a05:6000:2709:b0:381:f443:21d0 with SMTP id ffacd0b85a97d-381f443253dmr7670163f8f.59.1731365106061; Mon, 11 Nov 2024 14:45:06 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Aleksandar Rikalo , Aurelien Jarno , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Jiaxun Yang , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH 2/2] target/mips: Convert nanoMIPS LSA opcode to decodetree Date: Mon, 11 Nov 2024 23:44:52 +0100 Message-ID: <20241111224452.61276-3-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241111224452.61276-1-philmd@linaro.org> References: <20241111224452.61276-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::429; envelope-from=philmd@linaro.org; helo=mail-wr1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1731365134189116600 From: Philippe Mathieu-Daud=C3=A9 Simply call the generic gen_lsa() helper, taking care to substract 1 to the shift field. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- target/mips/tcg/nanomips32.decode | 8 ++++++++ target/mips/tcg/nanomips_translate.c | 12 ++++++++++++ target/mips/tcg/nanomips_translate.c.inc | 9 --------- 3 files changed, 20 insertions(+), 9 deletions(-) diff --git a/target/mips/tcg/nanomips32.decode b/target/mips/tcg/nanomips32= .decode index 9cecf1e13d..11bf5cd6c4 100644 --- a/target/mips/tcg/nanomips32.decode +++ b/target/mips/tcg/nanomips32.decode @@ -6,3 +6,11 @@ # # Reference: nanoMIPS32 Instruction Set Technical Reference Manual # (Document Number: MD01247) + +&r rs rt rd sa + +%lsa_u2 9:2 !function=3Dminus_1 + +@lsa ...... rt:5 rs:5 rd:5 .. --- ... ... &r sa=3D%lsa_u2 + +LSA 001000 ..... ..... ..... .. ... 001 111 @lsa diff --git a/target/mips/tcg/nanomips_translate.c b/target/mips/tcg/nanomip= s_translate.c index c148c13ed9..9a6db4a828 100644 --- a/target/mips/tcg/nanomips_translate.c +++ b/target/mips/tcg/nanomips_translate.c @@ -9,6 +9,18 @@ #include "qemu/osdep.h" #include "translate.h" =20 +static inline int minus_1(DisasContext *ctx, int x) +{ + return x - 1; +} + /* Include the auto-generated decoders. */ #include "decode-nanomips16.c.inc" #include "decode-nanomips32.c.inc" + +static bool trans_LSA(DisasContext *ctx, arg_r *a) +{ + gen_lsa(ctx, a->rd, a->rt, a->rs, a->sa); + + return true; +} diff --git a/target/mips/tcg/nanomips_translate.c.inc b/target/mips/tcg/nan= omips_translate.c.inc index e401b92bfd..0e012ab3d0 100644 --- a/target/mips/tcg/nanomips_translate.c.inc +++ b/target/mips/tcg/nanomips_translate.c.inc @@ -399,7 +399,6 @@ enum { /* POOL32A7 instruction pool */ enum { NM_P_LSX =3D 0x00, - NM_LSA =3D 0x01, NM_EXTW =3D 0x03, NM_POOL32AXF =3D 0x07, }; @@ -3625,14 +3624,6 @@ static int decode_nanomips_32_48_opc(CPUMIPSState *e= nv, DisasContext *ctx) case NM_P_LSX: gen_p_lsx(ctx, rd, rs, rt); break; - case NM_LSA: - /* - * In nanoMIPS, the shift field directly encodes the shift - * amount, meaning that the supported shift values are in - * the range 0 to 3 (instead of 1 to 4 in MIPSR6). - */ - gen_lsa(ctx, rd, rt, rs, extract32(ctx->opcode, 9, 2) - 1); - break; case NM_EXTW: gen_ext(ctx, 32, rd, rs, rt, extract32(ctx->opcode, 6, 5)); break; --=20 2.45.2