From nobody Sat Nov 23 23:04:20 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1730789300; cv=none; d=zohomail.com; s=zohoarc; b=HVz9zj/LdQ5uEOtx4mfkFI06R52KUNrD5IgkDXfU9kn/h5dVONzfSa/t8AQKd/4G17ot70xxhcfWbeRDyVasN1vtPEkBb/p0odbZr3Wzzyn3edrlT4towZpJ7Z/CeygvtXXV++LlJG52pnB2tPny4WreV9lQPleLuliqcScE85Q= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1730789300; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=rcVx+IWxwXuwDOaJ92dKTKREE9riC7H6Rrd1CJzoJDE=; b=Zew8NZJC0BNsP+pKanEfVFKFHsFMPV1I0BofZcNaiIFMGJW0eGd5NXpxArSx9p3t4vEak1lCUH12iU+syK/eE7tkvM3EiW+z/41PiG6g1IFcKRrf/3W1ypiA9edlIOugM5ZUgDTVDhjfFXBxZ98WDf/sBZppB3UFw1Lg2gAQyFw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1730789300279112.32842451532315; Mon, 4 Nov 2024 22:48:20 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1t8DHE-0006X3-92; Tue, 05 Nov 2024 01:42:57 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1t8DF6-0003Xb-Vn for qemu-devel@nongnu.org; Tue, 05 Nov 2024 01:40:50 -0500 Received: from mgamail.intel.com ([198.175.65.18]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1t8DF2-0001vd-FF for qemu-devel@nongnu.org; Tue, 05 Nov 2024 01:40:43 -0500 Received: from fmviesa009.fm.intel.com ([10.60.135.149]) by orvoesa110.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Nov 2024 22:40:18 -0800 Received: from lxy-clx-4s.sh.intel.com ([10.239.48.52]) by fmviesa009.fm.intel.com with ESMTP; 04 Nov 2024 22:40:14 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1730788840; x=1762324840; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=R3qGJveZ2fmuHjYuT93ENGzexAuyNwuq1EZaJ0+cqc0=; b=V2xxfs4KNBt4H4q0DTX+Xu8OKd1kmXgIfF0s5a27QWiJZNP4fm0iTrql u9RbcRpjKmYh+NjrbTzo7Dj3T4UrXxwjLGNGfbqtRHNDrfGcrnwYQMQEa ea8RnIr28gjGPRMhlWmh3HhrvAwjbzkayR8/A9ZTxTj2UNXzqaV8JLw+I vRTlZuwWueCota1pSWvXNRFFx7T1IUQyUvyGKShry8ki51Fl9HSK6nsf7 zPsx4vUUpXA28S6TVKwxVpu+R/VFePyVIYTNDd3uZWhI8x1TVMYkm88Ze bXvnCL12rc/nj4eZBb5ThzHNhm+BZb9sNAJFd7N30537++UdqA3tnh9pv A==; X-CSE-ConnectionGUID: B9a/kTtuSYWSRguMoZGYVA== X-CSE-MsgGUID: ySkMU0xyS4WIdddt8Ewd/w== X-IronPort-AV: E=McAfee;i="6700,10204,11222"; a="30689917" X-IronPort-AV: E=Sophos;i="6.11,199,1725346800"; d="scan'208";a="30689917" X-CSE-ConnectionGUID: cCHE70fzS4uPY/tjfHAGjA== X-CSE-MsgGUID: 4cVcz/YWTguoW1CHzdYfFA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,259,1725346800"; d="scan'208";a="83990026" From: Xiaoyao Li To: Paolo Bonzini , Riku Voipio , Richard Henderson , Zhao Liu , "Michael S. Tsirkin" , Marcel Apfelbaum , Igor Mammedov , Ani Sinha Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Yanan Wang , Cornelia Huck , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , Eric Blake , Markus Armbruster , Marcelo Tosatti , rick.p.edgecombe@intel.com, kvm@vger.kernel.org, qemu-devel@nongnu.org, xiaoyao.li@intel.com Subject: [PATCH v6 55/60] i386/tdx: Fetch and validate CPUID of TD guest Date: Tue, 5 Nov 2024 01:24:03 -0500 Message-Id: <20241105062408.3533704-56-xiaoyao.li@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241105062408.3533704-1-xiaoyao.li@intel.com> References: <20241105062408.3533704-1-xiaoyao.li@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=198.175.65.18; envelope-from=xiaoyao.li@intel.com; helo=mgamail.intel.com X-Spam_score_int: -39 X-Spam_score: -4.0 X-Spam_bar: ---- X-Spam_report: (-4.0 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.34, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, HK_RANDOM_ENVFROM=0.001, HK_RANDOM_FROM=0.781, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1730789301291116600 Content-Type: text/plain; charset="utf-8" Use KVM_TDX_GET_CPUID to get the CPUIDs that are managed and enfored by TDX module for TD guest. Check QEMU's configuration against the fetched data. Print wanring message when 1. a feature is not supported but requested by QEMU or 2. QEMU doesn't want to expose a feature while it is enforced enabled. - If cpu->enforced_cpuid is not set, prints the warning message of both 1) and 2) and tweak QEMU's configuration. - If cpu->enforced_cpuid is set, quit if any case of 1) or 2). Signed-off-by: Xiaoyao Li --- target/i386/kvm/tdx.c | 81 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 81 insertions(+) diff --git a/target/i386/kvm/tdx.c b/target/i386/kvm/tdx.c index e7e0f073dfc9..9cb099e160e4 100644 --- a/target/i386/kvm/tdx.c +++ b/target/i386/kvm/tdx.c @@ -673,6 +673,86 @@ static uint32_t tdx_adjust_cpuid_features(X86Confident= ialGuest *cg, return value; } =20 + +static void tdx_fetch_cpuid(CPUState *cpu, struct kvm_cpuid2 *fetch_cpuid) +{ + int r; + + r =3D tdx_vcpu_ioctl(cpu, KVM_TDX_GET_CPUID, 0, fetch_cpuid); + if (r) { + error_report("KVM_TDX_GET_CPUID failed %s", strerror(-r)); + exit(1); + } +} + +static int tdx_check_features(X86ConfidentialGuest *cg, CPUState *cs) +{ + uint64_t actual, requested, unavailable, forced_on; + g_autofree struct kvm_cpuid2 *fetch_cpuid; + const char *forced_on_prefix =3D NULL; + const char *unav_prefix =3D NULL; + struct kvm_cpuid_entry2 *entry; + X86CPU *cpu =3D X86_CPU(cs); + CPUX86State *env =3D &cpu->env; + FeatureWordInfo *wi; + FeatureWord w; + bool mismatch =3D false; + + fetch_cpuid =3D g_malloc0(sizeof(*fetch_cpuid) + + sizeof(struct kvm_cpuid_entry2) * KVM_MAX_CPUID_ENTRIE= S); + tdx_fetch_cpuid(cs, fetch_cpuid); + + if (cpu->check_cpuid || cpu->enforce_cpuid) { + unav_prefix =3D "TDX doesn't support requested feature"; + forced_on_prefix =3D "TDX forcibly sets the feature"; + } + + for (w =3D 0; w < FEATURE_WORDS; w++) { + wi =3D &feature_word_info[w]; + actual =3D 0; + + switch (wi->type) { + case CPUID_FEATURE_WORD: + entry =3D cpuid_find_entry(fetch_cpuid, wi->cpuid.eax, wi->cpu= id.ecx); + if (!entry) { + /* + * If KVM doesn't report it means it's totally configurable + * by QEMU + */ + continue; + } + + actual =3D cpuid_entry_get_reg(entry, wi->cpuid.reg); + break; + case MSR_FEATURE_WORD: + /* + * TODO: + * validate MSR features when KVM has interface report them. + */ + continue; + } + + requested =3D env->features[w]; + unavailable =3D requested & ~actual; + mark_unavailable_features(cpu, w, unavailable, unav_prefix); + if (unavailable) { + mismatch =3D true; + } + + forced_on =3D actual & ~requested; + mark_forced_on_features(cpu, w, forced_on, forced_on_prefix); + if (forced_on) { + mismatch =3D true; + } + } + + if (cpu->enforce_cpuid && mismatch) { + return -1; + } + + return 0; +} + static int tdx_validate_attributes(TdxGuest *tdx, Error **errp) { if ((tdx->attributes & ~tdx_caps->supported_attrs)) { @@ -1019,4 +1099,5 @@ static void tdx_guest_class_init(ObjectClass *oc, voi= d *data) x86_klass->cpu_instance_init =3D tdx_cpu_instance_init; x86_klass->cpu_realizefn =3D tdx_cpu_realizefn; x86_klass->adjust_cpuid_features =3D tdx_adjust_cpuid_features; + x86_klass->check_features =3D tdx_check_features; } --=20 2.34.1