From nobody Sat Nov 23 22:19:51 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1730789232; cv=none; d=zohomail.com; s=zohoarc; b=GUiPr4HDMuk8vrqxYXsOcXfs/GTbn9974fmVfhI93CyC3rvSZ6ytQgzkqBFL6qyJo/vai3x6Hlgj8OBP1abQ5DGNelgGq+Jt+o7EZyqF1bBHBvO9hYz38eLuSDdfpOhLSyJxYXgUcDBgMKTFI3wlkU7txjaszjHsdGpN3bWnOP0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1730789232; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=CKuZpZe7FwkMKxWfDZAfSO3PCdo1NAzA3UFbTcU/62k=; b=NUPW9D3YhlCdrj2mSGlnIu0jIBbVvNknrxXW5B/EbJz0HyC5U8YR8+IrYj9en7ofEmpmDphJhX+95YDULuIDpUMUhPaG8zPbonmzxIR8RJpsIe2+CEUvhI3rrQF86lRY6fYFVgcarEzduJaMllL60KyWkwcJDP382FGX0YsJxzE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1730789232867842.6611191068524; Mon, 4 Nov 2024 22:47:12 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1t8DH4-0005lK-B9; Tue, 05 Nov 2024 01:42:47 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1t8DEh-0003Ul-F3 for qemu-devel@nongnu.org; Tue, 05 Nov 2024 01:40:28 -0500 Received: from mgamail.intel.com ([198.175.65.18]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1t8DEa-0001w0-9p for qemu-devel@nongnu.org; Tue, 05 Nov 2024 01:40:13 -0500 Received: from fmviesa009.fm.intel.com ([10.60.135.149]) by orvoesa110.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Nov 2024 22:40:01 -0800 Received: from lxy-clx-4s.sh.intel.com ([10.239.48.52]) by fmviesa009.fm.intel.com with ESMTP; 04 Nov 2024 22:39:57 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1730788812; x=1762324812; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=+RyN2ozpNF9/qWmSSJyynxhc2IsEJ+Gu8thAMTAlGko=; b=bpMcBrIaEuS8eG15sHJprjKq2P/bCUlxHliBH1377vHEKWzclQGFzWG9 7Ho8OFrRnFFRiiBCIfwe3U0yNXFvizn3yb9m2WViIzN8op0T5DsWs+BV6 mlvWTBOsdFHRn3hiMk+z7H3ArsxWUBBVBZZAizMWrb1ghYKI3kGjU6P1Y dPcb+PjEBM++Aqhv3hk8n93NbJstzuccIrs9GjK7U1YoWThq0trdyT+VL US1muR3I2LtqWNFMrk/M1G0I79eAu1PiAKlDFsSA7tZitLKWey9kVqRUy VqkdKRyTFKirWAKP/7Xqo26QlGFOY/QYGzR4f29DZmnmhWQLBJREDqrTJ Q==; X-CSE-ConnectionGUID: DIy7Jf1WQEmj/lS1URSlxg== X-CSE-MsgGUID: +y/VQ/3PQ62KA4QHNm9KtQ== X-IronPort-AV: E=McAfee;i="6700,10204,11222"; a="30689872" X-IronPort-AV: E=Sophos;i="6.11,199,1725346800"; d="scan'208";a="30689872" X-CSE-ConnectionGUID: 5jqpsLxmSO+hY5dQHtlrcg== X-CSE-MsgGUID: fhbU8dw3QlKkdGhUX6WkBg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,259,1725346800"; d="scan'208";a="83989877" From: Xiaoyao Li To: Paolo Bonzini , Riku Voipio , Richard Henderson , Zhao Liu , "Michael S. Tsirkin" , Marcel Apfelbaum , Igor Mammedov , Ani Sinha Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Yanan Wang , Cornelia Huck , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , Eric Blake , Markus Armbruster , Marcelo Tosatti , rick.p.edgecombe@intel.com, kvm@vger.kernel.org, qemu-devel@nongnu.org, xiaoyao.li@intel.com Subject: [PATCH v6 51/60] i386/tdx: Mask off CPUID bits by unsupported XFAM Date: Tue, 5 Nov 2024 01:23:59 -0500 Message-Id: <20241105062408.3533704-52-xiaoyao.li@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241105062408.3533704-1-xiaoyao.li@intel.com> References: <20241105062408.3533704-1-xiaoyao.li@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=198.175.65.18; envelope-from=xiaoyao.li@intel.com; helo=mgamail.intel.com X-Spam_score_int: -39 X-Spam_score: -4.0 X-Spam_bar: ---- X-Spam_report: (-4.0 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.34, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, HK_RANDOM_ENVFROM=0.001, HK_RANDOM_FROM=0.781, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1730789234935116600 Content-Type: text/plain; charset="utf-8" Mask off the CPUID bits as unsupported if its matched XFAM bit is not supported. Otherwise, it might fail the check in setup_td_xfam() as unsupported XFAM being requested. Signed-off-by: Xiaoyao Li --- target/i386/kvm/tdx.c | 38 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/target/i386/kvm/tdx.c b/target/i386/kvm/tdx.c index 5ac5f93907ca..e7e0f073dfc9 100644 --- a/target/i386/kvm/tdx.c +++ b/target/i386/kvm/tdx.c @@ -24,6 +24,7 @@ #include =20 #include "cpu.h" +#include "cpu-internal.h" #include "host-cpu.h" #include "hw/i386/e820_memory_layout.h" #include "hw/i386/x86.h" @@ -585,6 +586,42 @@ static void tdx_mask_cpuid_by_attrs(uint32_t feature, = uint32_t index, } } =20 +static void tdx_mask_cpuid_by_xfam(uint32_t feature, uint32_t index, + int reg, uint32_t *value) +{ + const FeatureWordInfo *f; + const ExtSaveArea *esa; + uint64_t unavail =3D 0; + int i; + + assert(tdx_caps); + + for (i =3D 0; i < ARRAY_SIZE(x86_ext_save_areas); i++) { + if ((1ULL << i) & tdx_caps->supported_xfam) { + continue; + } + + if (!((1ULL << i) & CPUID_XSTATE_MASK)) { + continue; + } + + esa =3D &x86_ext_save_areas[i]; + f =3D &feature_word_info[esa->feature]; + assert(f->type =3D=3D CPUID_FEATURE_WORD); + if (f->cpuid.eax !=3D feature || + (f->cpuid.needs_ecx && f->cpuid.ecx !=3D index) || + f->cpuid.reg !=3D reg) { + continue; + } + + unavail |=3D esa->bits; + } + + if (unavail) { + *value &=3D ~unavail; + } +} + static uint32_t tdx_adjust_cpuid_features(X86ConfidentialGuest *cg, uint32_t feature, uint32_t index, int reg, uint32_t value) @@ -619,6 +656,7 @@ static uint32_t tdx_adjust_cpuid_features(X86Confidenti= alGuest *cg, } =20 tdx_mask_cpuid_by_attrs(feature, index, reg, &value); + tdx_mask_cpuid_by_xfam(feature, index, reg, &value); =20 e =3D cpuid_find_entry(&tdx_fixed0_bits.cpuid, feature, index); if (e) { --=20 2.34.1