From nobody Sat Nov 23 23:06:20 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1730788694; cv=none; d=zohomail.com; s=zohoarc; b=P2I24sLSrF2twShSfI0xY6sZu/kaUnPnqZvJ4bL0lWbzKnsLQ0s5koL5rLSTMQChjQmzeaMkqIEYZH01ItCZGuLdpGjApCEy+imL5FeJ+sHq6eHG6Ll7k20eRpPq4ntJOF7FlGQbpj0i2Ex/mxykJrLyKhsONsnDdMcnM/S1VRc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1730788694; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=1fVhnFXnzcgdVWROMJJC6Cy5ObqCKIraGgFczFmVUiM=; b=eb/SeLhnqpYa8nk1ff7x+v2hCXhaYSeAIDMm0jpnjZB4tDKmLKJFRVP9LEPlMnU5mqTGOCeJg05J3nqlF8XuVYc6nDr6xrSJgfY+u/QR0oqjFyoBKCxxVrjGduj9cOU/2KK83A2mDrC0WzaSHX4d1uG1ju1cu2wbX3pRx+2/8sM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1730788694540853.0801426102859; Mon, 4 Nov 2024 22:38:14 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1t8DCA-0005V3-W0; Tue, 05 Nov 2024 01:37:43 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1t8DBw-00051t-FL for qemu-devel@nongnu.org; Tue, 05 Nov 2024 01:37:33 -0500 Received: from mgamail.intel.com ([198.175.65.18]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1t8DBu-0001tE-6S for qemu-devel@nongnu.org; Tue, 05 Nov 2024 01:37:28 -0500 Received: from fmviesa009.fm.intel.com ([10.60.135.149]) by orvoesa110.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Nov 2024 22:37:25 -0800 Received: from lxy-clx-4s.sh.intel.com ([10.239.48.52]) by fmviesa009.fm.intel.com with ESMTP; 04 Nov 2024 22:37:21 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1730788646; x=1762324646; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=VOjci9p7Zb1n81rBNztaLxcXzrYXbaFL+FZxHq6NkWo=; b=lj4Vic8YfZwfCLstfDxfrsDDPvsPWL3W/kHiude85VQ048Uhgx/0c/GS R0ztmLuQUxTIZ30EMvJ2lK/tfZelvkEFmQKz8owHjmulQi8IeQegZuMnZ Psm19GkGSNMk+8MnEwxRmCZ/syCT6gbeDGhBvmt7gUnbmEv1LumKW503M UjqYEoHMSWuv5eNW8ncfV4U+2tOkP3LBYJA7GS97W7ASIpPduRbT5lYdM fkrgaZTNv3SI/R7aAqFmZbvAnKIeRXVMCMCxwkOGLynVSgOM8HnIuJ1t1 BskYF/VlPktp/RjqOFwC9xA9Bc7K3qx/Dz3Ebnj9LR4TVQfW6+/kECe96 w==; X-CSE-ConnectionGUID: JCbdk3eGSTi4bXJZo4HJJQ== X-CSE-MsgGUID: n5a5QgMEROWbCIs1VKn/5A== X-IronPort-AV: E=McAfee;i="6700,10204,11222"; a="30689442" X-IronPort-AV: E=Sophos;i="6.11,199,1725346800"; d="scan'208";a="30689442" X-CSE-ConnectionGUID: N4Omogx0ShuO9H1a47PWkQ== X-CSE-MsgGUID: /XLDrWUYQfqYb+xEQj4Gkw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,259,1725346800"; d="scan'208";a="83988843" From: Xiaoyao Li To: Paolo Bonzini , Riku Voipio , Richard Henderson , Zhao Liu , "Michael S. Tsirkin" , Marcel Apfelbaum , Igor Mammedov , Ani Sinha Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Yanan Wang , Cornelia Huck , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , Eric Blake , Markus Armbruster , Marcelo Tosatti , rick.p.edgecombe@intel.com, kvm@vger.kernel.org, qemu-devel@nongnu.org, xiaoyao.li@intel.com Subject: [PATCH v6 15/60] i386/tdx: Set APIC bus rate to match with what TDX module enforces Date: Tue, 5 Nov 2024 01:23:23 -0500 Message-Id: <20241105062408.3533704-16-xiaoyao.li@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241105062408.3533704-1-xiaoyao.li@intel.com> References: <20241105062408.3533704-1-xiaoyao.li@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=198.175.65.18; envelope-from=xiaoyao.li@intel.com; helo=mgamail.intel.com X-Spam_score_int: -39 X-Spam_score: -4.0 X-Spam_bar: ---- X-Spam_report: (-4.0 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.34, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, HK_RANDOM_ENVFROM=0.001, HK_RANDOM_FROM=0.781, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1730788696803116600 Content-Type: text/plain; charset="utf-8" TDX advertises core crystal clock with cpuid[0x15] as 25MHz for TD guests and it's unchangeable from VMM. As a result, TDX guest reads the APIC timer as the same frequency, 25MHz. While KVM's default emulated frequency for APIC bus is 1GHz, set the APIC bus rate to match with TDX explicitly to ensure KVM provide correct emulated APIC timer for TD guest. Signed-off-by: Xiaoyao Li --- Changes in v6: - new patch; --- target/i386/kvm/tdx.c | 13 +++++++++++++ target/i386/kvm/tdx.h | 3 +++ 2 files changed, 16 insertions(+) diff --git a/target/i386/kvm/tdx.c b/target/i386/kvm/tdx.c index 887a5324b439..94b9be62c5dd 100644 --- a/target/i386/kvm/tdx.c +++ b/target/i386/kvm/tdx.c @@ -234,6 +234,19 @@ int tdx_pre_create_vcpu(CPUState *cpu, Error **errp) init_vm =3D g_malloc0(sizeof(struct kvm_tdx_init_vm) + sizeof(struct kvm_cpuid_entry2) * KVM_MAX_CPUID_EN= TRIES); =20 + if (!kvm_check_extension(kvm_state, KVM_CAP_X86_APIC_BUS_CYCLES_NS)) { + error_setg(errp, "KVM doesn't support KVM_CAP_X86_APIC_BUS_CYCLES_= NS"); + return -EOPNOTSUPP; + } + + r =3D kvm_vm_enable_cap(kvm_state, KVM_CAP_X86_APIC_BUS_CYCLES_NS, + 0, TDX_APIC_BUS_CYCLES_NS); + if (r < 0) { + error_setg_errno(errp, -r, + "Unable to set core crystal clock frequency to 25= MHz"); + return r; + } + #define SHA384_DIGEST_SIZE 48 if (tdx_guest->mrconfigid) { g_autofree uint8_t *data =3D qbase64_decode(tdx_guest->mrconfigid, diff --git a/target/i386/kvm/tdx.h b/target/i386/kvm/tdx.h index bc26e24eb9ac..0aebc7e3f6c9 100644 --- a/target/i386/kvm/tdx.h +++ b/target/i386/kvm/tdx.h @@ -14,6 +14,9 @@ typedef struct TdxGuestClass { X86ConfidentialGuestClass parent_class; } TdxGuestClass; =20 +/* TDX requires bus frequency 25MHz */ +#define TDX_APIC_BUS_CYCLES_NS 40 + typedef struct TdxGuest { X86ConfidentialGuest parent_obj; =20 --=20 2.34.1