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c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1730715326; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=e6gaduAfI+wCpuhXs1Wv9w9ku29RoqogCLvniLhjI80=; b=E102tEJdG4DYdkwfECJqfQro5bHk+58hS65mnvFX7FLf0V63yiMrkGs3YpOgq2z3GNQ/gd bSx4Rq1DlqfJQvOpyGlVQlVH+kuhT5FrqCBXKs0beZJ4Ai1vkdTlaQo9m9e/sz3KhSc3iv Pc1SgSj6eg8lpcciH1oZZCkIscPbjmc= X-MC-Unique: -CQhXOCSOriD7gi-H_GCQg-1 From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: Jamin Lin , Andrew Jeffery , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Subject: [PULL 07/10] hw/timer/aspeed: Fix interrupt status does not be cleared for AST2600 Date: Mon, 4 Nov 2024 11:14:58 +0100 Message-ID: <20241104101501.2487001-8-clg@redhat.com> In-Reply-To: <20241104101501.2487001-1-clg@redhat.com> References: <20241104101501.2487001-1-clg@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.0 on 10.30.177.17 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=clg@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -23 X-Spam_score: -2.4 X-Spam_bar: -- X-Spam_report: (-2.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.34, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1730715380029116600 From: Jamin Lin According to the datasheet of AST2600 description, interrupt status set by = HW and clear to "0" by software writing "1" on the specific bit. Therefore, if firmware set the specific bit "1" in the interrupt status register(0x34), the specific bit of "s->irq_sts" should be cleared 0. Signed-off-by: Jamin Lin Fixes: fadefada4d07 ("aspeed/timer: Add support for IRQ status register on = the AST2600") Reviewed-by: Andrew Jeffery Reviewed-by: C=C3=A9dric Le Goater --- hw/timer/aspeed_timer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/timer/aspeed_timer.c b/hw/timer/aspeed_timer.c index 5af268ea9ebc..149f7cc5a6aa 100644 --- a/hw/timer/aspeed_timer.c +++ b/hw/timer/aspeed_timer.c @@ -580,7 +580,7 @@ static void aspeed_2600_timer_write(AspeedTimerCtrlStat= e *s, hwaddr offset, =20 switch (offset) { case 0x34: - s->irq_sts &=3D tv; + s->irq_sts &=3D ~tv; break; case 0x3C: aspeed_timer_set_ctrl(s, s->ctrl & ~tv); --=20 2.47.0