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Mon, 4 Nov 2024 09:41:59 GMT Received: from localhost.localdomain (ca-dev80.us.oracle.com [10.211.9.80]) by iadpaimrmta03.imrmtpd1.prodappiadaev1.oraclevcn.com (PPS) with ESMTP id 42nahbt06k-5; Mon, 04 Nov 2024 09:41:59 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oracle.com; h=cc :content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=corp-2023-11-20; bh=aw8Da KbTFy541Imzo6l3juUlheHXjuaW/lcnjuRi9i8=; b=KQzh8vUimbrwlWWWRQ0bQ Wr2Sa1pd+x5EDv7de0eGJmN7gJ84M+8+oNTQQ5MC9fxVf98M1mmD9zPZPCJ3dP4v zwW4NhdTk1KM36Ijw1ykS6CG51DDB3fXtGGF495iX9SRayQKVZTDLUslP6r9QUL7 qrLW0BRjBSuXIVz1oQnZFaHSPnz3pHExOwX1Ohate/CpqE4UJdjHo1N1qhKil2rs CXf4uU05SabHWvc2Puu5cc7ocxU/d8FHq2DsjTJNVTlntLk8811hKK4QAGqKXNaZ /+/BiNBIddJ4GedmqsF4nsXtQUUBwEW2Eof5oFuGp4LyW0e0ePO2AWhOQfJmWGUO A== From: Dongli Zhang To: qemu-devel@nongnu.org, kvm@vger.kernel.org Cc: pbonzini@redhat.com, mtosatti@redhat.com, sandipan.das@amd.com, babu.moger@amd.com, zhao1.liu@intel.com, likexu@tencent.com, like.xu.linux@gmail.com, zhenyuw@linux.intel.com, groug@kaod.org, lyan@digitalocean.com, khorenko@virtuozzo.com, alexander.ivanov@virtuozzo.com, den@virtuozzo.com, joe.jin@oracle.com, davydov-max@yandex-team.ru Subject: [PATCH 4/7] target/i386/kvm: rename architectural PMU variables Date: Mon, 4 Nov 2024 01:40:19 -0800 Message-ID: <20241104094119.4131-5-dongli.zhang@oracle.com> X-Mailer: git-send-email 2.43.5 In-Reply-To: <20241104094119.4131-1-dongli.zhang@oracle.com> References: <20241104094119.4131-1-dongli.zhang@oracle.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1051,Hydra:6.0.680,FMLib:17.12.62.30 definitions=2024-11-04_07,2024-11-01_01,2024-09-30_01 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 adultscore=0 phishscore=0 mlxlogscore=999 mlxscore=0 suspectscore=0 bulkscore=0 malwarescore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2409260000 definitions=main-2411040085 X-Proofpoint-ORIG-GUID: G2G7tkFTicVLrnW9tFGXNacg0DRyZo-U X-Proofpoint-GUID: G2G7tkFTicVLrnW9tFGXNacg0DRyZo-U Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" AMD does not have what is commonly referred to as an architectural PMU. Therefore, we need to rename the following variables to be applicable for both Intel and AMD: - has_architectural_pmu_version - num_architectural_pmu_gp_counters - num_architectural_pmu_fixed_counters For Intel processors, the meaning of has_pmu_version remains unchanged. For AMD processors: has_pmu_version =3D=3D 1 corresponds to versions before AMD PerfMonV2. has_pmu_version =3D=3D 2 corresponds to AMD PerfMonV2. Signed-off-by: Dongli Zhang --- target/i386/kvm/kvm.c | 49 ++++++++++++++++++++++++------------------- 1 file changed, 28 insertions(+), 21 deletions(-) diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index 5c0276f889..ca2b644e2c 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -168,9 +168,16 @@ static bool has_msr_pkrs; static bool has_msr_hwcr; static bool has_pmu_cap; =20 -static uint32_t has_architectural_pmu_version; -static uint32_t num_architectural_pmu_gp_counters; -static uint32_t num_architectural_pmu_fixed_counters; +/* + * For Intel processors, the meaning is the architectural PMU version + * number. + * + * For AMD processors: 1 corresponds to the prior versions, and 2 + * corresponds to AMD PerfMonV2. + */ +static uint32_t has_pmu_version; +static uint32_t num_pmu_gp_counters; +static uint32_t num_pmu_fixed_counters; =20 static int has_xsave2; static int has_xcrs; @@ -2042,24 +2049,24 @@ static void kvm_init_pmu_info(CPUX86State *env) =20 cpu_x86_cpuid(env, 0x0a, 0, &eax, &unused, &unused, &edx); =20 - has_architectural_pmu_version =3D eax & 0xff; - if (has_architectural_pmu_version > 0) { - num_architectural_pmu_gp_counters =3D (eax & 0xff00) >> 8; + has_pmu_version =3D eax & 0xff; + if (has_pmu_version > 0) { + num_pmu_gp_counters =3D (eax & 0xff00) >> 8; =20 /* * Shouldn't be more than 32, since that's the number of bits * available in EBX to tell us _which_ counters are available. * Play it safe. */ - if (num_architectural_pmu_gp_counters > MAX_GP_COUNTERS) { - num_architectural_pmu_gp_counters =3D MAX_GP_COUNTERS; + if (num_pmu_gp_counters > MAX_GP_COUNTERS) { + num_pmu_gp_counters =3D MAX_GP_COUNTERS; } =20 - if (has_architectural_pmu_version > 1) { - num_architectural_pmu_fixed_counters =3D edx & 0x1f; + if (has_pmu_version > 1) { + num_pmu_fixed_counters =3D edx & 0x1f; =20 - if (num_architectural_pmu_fixed_counters > MAX_FIXED_COUNTERS)= { - num_architectural_pmu_fixed_counters =3D MAX_FIXED_COUNTER= S; + if (num_pmu_fixed_counters > MAX_FIXED_COUNTERS) { + num_pmu_fixed_counters =3D MAX_FIXED_COUNTERS; } } } @@ -4020,25 +4027,25 @@ static int kvm_put_msrs(X86CPU *cpu, int level) kvm_msr_entry_add(cpu, MSR_KVM_POLL_CONTROL, env->poll_control= _msr); } =20 - if (has_architectural_pmu_version > 0) { - if (has_architectural_pmu_version > 1) { + if (has_pmu_version > 0) { + if (has_pmu_version > 1) { /* Stop the counter. */ kvm_msr_entry_add(cpu, MSR_CORE_PERF_FIXED_CTR_CTRL, 0); kvm_msr_entry_add(cpu, MSR_CORE_PERF_GLOBAL_CTRL, 0); } =20 /* Set the counter values. */ - for (i =3D 0; i < num_architectural_pmu_fixed_counters; i++) { + for (i =3D 0; i < num_pmu_fixed_counters; i++) { kvm_msr_entry_add(cpu, MSR_CORE_PERF_FIXED_CTR0 + i, env->msr_fixed_counters[i]); } - for (i =3D 0; i < num_architectural_pmu_gp_counters; i++) { + for (i =3D 0; i < num_pmu_gp_counters; i++) { kvm_msr_entry_add(cpu, MSR_P6_PERFCTR0 + i, env->msr_gp_counters[i]); kvm_msr_entry_add(cpu, MSR_P6_EVNTSEL0 + i, env->msr_gp_evtsel[i]); } - if (has_architectural_pmu_version > 1) { + if (has_pmu_version > 1) { kvm_msr_entry_add(cpu, MSR_CORE_PERF_GLOBAL_STATUS, env->msr_global_status); kvm_msr_entry_add(cpu, MSR_CORE_PERF_GLOBAL_OVF_CTRL, @@ -4496,17 +4503,17 @@ static int kvm_get_msrs(X86CPU *cpu) if (env->features[FEAT_KVM] & (1 << KVM_FEATURE_POLL_CONTROL)) { kvm_msr_entry_add(cpu, MSR_KVM_POLL_CONTROL, 1); } - if (has_architectural_pmu_version > 0) { - if (has_architectural_pmu_version > 1) { + if (has_pmu_version > 0) { + if (has_pmu_version > 1) { kvm_msr_entry_add(cpu, MSR_CORE_PERF_FIXED_CTR_CTRL, 0); kvm_msr_entry_add(cpu, MSR_CORE_PERF_GLOBAL_CTRL, 0); kvm_msr_entry_add(cpu, MSR_CORE_PERF_GLOBAL_STATUS, 0); kvm_msr_entry_add(cpu, MSR_CORE_PERF_GLOBAL_OVF_CTRL, 0); } - for (i =3D 0; i < num_architectural_pmu_fixed_counters; i++) { + for (i =3D 0; i < num_pmu_fixed_counters; i++) { kvm_msr_entry_add(cpu, MSR_CORE_PERF_FIXED_CTR0 + i, 0); } - for (i =3D 0; i < num_architectural_pmu_gp_counters; i++) { + for (i =3D 0; i < num_pmu_gp_counters; i++) { kvm_msr_entry_add(cpu, MSR_P6_PERFCTR0 + i, 0); kvm_msr_entry_add(cpu, MSR_P6_EVNTSEL0 + i, 0); } --=20 2.39.3