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[124.171.217.17]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-7ee45a0081esm5900648a12.59.2024.11.03.16.21.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 03 Nov 2024 16:21:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1730679697; x=1731284497; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=9YJeTidwt3a7o0gdkzG7N4NysCiSAz4U4rS7VO7/kD8=; b=ljQA1SJQJ9Ivl+WGja5ccuzQCtpUnCY5NloSHHjlHbqzuYRx7c/jZe8/TR+Xoxc0mG sSms3sPR3MccS3pL4AqTffcn0HIqFDwUIn4A5AQsqHSGfXNGAnZNzuqGgxH2WgeecRkV 5aQziuYFlq71MXGJGxnNo+ebi5jOGein4cNebSSVM+hJNmSoZVa1D6VYU1K6vL/M/PDA sfhnBCpR/wcZXbZ0SZsZZxn+0ULZ2dWLmyI13pxCJO6WnXEJiWCi0aFvDNPCgKX/JJKH 98JOA6rmIyrjhMOEynL64tLsDMUB1M/nvSJxm/fgvJ0ggKfLtXWt8MQLAyUIoqqu8Ta6 Tk9A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1730679697; x=1731284497; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=9YJeTidwt3a7o0gdkzG7N4NysCiSAz4U4rS7VO7/kD8=; b=KXhyAWe3z8GmRWpcnnfS53jgwyrDa9tk+IYTzezMN/atAvvav45VeXjpybbIQuGOn4 2C10IL6yajF3TanfXQWZ2xqQxR7uf1qfJsoxhuHeTd79nNfodKnd4xC1nFkFsUUKwoz1 uy6rowloNA7bkh9ixrBRrRkE5eVj7l11Id4H3feY9RGTACzWrbi1VRkszotw2FZdHFzb 98WeszNRN2lqsqH523KKgvThGEF7KuoGN7frCMKBAnI1RdJ0U+P+QLVHwpTzb15sc+RD hHD2UghUn/VJ94TxS9BuyMaUcKFBUGBv6Jknywa+9NnQMi8Phut63BklZBy8ydYOQUCk bTiQ== X-Forwarded-Encrypted: i=1; AJvYcCWtzPZPNMpg4ndIDXLtQgHNvnKIyReVgbHQSa52P7kBuYO0sqGztKhhKh8HZZ3tgvSvKp6FkB5vBQ==@nongnu.org X-Gm-Message-State: AOJu0YyJSUjqBDSisVwnSQCIxWmDKgf6c0AfuUl4pdsuwthQvnNEojnF nNsZDiZcKmnYh9UckRPj9dQQAQXL1zWn1DFGseQ8LWrOkegE2ad6EueXjQ== X-Google-Smtp-Source: AGHT+IHwKJY0GNtZBXaPTS/n/GLZTHM9Jh1Mz4P/1c2CVWw4NB0ZbY1yhoDQQBb7IpNcVueAFiNVvQ== X-Received: by 2002:a17:902:f543:b0:20c:e875:12c2 with SMTP id d9443c01a7336-2111b0028edmr134234495ad.51.1730679696837; Sun, 03 Nov 2024 16:21:36 -0800 (PST) From: Nicholas Piggin To: qemu-devel@nongnu.org Cc: Nicholas Piggin , qemu-ppc@nongnu.org, Harsh Prateek Bora Subject: [PULL 40/67] target/ppc: optimize p7 exception handling routines Date: Mon, 4 Nov 2024 10:18:29 +1000 Message-ID: <20241104001900.682660-41-npiggin@gmail.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241104001900.682660-1-npiggin@gmail.com> References: <20241104001900.682660-1-npiggin@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62b; envelope-from=npiggin@gmail.com; helo=mail-pl1-x62b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1730679914042116600 Content-Type: text/plain; charset="utf-8" From: Harsh Prateek Bora Like p8 and p9, simplifying p7 exception handling rotuines to avoid un-necessary multiple indirect accesses to env->pending_interrupts and env->spr[SPR_LPCR]. Reviewed-by: Nicholas Piggin Signed-off-by: Harsh Prateek Bora Signed-off-by: Nicholas Piggin --- target/ppc/excp_helper.c | 46 ++++++++++++++++++++++------------------ 1 file changed, 25 insertions(+), 21 deletions(-) diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 38733b7521..8d2e880c83 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -1683,51 +1683,54 @@ void ppc_cpu_do_interrupt(CPUState *cs) PPC_INTERRUPT_PIT | PPC_INTERRUPT_DOORBELL | PPC_INTERRUPT_HDOORBELL = | \ PPC_INTERRUPT_THERM | PPC_INTERRUPT_EBB) =20 -static int p7_interrupt_powersave(CPUPPCState *env) +static int p7_interrupt_powersave(uint32_t pending_interrupts, + target_ulong lpcr) { - if ((env->pending_interrupts & PPC_INTERRUPT_EXT) && - (env->spr[SPR_LPCR] & LPCR_P7_PECE0)) { + if ((pending_interrupts & PPC_INTERRUPT_EXT) && + (lpcr & LPCR_P7_PECE0)) { return PPC_INTERRUPT_EXT; } - if ((env->pending_interrupts & PPC_INTERRUPT_DECR) && - (env->spr[SPR_LPCR] & LPCR_P7_PECE1)) { + if ((pending_interrupts & PPC_INTERRUPT_DECR) && + (lpcr & LPCR_P7_PECE1)) { return PPC_INTERRUPT_DECR; } - if ((env->pending_interrupts & PPC_INTERRUPT_MCK) && - (env->spr[SPR_LPCR] & LPCR_P7_PECE2)) { + if ((pending_interrupts & PPC_INTERRUPT_MCK) && + (lpcr & LPCR_P7_PECE2)) { return PPC_INTERRUPT_MCK; } - if ((env->pending_interrupts & PPC_INTERRUPT_HMI) && - (env->spr[SPR_LPCR] & LPCR_P7_PECE2)) { + if ((pending_interrupts & PPC_INTERRUPT_HMI) && + (lpcr & LPCR_P7_PECE2)) { return PPC_INTERRUPT_HMI; } - if (env->pending_interrupts & PPC_INTERRUPT_RESET) { + if (pending_interrupts & PPC_INTERRUPT_RESET) { return PPC_INTERRUPT_RESET; } return 0; } =20 -static int p7_next_unmasked_interrupt(CPUPPCState *env) +static int p7_next_unmasked_interrupt(CPUPPCState *env, + uint32_t pending_interrupts, + target_ulong lpcr) { CPUState *cs =3D env_cpu(env); =20 /* Ignore MSR[EE] when coming out of some power management states */ bool msr_ee =3D FIELD_EX64(env->msr, MSR, EE) || env->resume_as_sreset; =20 - assert((env->pending_interrupts & P7_UNUSED_INTERRUPTS) =3D=3D 0); + assert((pending_interrupts & P7_UNUSED_INTERRUPTS) =3D=3D 0); =20 if (cs->halted) { /* LPCR[PECE] controls which interrupts can exit power-saving mode= */ - return p7_interrupt_powersave(env); + return p7_interrupt_powersave(pending_interrupts, lpcr); } =20 /* Machine check exception */ - if (env->pending_interrupts & PPC_INTERRUPT_MCK) { + if (pending_interrupts & PPC_INTERRUPT_MCK) { return PPC_INTERRUPT_MCK; } =20 /* Hypervisor decrementer exception */ - if (env->pending_interrupts & PPC_INTERRUPT_HDECR) { + if (pending_interrupts & PPC_INTERRUPT_HDECR) { /* LPCR will be clear when not supported so this will work */ bool hdice =3D !!(env->spr[SPR_LPCR] & LPCR_HDICE); if ((msr_ee || !FIELD_EX64_HV(env->msr)) && hdice) { @@ -1737,9 +1740,9 @@ static int p7_next_unmasked_interrupt(CPUPPCState *en= v) } =20 /* External interrupt can ignore MSR:EE under some circumstances */ - if (env->pending_interrupts & PPC_INTERRUPT_EXT) { - bool lpes0 =3D !!(env->spr[SPR_LPCR] & LPCR_LPES0); - bool heic =3D !!(env->spr[SPR_LPCR] & LPCR_HEIC); + if (pending_interrupts & PPC_INTERRUPT_EXT) { + bool lpes0 =3D !!(lpcr & LPCR_LPES0); + bool heic =3D !!(lpcr & LPCR_HEIC); /* HEIC blocks delivery to the hypervisor */ if ((msr_ee && !(heic && FIELD_EX64_HV(env->msr) && !FIELD_EX64(env->msr, MSR, PR))) || @@ -1749,10 +1752,10 @@ static int p7_next_unmasked_interrupt(CPUPPCState *= env) } if (msr_ee !=3D 0) { /* Decrementer exception */ - if (env->pending_interrupts & PPC_INTERRUPT_DECR) { + if (pending_interrupts & PPC_INTERRUPT_DECR) { return PPC_INTERRUPT_DECR; } - if (env->pending_interrupts & PPC_INTERRUPT_PERFM) { + if (pending_interrupts & PPC_INTERRUPT_PERFM) { return PPC_INTERRUPT_PERFM; } } @@ -2022,7 +2025,8 @@ static int ppc_next_unmasked_interrupt(CPUPPCState *e= nv) #ifdef TARGET_PPC64 switch (env->excp_model) { case POWERPC_EXCP_POWER7: - return p7_next_unmasked_interrupt(env); + return p7_next_unmasked_interrupt(env, env->pending_interrupts, + env->spr[SPR_LPCR]); case POWERPC_EXCP_POWER8: return p8_next_unmasked_interrupt(env, env->pending_interrupts, env->spr[SPR_LPCR]); --=20 2.45.2