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Wed, 30 Oct 2024 21:22:59 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Jiaxun Yang , Richard Henderson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 05/14] target/mips: Re-introduce OPC_ADDUH_QB_DSP and OPC_MUL_PH_DSP Date: Thu, 31 Oct 2024 01:21:21 -0300 Message-ID: <20241031042130.98450-6-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241031042130.98450-1-philmd@linaro.org> References: <20241031042130.98450-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::234; envelope-from=philmd@linaro.org; helo=mail-lj1-x234.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1730348595892116600 From: Philippe Mathieu-Daud=C3=A9 There is no issue having multiple enum declarations with the same value. As we are going to remove the OPC_MULT_G_2E definition in few commits, restore the OPC_ADDUH_QB_DSP and OPC_MUL_PH_DSP definitions and use them where they belong. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Jiaxun Yang Reviewed-by: Richard Henderson Message-Id: <20241026175349.84523-4-philmd@linaro.org> Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- target/mips/tcg/translate.c | 18 +++++------------- 1 file changed, 5 insertions(+), 13 deletions(-) diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c index 6d7e913263e..509488fdc7a 100644 --- a/target/mips/tcg/translate.c +++ b/target/mips/tcg/translate.c @@ -389,16 +389,14 @@ enum { OPC_ADDU_OB_DSP =3D 0x14 | OPC_SPECIAL3, OPC_ABSQ_S_PH_DSP =3D 0x12 | OPC_SPECIAL3, OPC_ABSQ_S_QH_DSP =3D 0x16 | OPC_SPECIAL3, - /* OPC_ADDUH_QB_DSP is same as OPC_MULT_G_2E. */ - /* OPC_ADDUH_QB_DSP =3D 0x18 | OPC_SPECIAL3, */ + OPC_ADDUH_QB_DSP =3D 0x18 | OPC_SPECIAL3, OPC_CMPU_EQ_QB_DSP =3D 0x11 | OPC_SPECIAL3, OPC_CMPU_EQ_OB_DSP =3D 0x15 | OPC_SPECIAL3, /* MIPS DSP GPR-Based Shift Sub-class */ OPC_SHLL_QB_DSP =3D 0x13 | OPC_SPECIAL3, OPC_SHLL_OB_DSP =3D 0x17 | OPC_SPECIAL3, /* MIPS DSP Multiply Sub-class insns */ - /* OPC_MUL_PH_DSP is same as OPC_ADDUH_QB_DSP. */ - /* OPC_MUL_PH_DSP =3D 0x18 | OPC_SPECIAL3, */ + OPC_MUL_PH_DSP =3D 0x18 | OPC_SPECIAL3, OPC_DPA_W_PH_DSP =3D 0x30 | OPC_SPECIAL3, OPC_DPAQ_W_QH_DSP =3D 0x34 | OPC_SPECIAL3, /* DSP Bit/Manipulation Sub-class */ @@ -556,7 +554,6 @@ enum { OPC_MULQ_S_PH =3D (0x1E << 6) | OPC_ADDU_QB_DSP, }; =20 -#define OPC_ADDUH_QB_DSP OPC_MULT_G_2E #define MASK_ADDUH_QB(op) (MASK_SPECIAL3(op) | (op & (0x1F << 6)= )) enum { /* MIPS DSP Arithmetic Sub-class */ @@ -11587,8 +11584,7 @@ static void gen_mipsdsp_arith(DisasContext *ctx, ui= nt32_t op1, uint32_t op2, gen_load_gpr(v2_t, v2); =20 switch (op1) { - /* OPC_MULT_G_2E is equal OPC_ADDUH_QB_DSP */ - case OPC_MULT_G_2E: + case OPC_ADDUH_QB_DSP: check_dsp_r2(ctx); switch (op2) { case OPC_ADDUH_QB: @@ -12271,11 +12267,7 @@ static void gen_mipsdsp_multiply(DisasContext *ctx= , uint32_t op1, uint32_t op2, gen_load_gpr(v2_t, v2); =20 switch (op1) { - /* - * OPC_MULT_G_2E, OPC_ADDUH_QB_DSP, OPC_MUL_PH_DSP have - * the same mask and op1. - */ - case OPC_MULT_G_2E: + case OPC_MUL_PH_DSP: check_dsp_r2(ctx); switch (op2) { case OPC_MUL_PH: @@ -13811,7 +13803,7 @@ static void decode_opc_special3_legacy(CPUMIPSState= *env, DisasContext *ctx) * OPC_MULT_G_2E, OPC_ADDUH_QB_DSP, OPC_MUL_PH_DSP have * the same mask and op1. */ - if ((ctx->insn_flags & ASE_DSP_R2) && (op1 =3D=3D OPC_MULT_G_2E)) { + if ((ctx->insn_flags & ASE_DSP_R2) && (op1 =3D=3D OPC_MUL_PH_DSP))= { op2 =3D MASK_ADDUH_QB(ctx->opcode); switch (op2) { case OPC_ADDUH_QB: --=20 2.45.2