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[2403:580b:97e8:0:82ce:f179:8a79:69f4]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-21105707064sm3022795ad.70.2024.10.30.20.53.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Oct 2024 20:53:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1730346819; x=1730951619; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=W+FRnF6zFYJlNe+SSGtltkqyDEcqAOn0tvz5ttl1V1M=; b=Bt2UMcxkHSfK83rBOlLxI539egDK5gzJjVp/yLr1C4E35ZO8Z6YKqE0rF+OrGchd/P eLky0OJz3Oeut7VblXKrMDALe7OQub0MCnAY9+SLM+QoEix8U2aqvoP5hEsnUqYvcn0V NFYqW7L85wq9IvPyYfMQLRuK6Nq7Z+so/uI2uuKx+yW5lkv9HhGyGCdXssxfFR6VBUHj kEjTzo0XIz1OqqQimabyh7W3Clr/e9o1RkEF5BG9AUyWnqMUV2BhYP9SsNE2mV64ibOl 97z6F0HNSBROMEm67QSsstXnrGGhIuSjXmvwj9wUuQdPNpTNcUP6hHtj0Z9iIdLK5D4K k95g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1730346819; x=1730951619; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=W+FRnF6zFYJlNe+SSGtltkqyDEcqAOn0tvz5ttl1V1M=; b=YvyhRzUYxgQW8eazuWDI++R8P12cZo0VohCR8IjCmIssVl/od06FKcTBSkxuUi1Y6e NF9k2pFYJOXtqy5AwFQK5xjHe8MpZNFbT0SP3HxRZcx2PoLdvy8LCj+UXMJWoXT1K+XP t8yED+TsVRNwpCJNjkU19mVz77b5FAmD1A3Kzi53K0bNof3wqZEtB3HKcHARviS4CNBR st9XA6+HiS6Pbf3zQIoDnVCAJmfZIYtH1iOuWRgGj40iouorKJuzjJR9Vf5U6rZ5w2Z8 FbXiQYGv8Le8x5dyFzYevS9oVOIypak8ZbF7rj7kZwKsQMMD9eLFBPZKvo7kT9cYAMa8 +2JQ== X-Gm-Message-State: AOJu0YzNTdfK2d+pGYkZFSYDNDT41BPwel8XGvzxNqFelxlcmuln9shr pF5Tr4qG7PA7eNJJxxXOdfILTJd++OTXm704601IO8Q6TAZrQfKWOVoQBv6n X-Google-Smtp-Source: AGHT+IEyUcuP6H0zOoMNChh5E4iyEfEHAvXgSBQFNVv4crIX84Pp4LHCFHEfjwdS9a2XceKr3B4rWA== X-Received: by 2002:a17:902:cec3:b0:20e:57c8:6ab3 with SMTP id d9443c01a7336-210c68739b0mr272226115ad.4.1730346818760; Wed, 30 Oct 2024 20:53:38 -0700 (PDT) From: Alistair Francis X-Google-Original-From: Alistair Francis To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, TANG Tiancheng , Liu Zhiwei , Alistair Francis Subject: [PULL 04/50] target/riscv: Correct SXL return value for RV32 in RV64 QEMU Date: Thu, 31 Oct 2024 13:52:32 +1000 Message-ID: <20241031035319.731906-5-alistair.francis@wdc.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241031035319.731906-1-alistair.francis@wdc.com> References: <20241031035319.731906-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::629; envelope-from=alistair23@gmail.com; helo=mail-pl1-x629.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1730346968487116600 Content-Type: text/plain; charset="utf-8" From: TANG Tiancheng Ensure that riscv_cpu_sxl returns MXL_RV32 when runningRV32 in an RV64 QEMU. Signed-off-by: TANG Tiancheng Fixes: 05e6ca5e156 ("target/riscv: Ignore reserved bits in PTE for RV64") Reviewed-by: Liu Zhiwei Reviewed-by: Alistair Francis Message-ID: <20240919055048.562-4-zhiwei_liu@linux.alibaba.com> Signed-off-by: Alistair Francis --- target/riscv/cpu.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 1619c3acb6..a63a29744c 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -709,8 +709,11 @@ static inline RISCVMXL riscv_cpu_sxl(CPURISCVState *en= v) #ifdef CONFIG_USER_ONLY return env->misa_mxl; #else - return get_field(env->mstatus, MSTATUS64_SXL); + if (env->misa_mxl !=3D MXL_RV32) { + return get_field(env->mstatus, MSTATUS64_SXL); + } #endif + return MXL_RV32; } #endif =20 --=20 2.47.0